1 1.26 thorpej /* $NetBSD: iommuvar.h,v 1.26 2023/12/01 06:47:59 thorpej Exp $ */ 2 1.1 mrg 3 1.1 mrg /* 4 1.1 mrg * Copyright (c) 1999 Matthew R. Green 5 1.1 mrg * All rights reserved. 6 1.1 mrg * 7 1.1 mrg * Redistribution and use in source and binary forms, with or without 8 1.1 mrg * modification, are permitted provided that the following conditions 9 1.1 mrg * are met: 10 1.1 mrg * 1. Redistributions of source code must retain the above copyright 11 1.1 mrg * notice, this list of conditions and the following disclaimer. 12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 mrg * notice, this list of conditions and the following disclaimer in the 14 1.1 mrg * documentation and/or other materials provided with the distribution. 15 1.1 mrg * 16 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 mrg * SUCH DAMAGE. 27 1.1 mrg */ 28 1.1 mrg 29 1.1 mrg #ifndef _SPARC64_DEV_IOMMUVAR_H_ 30 1.1 mrg #define _SPARC64_DEV_IOMMUVAR_H_ 31 1.1 mrg 32 1.26 thorpej #include <sys/vmem.h> 33 1.26 thorpej 34 1.1 mrg /* 35 1.12 eeh * Streaming buffer control 36 1.12 eeh * 37 1.12 eeh * It's easy to deal w/sysio since it has a single streaming buffer, and 38 1.12 eeh * flushes are done on 8-byte boundaries. But psycho is a pain since it 39 1.12 eeh * has two streaming buffers and the streaming buffer flush dumps 64 bytes 40 1.12 eeh * of data. 41 1.12 eeh */ 42 1.12 eeh struct strbuf_ctl { 43 1.12 eeh struct iommu_state *sb_is; /* Pointer to our iommu */ 44 1.12 eeh bus_space_handle_t sb_sb; /* Handle for our regs */ 45 1.12 eeh paddr_t sb_flushpa; /* to flush streaming buffers */ 46 1.12 eeh volatile int64_t *sb_flush; 47 1.12 eeh }; 48 1.12 eeh 49 1.12 eeh /* 50 1.1 mrg * per-IOMMU state 51 1.1 mrg */ 52 1.1 mrg struct iommu_state { 53 1.1 mrg paddr_t is_ptsb; /* TSB physical address */ 54 1.1 mrg int64_t *is_tsb; /* TSB virtual address */ 55 1.1 mrg int is_tsbsize; /* 0 = 8K, ... */ 56 1.1 mrg u_int is_dvmabase; 57 1.10 eeh u_int is_dvmaend; 58 1.25 andvar int64_t is_cr; /* IOMMU control register value */ 59 1.26 thorpej vmem_t *is_dvmamap; /* DVMA map for this instance */ 60 1.20 mrg int is_flags; 61 1.20 mrg #define IOMMU_FLUSH_CACHE 0x00000001 62 1.20 mrg #define IOMMU_TSBSIZE_IN_PTSB 0x00000002 /* PCIe */ 63 1.23 mrg #define IOMMU_SYNC_BEFORE_UNMAP 0x00000004 64 1.1 mrg 65 1.12 eeh struct strbuf_ctl *is_sb[2]; /* Streaming buffers if any */ 66 1.1 mrg 67 1.12 eeh /* copies of our parents state, to allow us to be self contained */ 68 1.1 mrg bus_space_tag_t is_bustag; /* our bus tag */ 69 1.11 eeh bus_space_handle_t is_iommu; /* IOMMU registers */ 70 1.22 palle uint64_t is_devhandle; /* for sun4v hypervisor calls */ 71 1.1 mrg }; 72 1.1 mrg 73 1.1 mrg /* interfaces for PCI/SBUS code */ 74 1.14 cdi void iommu_init(char *, struct iommu_state *, int, uint32_t); 75 1.13 cdi void iommu_reset(struct iommu_state *); 76 1.13 cdi paddr_t iommu_extract(struct iommu_state *, vaddr_t); 77 1.13 cdi 78 1.17 nakayama int iommu_dvmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t, 79 1.17 nakayama struct proc *, int); 80 1.17 nakayama void iommu_dvmamap_unload(bus_dma_tag_t, bus_dmamap_t); 81 1.17 nakayama int iommu_dvmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 82 1.17 nakayama bus_dma_segment_t *, int, bus_size_t, int); 83 1.17 nakayama void iommu_dvmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, bus_size_t, 84 1.17 nakayama int); 85 1.17 nakayama int iommu_dvmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 86 1.17 nakayama bus_dma_segment_t *, int, int *, int); 87 1.17 nakayama void iommu_dvmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); 88 1.17 nakayama int iommu_dvmamem_map(bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 89 1.17 nakayama void **, int); 90 1.17 nakayama void iommu_dvmamem_unmap(bus_dma_tag_t, void *, size_t); 91 1.1 mrg 92 1.1 mrg #endif /* _SPARC64_DEV_IOMMUVAR_H_ */ 93