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pci_machdep.c revision 1.25.4.3
      1  1.25.4.3  nathanw /*	$NetBSD: pci_machdep.c,v 1.25.4.3 2002/06/20 03:41:21 nathanw Exp $	*/
      2  1.25.4.2  nathanw 
      3  1.25.4.2  nathanw /*
      4  1.25.4.2  nathanw  * Copyright (c) 1999, 2000 Matthew R. Green
      5  1.25.4.2  nathanw  * All rights reserved.
      6  1.25.4.2  nathanw  *
      7  1.25.4.2  nathanw  * Redistribution and use in source and binary forms, with or without
      8  1.25.4.2  nathanw  * modification, are permitted provided that the following conditions
      9  1.25.4.2  nathanw  * are met:
     10  1.25.4.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     11  1.25.4.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     12  1.25.4.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.25.4.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     14  1.25.4.2  nathanw  *    documentation and/or other materials provided with the distribution.
     15  1.25.4.2  nathanw  * 3. The name of the author may not be used to endorse or promote products
     16  1.25.4.2  nathanw  *    derived from this software without specific prior written permission.
     17  1.25.4.2  nathanw  *
     18  1.25.4.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  1.25.4.2  nathanw  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20  1.25.4.2  nathanw  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  1.25.4.2  nathanw  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  1.25.4.2  nathanw  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     23  1.25.4.2  nathanw  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     24  1.25.4.2  nathanw  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     25  1.25.4.2  nathanw  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     26  1.25.4.2  nathanw  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27  1.25.4.2  nathanw  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28  1.25.4.2  nathanw  * SUCH DAMAGE.
     29  1.25.4.2  nathanw  */
     30  1.25.4.2  nathanw 
     31  1.25.4.2  nathanw /*
     32  1.25.4.2  nathanw  * functions expected by the MI PCI code.
     33  1.25.4.2  nathanw  */
     34  1.25.4.2  nathanw 
     35  1.25.4.2  nathanw #ifdef DEBUG
     36  1.25.4.2  nathanw #define SPDB_CONF	0x01
     37  1.25.4.2  nathanw #define SPDB_INTR	0x04
     38  1.25.4.2  nathanw #define SPDB_INTMAP	0x08
     39  1.25.4.2  nathanw #define SPDB_INTFIX	0x10
     40  1.25.4.2  nathanw #define SPDB_PROBE	0x20
     41  1.25.4.2  nathanw int sparc_pci_debug = 0x0;
     42  1.25.4.2  nathanw #define DPRINTF(l, s)	do { if (sparc_pci_debug & l) printf s; } while (0)
     43  1.25.4.2  nathanw #else
     44  1.25.4.2  nathanw #define DPRINTF(l, s)
     45  1.25.4.2  nathanw #endif
     46  1.25.4.2  nathanw 
     47  1.25.4.2  nathanw #include <sys/types.h>
     48  1.25.4.2  nathanw #include <sys/param.h>
     49  1.25.4.2  nathanw #include <sys/time.h>
     50  1.25.4.2  nathanw #include <sys/systm.h>
     51  1.25.4.2  nathanw #include <sys/errno.h>
     52  1.25.4.2  nathanw #include <sys/device.h>
     53  1.25.4.2  nathanw #include <sys/malloc.h>
     54  1.25.4.2  nathanw 
     55  1.25.4.2  nathanw #define _SPARC_BUS_DMA_PRIVATE
     56  1.25.4.2  nathanw #include <machine/bus.h>
     57  1.25.4.2  nathanw #include <machine/autoconf.h>
     58  1.25.4.2  nathanw #include <machine/openfirm.h>
     59  1.25.4.2  nathanw 
     60  1.25.4.2  nathanw #include <dev/pci/pcivar.h>
     61  1.25.4.2  nathanw #include <dev/pci/pcireg.h>
     62  1.25.4.2  nathanw 
     63  1.25.4.2  nathanw #include <dev/ofw/ofw_pci.h>
     64  1.25.4.2  nathanw 
     65  1.25.4.2  nathanw #include <sparc64/dev/iommureg.h>
     66  1.25.4.2  nathanw #include <sparc64/dev/iommuvar.h>
     67  1.25.4.2  nathanw #include <sparc64/dev/psychoreg.h>
     68  1.25.4.2  nathanw #include <sparc64/dev/psychovar.h>
     69  1.25.4.2  nathanw 
     70  1.25.4.2  nathanw /* this is a base to be copied */
     71  1.25.4.2  nathanw struct sparc_pci_chipset _sparc_pci_chipset = {
     72  1.25.4.2  nathanw 	NULL,
     73  1.25.4.2  nathanw };
     74  1.25.4.2  nathanw 
     75  1.25.4.3  nathanw static pcitag_t
     76  1.25.4.3  nathanw ofpci_make_tag(pci_chipset_tag_t pc, int node, int b, int d, int f)
     77  1.25.4.3  nathanw {
     78  1.25.4.3  nathanw 	pcitag_t tag;
     79  1.25.4.3  nathanw 
     80  1.25.4.3  nathanw 	tag = PCITAG_CREATE(node, b, d, f);
     81  1.25.4.3  nathanw 
     82  1.25.4.3  nathanw 	/* Enable all the different spaces for this device */
     83  1.25.4.3  nathanw 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
     84  1.25.4.3  nathanw 		PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE|
     85  1.25.4.3  nathanw 		PCI_COMMAND_IO_ENABLE);
     86  1.25.4.3  nathanw 	return (tag);
     87  1.25.4.3  nathanw }
     88  1.25.4.3  nathanw 
     89  1.25.4.2  nathanw /*
     90  1.25.4.2  nathanw  * functions provided to the MI code.
     91  1.25.4.2  nathanw  */
     92  1.25.4.2  nathanw 
     93  1.25.4.2  nathanw void
     94  1.25.4.2  nathanw pci_attach_hook(parent, self, pba)
     95  1.25.4.2  nathanw 	struct device *parent;
     96  1.25.4.2  nathanw 	struct device *self;
     97  1.25.4.2  nathanw 	struct pcibus_attach_args *pba;
     98  1.25.4.2  nathanw {
     99  1.25.4.2  nathanw }
    100  1.25.4.2  nathanw 
    101  1.25.4.2  nathanw int
    102  1.25.4.2  nathanw pci_bus_maxdevs(pc, busno)
    103  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    104  1.25.4.2  nathanw 	int busno;
    105  1.25.4.2  nathanw {
    106  1.25.4.2  nathanw 
    107  1.25.4.2  nathanw 	return 32;
    108  1.25.4.2  nathanw }
    109  1.25.4.2  nathanw 
    110  1.25.4.2  nathanw pcitag_t
    111  1.25.4.2  nathanw pci_make_tag(pc, b, d, f)
    112  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    113  1.25.4.2  nathanw 	int b;
    114  1.25.4.2  nathanw 	int d;
    115  1.25.4.2  nathanw 	int f;
    116  1.25.4.2  nathanw {
    117  1.25.4.2  nathanw 	struct ofw_pci_register reg;
    118  1.25.4.2  nathanw 	pcitag_t tag;
    119  1.25.4.2  nathanw 	int busrange[2];
    120  1.25.4.2  nathanw 	int node, len;
    121  1.25.4.2  nathanw #ifdef DEBUG
    122  1.25.4.2  nathanw 	char name[80];
    123  1.25.4.2  nathanw 	bzero(name, sizeof(name));
    124  1.25.4.2  nathanw #endif
    125  1.25.4.2  nathanw 
    126  1.25.4.2  nathanw 	/*
    127  1.25.4.2  nathanw 	 * Hunt for the node that corresponds to this device
    128  1.25.4.2  nathanw 	 *
    129  1.25.4.2  nathanw 	 * We could cache this info in an array in the parent
    130  1.25.4.2  nathanw 	 * device... except then we have problems with devices
    131  1.25.4.2  nathanw 	 * attached below pci-pci bridges, and we would need to
    132  1.25.4.2  nathanw 	 * add special code to the pci-pci bridge to cache this
    133  1.25.4.2  nathanw 	 * info.
    134  1.25.4.2  nathanw 	 */
    135  1.25.4.2  nathanw 
    136  1.25.4.2  nathanw 	tag = PCITAG_CREATE(-1, b, d, f);
    137  1.25.4.2  nathanw 	node = pc->rootnode;
    138  1.25.4.2  nathanw 	/*
    139  1.25.4.2  nathanw 	 * First make sure we're on the right bus.  If our parent
    140  1.25.4.2  nathanw 	 * has a bus-range property and we're not in the range,
    141  1.25.4.2  nathanw 	 * then we're obviously on the wrong bus.  So go up one
    142  1.25.4.2  nathanw 	 * level.
    143  1.25.4.2  nathanw 	 */
    144  1.25.4.2  nathanw #ifdef DEBUG
    145  1.25.4.2  nathanw 	if (sparc_pci_debug & SPDB_PROBE) {
    146  1.25.4.2  nathanw 		OF_getprop(node, "name", &name, sizeof(name));
    147  1.25.4.2  nathanw 		printf("curnode %x %s\n", node, name);
    148  1.25.4.2  nathanw 	}
    149  1.25.4.2  nathanw #endif
    150  1.25.4.2  nathanw #if 0
    151  1.25.4.2  nathanw 	while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange,
    152  1.25.4.2  nathanw 		sizeof(busrange)) == sizeof(busrange)) &&
    153  1.25.4.2  nathanw 		(b < busrange[0] || b > busrange[1])) {
    154  1.25.4.2  nathanw 		/* Out of range, go up one */
    155  1.25.4.2  nathanw 		node = OF_parent(node);
    156  1.25.4.2  nathanw #ifdef DEBUG
    157  1.25.4.2  nathanw 		if (sparc_pci_debug & SPDB_PROBE) {
    158  1.25.4.2  nathanw 			OF_getprop(node, "name", &name, sizeof(name));
    159  1.25.4.2  nathanw 			printf("going up to node %x %s\n", node, name);
    160  1.25.4.2  nathanw 		}
    161  1.25.4.2  nathanw #endif
    162  1.25.4.2  nathanw 	}
    163  1.25.4.2  nathanw #endif
    164  1.25.4.2  nathanw 	/*
    165  1.25.4.2  nathanw 	 * Now traverse all peers until we find the node or we find
    166  1.25.4.2  nathanw 	 * the right bridge.
    167  1.25.4.2  nathanw 	 *
    168  1.25.4.2  nathanw 	 * XXX We go up one and down one to make sure nobody's missed.
    169  1.25.4.2  nathanw 	 * but this should not be necessary.
    170  1.25.4.2  nathanw 	 */
    171  1.25.4.2  nathanw 	for (node = ((node)); node; node = OF_peer(node)) {
    172  1.25.4.2  nathanw 
    173  1.25.4.2  nathanw #ifdef DEBUG
    174  1.25.4.2  nathanw 		if (sparc_pci_debug & SPDB_PROBE) {
    175  1.25.4.2  nathanw 			OF_getprop(node, "name", &name, sizeof(name));
    176  1.25.4.2  nathanw 			printf("checking node %x %s\n", node, name);
    177  1.25.4.2  nathanw 		}
    178  1.25.4.2  nathanw #endif
    179  1.25.4.2  nathanw 
    180  1.25.4.2  nathanw #if 1
    181  1.25.4.2  nathanw 		/*
    182  1.25.4.2  nathanw 		 * Check for PCI-PCI bridges.  If the device we want is
    183  1.25.4.2  nathanw 		 * in the bus-range for that bridge, work our way down.
    184  1.25.4.2  nathanw 		 */
    185  1.25.4.2  nathanw 		while ((OF_getprop(node, "bus-range", (void *)&busrange,
    186  1.25.4.2  nathanw 			sizeof(busrange)) == sizeof(busrange)) &&
    187  1.25.4.2  nathanw 			(b >= busrange[0] && b <= busrange[1])) {
    188  1.25.4.2  nathanw 			/* Go down 1 level */
    189  1.25.4.2  nathanw 			node = OF_child(node);
    190  1.25.4.2  nathanw #ifdef DEBUG
    191  1.25.4.2  nathanw 			if (sparc_pci_debug & SPDB_PROBE) {
    192  1.25.4.2  nathanw 				OF_getprop(node, "name", &name, sizeof(name));
    193  1.25.4.2  nathanw 				printf("going down to node %x %s\n",
    194  1.25.4.2  nathanw 					node, name);
    195  1.25.4.2  nathanw 			}
    196  1.25.4.2  nathanw #endif
    197  1.25.4.2  nathanw 		}
    198  1.25.4.2  nathanw #endif
    199  1.25.4.2  nathanw 		/*
    200  1.25.4.2  nathanw 		 * We only really need the first `reg' property.
    201  1.25.4.2  nathanw 		 *
    202  1.25.4.2  nathanw 		 * For simplicity, we'll query the `reg' when we
    203  1.25.4.2  nathanw 		 * need it.  Otherwise we could malloc() it, but
    204  1.25.4.2  nathanw 		 * that gets more complicated.
    205  1.25.4.2  nathanw 		 */
    206  1.25.4.2  nathanw 		len = OF_getproplen(node, "reg");
    207  1.25.4.2  nathanw 		if (len < sizeof(reg))
    208  1.25.4.2  nathanw 			continue;
    209  1.25.4.2  nathanw 		if (OF_getprop(node, "reg", (void *)&reg, sizeof(reg)) != len)
    210  1.25.4.2  nathanw 			panic("pci_probe_bus: OF_getprop len botch");
    211  1.25.4.2  nathanw 
    212  1.25.4.2  nathanw 		if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi))
    213  1.25.4.2  nathanw 			continue;
    214  1.25.4.2  nathanw 		if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi))
    215  1.25.4.2  nathanw 			continue;
    216  1.25.4.2  nathanw 		if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi))
    217  1.25.4.2  nathanw 			continue;
    218  1.25.4.2  nathanw 
    219  1.25.4.2  nathanw 		/* Got a match */
    220  1.25.4.3  nathanw 		tag = ofpci_make_tag(pc, node, b, d, f);
    221  1.25.4.2  nathanw 
    222  1.25.4.2  nathanw 		return (tag);
    223  1.25.4.2  nathanw 	}
    224  1.25.4.2  nathanw 	/* No device found -- return a dead tag */
    225  1.25.4.2  nathanw 	return (tag);
    226  1.25.4.2  nathanw }
    227  1.25.4.2  nathanw 
    228  1.25.4.3  nathanw void
    229  1.25.4.3  nathanw pci_decompose_tag(pc, tag, bp, dp, fp)
    230  1.25.4.3  nathanw 	pci_chipset_tag_t pc;
    231  1.25.4.3  nathanw 	pcitag_t tag;
    232  1.25.4.3  nathanw 	int *bp, *dp, *fp;
    233  1.25.4.3  nathanw {
    234  1.25.4.3  nathanw 
    235  1.25.4.3  nathanw 	if (bp != NULL)
    236  1.25.4.3  nathanw 		*bp = PCITAG_BUS(tag);
    237  1.25.4.3  nathanw 	if (dp != NULL)
    238  1.25.4.3  nathanw 		*dp = PCITAG_DEV(tag);
    239  1.25.4.3  nathanw 	if (fp != NULL)
    240  1.25.4.3  nathanw 		*fp = PCITAG_FUN(tag);
    241  1.25.4.3  nathanw }
    242  1.25.4.3  nathanw 
    243  1.25.4.3  nathanw int
    244  1.25.4.3  nathanw pci_enumerate_bus(struct pci_softc *sc,
    245  1.25.4.3  nathanw     int (*match)(struct pci_attach_args *), struct pci_attach_args *pap)
    246  1.25.4.3  nathanw {
    247  1.25.4.3  nathanw 	struct ofw_pci_register reg;
    248  1.25.4.3  nathanw 	pci_chipset_tag_t pc = sc->sc_pc;
    249  1.25.4.3  nathanw 	pcitag_t tag;
    250  1.25.4.3  nathanw 	pcireg_t class;
    251  1.25.4.3  nathanw 	int node, b, d, f, ret;
    252  1.25.4.3  nathanw 	char name[30];
    253  1.25.4.3  nathanw 
    254  1.25.4.3  nathanw 	if (sc->sc_bridgetag)
    255  1.25.4.3  nathanw 		node = PCITAG_NODE(*sc->sc_bridgetag);
    256  1.25.4.3  nathanw 	else
    257  1.25.4.3  nathanw 		node = pc->rootnode;
    258  1.25.4.3  nathanw 
    259  1.25.4.3  nathanw 	for (node = OF_child(node); node != 0 && node != -1;
    260  1.25.4.3  nathanw 	     node = OF_peer(node)) {
    261  1.25.4.3  nathanw 		name[0] = name[29] = 0;
    262  1.25.4.3  nathanw 		OF_getprop(node, "name", name, sizeof(name));
    263  1.25.4.3  nathanw 
    264  1.25.4.3  nathanw 		if (OF_getprop(node, "class-code", &class, sizeof(class)) !=
    265  1.25.4.3  nathanw 		    sizeof(class))
    266  1.25.4.3  nathanw 			continue;
    267  1.25.4.3  nathanw 		if (OF_getprop(node, "reg", &reg, sizeof(reg)) < sizeof(reg))
    268  1.25.4.3  nathanw 			panic("pci_enumerate_bus: \"%s\" regs too small", name);
    269  1.25.4.3  nathanw 
    270  1.25.4.3  nathanw 		b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi);
    271  1.25.4.3  nathanw 		d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi);
    272  1.25.4.3  nathanw 		f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi);
    273  1.25.4.3  nathanw 
    274  1.25.4.3  nathanw 		if (sc->sc_bus != b) {
    275  1.25.4.3  nathanw 			printf("%s: WARNING: incorrect bus # for \"%s\" "
    276  1.25.4.3  nathanw 			"(%d/%d/%d)\n", sc->sc_dev.dv_xname, name, b, d, f);
    277  1.25.4.3  nathanw 			continue;
    278  1.25.4.3  nathanw 		}
    279  1.25.4.3  nathanw 
    280  1.25.4.3  nathanw 		tag = ofpci_make_tag(pc, node, b, d, f);
    281  1.25.4.3  nathanw 		ret = pci_probe_device(sc, tag, match, pap);
    282  1.25.4.3  nathanw 		if (match != NULL && ret != 0)
    283  1.25.4.3  nathanw 			return (ret);
    284  1.25.4.3  nathanw 	}
    285  1.25.4.3  nathanw 	return (0);
    286  1.25.4.3  nathanw }
    287  1.25.4.3  nathanw 
    288  1.25.4.2  nathanw /* assume we are mapped little-endian/side-effect */
    289  1.25.4.2  nathanw pcireg_t
    290  1.25.4.2  nathanw pci_conf_read(pc, tag, reg)
    291  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    292  1.25.4.2  nathanw 	pcitag_t tag;
    293  1.25.4.2  nathanw 	int reg;
    294  1.25.4.2  nathanw {
    295  1.25.4.2  nathanw 	struct psycho_pbm *pp = pc->cookie;
    296  1.25.4.2  nathanw 	struct psycho_softc *sc = pp->pp_sc;
    297  1.25.4.2  nathanw 	pcireg_t val = (pcireg_t)~0;
    298  1.25.4.2  nathanw 
    299  1.25.4.2  nathanw 	DPRINTF(SPDB_CONF, ("pci_conf_read: tag %lx reg %x ",
    300  1.25.4.2  nathanw 		(long)tag, reg));
    301  1.25.4.2  nathanw 	if (PCITAG_NODE(tag) != -1) {
    302  1.25.4.2  nathanw 		DPRINTF(SPDB_CONF, ("asi=%x addr=%qx (offset=%x) ...",
    303  1.25.4.2  nathanw 			sc->sc_configaddr._asi,
    304  1.25.4.2  nathanw 			(long long)(sc->sc_configaddr._ptr +
    305  1.25.4.2  nathanw 				PCITAG_OFFSET(tag) + reg),
    306  1.25.4.2  nathanw 			(int)PCITAG_OFFSET(tag) + reg));
    307  1.25.4.2  nathanw 
    308  1.25.4.2  nathanw 		val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr,
    309  1.25.4.2  nathanw 			PCITAG_OFFSET(tag) + reg);
    310  1.25.4.2  nathanw 	}
    311  1.25.4.2  nathanw #ifdef DEBUG
    312  1.25.4.2  nathanw 	else DPRINTF(SPDB_CONF, ("pci_conf_read: bogus pcitag %x\n",
    313  1.25.4.2  nathanw 		(int)PCITAG_OFFSET(tag)));
    314  1.25.4.2  nathanw #endif
    315  1.25.4.2  nathanw 	DPRINTF(SPDB_CONF, (" returning %08x\n", (u_int)val));
    316  1.25.4.2  nathanw 
    317  1.25.4.2  nathanw 	return (val);
    318  1.25.4.2  nathanw }
    319  1.25.4.2  nathanw 
    320  1.25.4.2  nathanw void
    321  1.25.4.2  nathanw pci_conf_write(pc, tag, reg, data)
    322  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    323  1.25.4.2  nathanw 	pcitag_t tag;
    324  1.25.4.2  nathanw 	int reg;
    325  1.25.4.2  nathanw 	pcireg_t data;
    326  1.25.4.2  nathanw {
    327  1.25.4.2  nathanw 	struct psycho_pbm *pp = pc->cookie;
    328  1.25.4.2  nathanw 	struct psycho_softc *sc = pp->pp_sc;
    329  1.25.4.2  nathanw 
    330  1.25.4.2  nathanw 	DPRINTF(SPDB_CONF, ("pci_conf_write: tag %lx; reg %x; data %x; ",
    331  1.25.4.2  nathanw 		(long)PCITAG_OFFSET(tag), reg, (int)data));
    332  1.25.4.2  nathanw 	DPRINTF(SPDB_CONF, ("asi = %x; readaddr = %qx (offset = %x)\n",
    333  1.25.4.2  nathanw 		sc->sc_configaddr._asi,
    334  1.25.4.2  nathanw 		(long long)(sc->sc_configaddr._ptr + PCITAG_OFFSET(tag) + reg),
    335  1.25.4.2  nathanw 		(int)PCITAG_OFFSET(tag) + reg));
    336  1.25.4.2  nathanw 
    337  1.25.4.2  nathanw 	/* If we don't know it, just punt it.  */
    338  1.25.4.2  nathanw 	if (PCITAG_NODE(tag) == -1) {
    339  1.25.4.2  nathanw 		DPRINTF(SPDB_CONF, ("pci_conf_write: bad addr"));
    340  1.25.4.2  nathanw 		return;
    341  1.25.4.2  nathanw 	}
    342  1.25.4.2  nathanw 
    343  1.25.4.2  nathanw 	bus_space_write_4(sc->sc_configtag, sc->sc_configaddr,
    344  1.25.4.2  nathanw 		PCITAG_OFFSET(tag) + reg, data);
    345  1.25.4.2  nathanw }
    346  1.25.4.2  nathanw 
    347  1.25.4.2  nathanw /*
    348  1.25.4.2  nathanw  * interrupt mapping foo.
    349  1.25.4.2  nathanw  * XXX: how does this deal with multiple interrupts for a device?
    350  1.25.4.2  nathanw  */
    351  1.25.4.2  nathanw int
    352  1.25.4.2  nathanw pci_intr_map(pa, ihp)
    353  1.25.4.2  nathanw 	struct pci_attach_args *pa;
    354  1.25.4.2  nathanw 	pci_intr_handle_t *ihp;
    355  1.25.4.2  nathanw {
    356  1.25.4.2  nathanw 	pcitag_t tag = pa->pa_tag;
    357  1.25.4.2  nathanw 	int interrupts;
    358  1.25.4.2  nathanw 	int len, node = PCITAG_NODE(tag);
    359  1.25.4.2  nathanw 	char devtype[30];
    360  1.25.4.2  nathanw 
    361  1.25.4.2  nathanw 	len = OF_getproplen(node, "interrupts");
    362  1.25.4.2  nathanw 	if (len < sizeof(interrupts)) {
    363  1.25.4.2  nathanw 		DPRINTF(SPDB_INTMAP,
    364  1.25.4.2  nathanw 			("pci_intr_map: interrupts len %d too small\n", len));
    365  1.25.4.2  nathanw 		return (ENODEV);
    366  1.25.4.2  nathanw 	}
    367  1.25.4.2  nathanw 	if (OF_getprop(node, "interrupts", (void *)&interrupts,
    368  1.25.4.2  nathanw 		sizeof(interrupts)) != len) {
    369  1.25.4.2  nathanw 		DPRINTF(SPDB_INTMAP,
    370  1.25.4.2  nathanw 			("pci_intr_map: could not read interrupts\n"));
    371  1.25.4.2  nathanw 		return (ENODEV);
    372  1.25.4.2  nathanw 	}
    373  1.25.4.2  nathanw 
    374  1.25.4.2  nathanw 	if (OF_mapintr(node, &interrupts, sizeof(interrupts),
    375  1.25.4.2  nathanw 		sizeof(interrupts)) < 0) {
    376  1.25.4.2  nathanw 		printf("OF_mapintr failed\n");
    377  1.25.4.2  nathanw 	}
    378  1.25.4.2  nathanw 	/* Try to find an IPL for this type of device. */
    379  1.25.4.2  nathanw 	if (OF_getprop(node, "device_type", &devtype, sizeof(devtype)) > 0) {
    380  1.25.4.2  nathanw 		for (len = 0;  intrmap[len].in_class; len++)
    381  1.25.4.2  nathanw 			if (strcmp(intrmap[len].in_class, devtype) == 0) {
    382  1.25.4.2  nathanw 				interrupts |= INTLEVENCODE(intrmap[len].in_lev);
    383  1.25.4.2  nathanw 				break;
    384  1.25.4.2  nathanw 			}
    385  1.25.4.2  nathanw 	}
    386  1.25.4.2  nathanw 
    387  1.25.4.2  nathanw 	/* XXXX -- we use the ino.  What if there is a valid IGN? */
    388  1.25.4.2  nathanw 	*ihp = interrupts;
    389  1.25.4.2  nathanw 	return (0);
    390  1.25.4.2  nathanw }
    391  1.25.4.2  nathanw 
    392  1.25.4.2  nathanw const char *
    393  1.25.4.2  nathanw pci_intr_string(pc, ih)
    394  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    395  1.25.4.2  nathanw 	pci_intr_handle_t ih;
    396  1.25.4.2  nathanw {
    397  1.25.4.2  nathanw 	static char str[16];
    398  1.25.4.2  nathanw 
    399  1.25.4.2  nathanw 	DPRINTF(SPDB_INTR, ("pci_intr_string: ih %u", ih));
    400  1.25.4.2  nathanw 	sprintf(str, "ivec %x", ih);
    401  1.25.4.2  nathanw 	DPRINTF(SPDB_INTR, ("; returning %s\n", str));
    402  1.25.4.2  nathanw 
    403  1.25.4.2  nathanw 	return (str);
    404  1.25.4.2  nathanw }
    405  1.25.4.2  nathanw 
    406  1.25.4.2  nathanw const struct evcnt *
    407  1.25.4.2  nathanw pci_intr_evcnt(pc, ih)
    408  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    409  1.25.4.2  nathanw 	pci_intr_handle_t ih;
    410  1.25.4.2  nathanw {
    411  1.25.4.2  nathanw 
    412  1.25.4.2  nathanw 	/* XXX for now, no evcnt parent reported */
    413  1.25.4.2  nathanw 	return NULL;
    414  1.25.4.2  nathanw }
    415  1.25.4.2  nathanw 
    416  1.25.4.2  nathanw void *
    417  1.25.4.2  nathanw pci_intr_establish(pc, ih, level, func, arg)
    418  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    419  1.25.4.2  nathanw 	pci_intr_handle_t ih;
    420  1.25.4.2  nathanw 	int level;
    421  1.25.4.2  nathanw 	int (*func) __P((void *));
    422  1.25.4.2  nathanw 	void *arg;
    423  1.25.4.2  nathanw {
    424  1.25.4.2  nathanw 	void *cookie;
    425  1.25.4.2  nathanw 	struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie;
    426  1.25.4.2  nathanw 
    427  1.25.4.2  nathanw 	DPRINTF(SPDB_INTR, ("pci_intr_establish: ih %lu; level %d", (u_long)ih, level));
    428  1.25.4.2  nathanw 	cookie = bus_intr_establish(pp->pp_memt, ih, level, 0, func, arg);
    429  1.25.4.2  nathanw 
    430  1.25.4.2  nathanw 	DPRINTF(SPDB_INTR, ("; returning handle %p\n", cookie));
    431  1.25.4.2  nathanw 	return (cookie);
    432  1.25.4.2  nathanw }
    433  1.25.4.2  nathanw 
    434  1.25.4.2  nathanw void
    435  1.25.4.2  nathanw pci_intr_disestablish(pc, cookie)
    436  1.25.4.2  nathanw 	pci_chipset_tag_t pc;
    437  1.25.4.2  nathanw 	void *cookie;
    438  1.25.4.2  nathanw {
    439  1.25.4.2  nathanw 
    440  1.25.4.2  nathanw 	DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie));
    441  1.25.4.2  nathanw 
    442  1.25.4.2  nathanw 	/* XXX */
    443  1.25.4.2  nathanw 	panic("can't disestablish PCI interrupts yet");
    444  1.25.4.2  nathanw }
    445