pci_machdep.c revision 1.26 1 1.26 eeh /* $NetBSD: pci_machdep.c,v 1.26 2002/03/20 18:54:47 eeh Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.5 mrg * Copyright (c) 1999, 2000 Matthew R. Green
5 1.1 mrg * All rights reserved.
6 1.1 mrg *
7 1.1 mrg * Redistribution and use in source and binary forms, with or without
8 1.1 mrg * modification, are permitted provided that the following conditions
9 1.1 mrg * are met:
10 1.1 mrg * 1. Redistributions of source code must retain the above copyright
11 1.1 mrg * notice, this list of conditions and the following disclaimer.
12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 mrg * notice, this list of conditions and the following disclaimer in the
14 1.1 mrg * documentation and/or other materials provided with the distribution.
15 1.1 mrg * 3. The name of the author may not be used to endorse or promote products
16 1.1 mrg * derived from this software without specific prior written permission.
17 1.1 mrg *
18 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 mrg * SUCH DAMAGE.
29 1.1 mrg */
30 1.1 mrg
31 1.1 mrg /*
32 1.1 mrg * functions expected by the MI PCI code.
33 1.1 mrg */
34 1.1 mrg
35 1.1 mrg #ifdef DEBUG
36 1.1 mrg #define SPDB_CONF 0x01
37 1.1 mrg #define SPDB_INTR 0x04
38 1.1 mrg #define SPDB_INTMAP 0x08
39 1.1 mrg #define SPDB_INTFIX 0x10
40 1.22 eeh #define SPDB_PROBE 0x20
41 1.4 mrg int sparc_pci_debug = 0x0;
42 1.1 mrg #define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0)
43 1.1 mrg #else
44 1.1 mrg #define DPRINTF(l, s)
45 1.1 mrg #endif
46 1.1 mrg
47 1.1 mrg #include <sys/types.h>
48 1.1 mrg #include <sys/param.h>
49 1.1 mrg #include <sys/time.h>
50 1.1 mrg #include <sys/systm.h>
51 1.1 mrg #include <sys/errno.h>
52 1.1 mrg #include <sys/device.h>
53 1.1 mrg #include <sys/malloc.h>
54 1.1 mrg
55 1.1 mrg #define _SPARC_BUS_DMA_PRIVATE
56 1.1 mrg #include <machine/bus.h>
57 1.1 mrg #include <machine/autoconf.h>
58 1.22 eeh #include <machine/openfirm.h>
59 1.1 mrg
60 1.1 mrg #include <dev/pci/pcivar.h>
61 1.1 mrg #include <dev/pci/pcireg.h>
62 1.1 mrg
63 1.19 mrg #include <dev/ofw/ofw_pci.h>
64 1.19 mrg
65 1.1 mrg #include <sparc64/dev/iommureg.h>
66 1.1 mrg #include <sparc64/dev/iommuvar.h>
67 1.1 mrg #include <sparc64/dev/psychoreg.h>
68 1.1 mrg #include <sparc64/dev/psychovar.h>
69 1.1 mrg
70 1.1 mrg /* this is a base to be copied */
71 1.1 mrg struct sparc_pci_chipset _sparc_pci_chipset = {
72 1.1 mrg NULL,
73 1.1 mrg };
74 1.2 mrg
75 1.1 mrg /*
76 1.1 mrg * functions provided to the MI code.
77 1.1 mrg */
78 1.1 mrg
79 1.1 mrg void
80 1.1 mrg pci_attach_hook(parent, self, pba)
81 1.1 mrg struct device *parent;
82 1.1 mrg struct device *self;
83 1.1 mrg struct pcibus_attach_args *pba;
84 1.1 mrg {
85 1.22 eeh /* Don't do nothing */
86 1.1 mrg }
87 1.1 mrg
88 1.1 mrg int
89 1.1 mrg pci_bus_maxdevs(pc, busno)
90 1.1 mrg pci_chipset_tag_t pc;
91 1.1 mrg int busno;
92 1.1 mrg {
93 1.1 mrg
94 1.1 mrg return 32;
95 1.1 mrg }
96 1.19 mrg
97 1.19 mrg #ifdef __PCI_BUS_DEVORDER
98 1.19 mrg int
99 1.19 mrg pci_bus_devorder(pc, busno, devs)
100 1.19 mrg pci_chipset_tag_t pc;
101 1.19 mrg int busno;
102 1.19 mrg char *devs;
103 1.19 mrg {
104 1.22 eeh struct ofw_pci_register reg;
105 1.19 mrg int node, len, device, i = 0;
106 1.19 mrg u_int32_t done = 0;
107 1.22 eeh #ifdef DEBUG
108 1.22 eeh char name[80];
109 1.22 eeh #endif
110 1.19 mrg
111 1.22 eeh node = pc->curnode;
112 1.22 eeh #ifdef DEBUG
113 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
114 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
115 1.22 eeh printf("pci_bus_devorder: curnode %x %s\n", node, name);
116 1.22 eeh }
117 1.22 eeh #endif
118 1.22 eeh /*
119 1.22 eeh * Initially, curnode is the root of the pci tree. As we
120 1.22 eeh * attach bridges, curnode should be set to that of the bridge.
121 1.22 eeh */
122 1.22 eeh for (node = OF_child(node); node; node = OF_peer(node)) {
123 1.19 mrg len = OF_getproplen(node, "reg");
124 1.22 eeh if (len < sizeof(reg))
125 1.19 mrg continue;
126 1.22 eeh if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len)
127 1.19 mrg panic("pci_probe_bus: OF_getprop len botch");
128 1.19 mrg
129 1.22 eeh device = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi);
130 1.19 mrg
131 1.19 mrg if (done & (1 << device))
132 1.19 mrg continue;
133 1.19 mrg
134 1.19 mrg devs[i++] = device;
135 1.19 mrg done |= 1 << device;
136 1.22 eeh #ifdef DEBUG
137 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
138 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
139 1.22 eeh printf("pci_bus_devorder: adding %x %s\n", node, name);
140 1.22 eeh }
141 1.22 eeh #endif
142 1.19 mrg if (i == 32)
143 1.19 mrg break;
144 1.19 mrg }
145 1.19 mrg if (i < 32)
146 1.19 mrg devs[i] = -1;
147 1.19 mrg
148 1.19 mrg return i;
149 1.19 mrg }
150 1.19 mrg #endif
151 1.19 mrg
152 1.19 mrg #ifdef __PCI_DEV_FUNCORDER
153 1.19 mrg int
154 1.19 mrg pci_dev_funcorder(pc, busno, device, funcs)
155 1.19 mrg pci_chipset_tag_t pc;
156 1.19 mrg int busno;
157 1.19 mrg int device;
158 1.19 mrg char *funcs;
159 1.19 mrg {
160 1.22 eeh struct ofw_pci_register reg;
161 1.19 mrg int node, len, i = 0;
162 1.22 eeh #ifdef DEBUG
163 1.22 eeh char name[80];
164 1.22 eeh #endif
165 1.19 mrg
166 1.22 eeh node = pc->curnode;
167 1.22 eeh #ifdef DEBUG
168 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
169 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
170 1.22 eeh printf("pci_bus_funcorder: curnode %x %s\n", node, name);
171 1.22 eeh }
172 1.22 eeh #endif
173 1.22 eeh /*
174 1.25 thorpej * Initially, curnode is the root of the pci tree. As we
175 1.25 thorpej * attach bridges, curnode should be set to that of the bridge.
176 1.25 thorpej *
177 1.25 thorpej * Note this search is almost exactly the same as pci_bus_devorder()'s,
178 1.25 thorpej * except that we limit the search to only those with a matching
179 1.25 thorpej * "device" number.
180 1.22 eeh */
181 1.25 thorpej for (node = OF_child(node); node; node = OF_peer(node)) {
182 1.19 mrg len = OF_getproplen(node, "reg");
183 1.22 eeh if (len < sizeof(reg))
184 1.19 mrg continue;
185 1.22 eeh if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len)
186 1.19 mrg panic("pci_probe_bus: OF_getprop len botch");
187 1.19 mrg
188 1.22 eeh if (device != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi))
189 1.19 mrg continue;
190 1.19 mrg
191 1.22 eeh funcs[i++] = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi);
192 1.22 eeh #ifdef DEBUG
193 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
194 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
195 1.22 eeh printf("pci_bus_funcorder: adding %x %s\n", node, name);
196 1.22 eeh }
197 1.22 eeh #endif
198 1.19 mrg if (i == 8)
199 1.19 mrg break;
200 1.19 mrg }
201 1.19 mrg if (i < 8)
202 1.19 mrg funcs[i] = -1;
203 1.19 mrg
204 1.19 mrg return i;
205 1.19 mrg }
206 1.19 mrg #endif
207 1.1 mrg
208 1.1 mrg pcitag_t
209 1.1 mrg pci_make_tag(pc, b, d, f)
210 1.1 mrg pci_chipset_tag_t pc;
211 1.1 mrg int b;
212 1.1 mrg int d;
213 1.1 mrg int f;
214 1.1 mrg {
215 1.22 eeh struct ofw_pci_register reg;
216 1.22 eeh pcitag_t tag;
217 1.22 eeh int busrange[2];
218 1.22 eeh int node, len;
219 1.22 eeh #ifdef DEBUG
220 1.22 eeh char name[80];
221 1.22 eeh bzero(name, sizeof(name));
222 1.22 eeh #endif
223 1.1 mrg
224 1.22 eeh /*
225 1.22 eeh * Hunt for the node that corresponds to this device
226 1.22 eeh *
227 1.22 eeh * We could cache this info in an array in the parent
228 1.22 eeh * device... except then we have problems with devices
229 1.22 eeh * attached below pci-pci bridges, and we would need to
230 1.22 eeh * add special code to the pci-pci bridge to cache this
231 1.22 eeh * info.
232 1.22 eeh */
233 1.1 mrg
234 1.22 eeh tag = PCITAG_CREATE(-1, b, d, f);
235 1.22 eeh node = pc->rootnode;
236 1.22 eeh /*
237 1.22 eeh * First make sure we're on the right bus. If our parent
238 1.22 eeh * has a bus-range property and we're not in the range,
239 1.22 eeh * then we're obviously on the wrong bus. So go up one
240 1.22 eeh * level.
241 1.22 eeh */
242 1.22 eeh #ifdef DEBUG
243 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
244 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
245 1.22 eeh printf("curnode %x %s\n", node, name);
246 1.22 eeh }
247 1.22 eeh #endif
248 1.22 eeh #if 0
249 1.22 eeh while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange,
250 1.22 eeh sizeof(busrange)) == sizeof(busrange)) &&
251 1.22 eeh (b < busrange[0] || b > busrange[1])) {
252 1.22 eeh /* Out of range, go up one */
253 1.22 eeh node = OF_parent(node);
254 1.22 eeh #ifdef DEBUG
255 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
256 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
257 1.22 eeh printf("going up to node %x %s\n", node, name);
258 1.22 eeh }
259 1.22 eeh #endif
260 1.22 eeh }
261 1.22 eeh #endif
262 1.22 eeh /*
263 1.22 eeh * Now traverse all peers until we find the node or we find
264 1.22 eeh * the right bridge.
265 1.22 eeh *
266 1.22 eeh * XXX We go up one and down one to make sure nobody's missed.
267 1.22 eeh * but this should not be necessary.
268 1.22 eeh */
269 1.22 eeh for (node = ((node)); node; node = OF_peer(node)) {
270 1.1 mrg
271 1.22 eeh #ifdef DEBUG
272 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
273 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
274 1.22 eeh printf("checking node %x %s\n", node, name);
275 1.22 eeh }
276 1.22 eeh #endif
277 1.1 mrg
278 1.22 eeh #if 1
279 1.1 mrg /*
280 1.22 eeh * Check for PCI-PCI bridges. If the device we want is
281 1.22 eeh * in the bus-range for that bridge, work our way down.
282 1.1 mrg */
283 1.22 eeh while ((OF_getprop(node, "bus-range", (void *)&busrange,
284 1.22 eeh sizeof(busrange)) == sizeof(busrange)) &&
285 1.22 eeh (b >= busrange[0] && b <= busrange[1])) {
286 1.22 eeh /* Go down 1 level */
287 1.22 eeh node = OF_child(node);
288 1.22 eeh #ifdef DEBUG
289 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
290 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
291 1.22 eeh printf("going down to node %x %s\n",
292 1.22 eeh node, name);
293 1.22 eeh }
294 1.22 eeh #endif
295 1.1 mrg }
296 1.22 eeh #endif
297 1.22 eeh /*
298 1.22 eeh * We only really need the first `reg' property.
299 1.22 eeh *
300 1.22 eeh * For simplicity, we'll query the `reg' when we
301 1.22 eeh * need it. Otherwise we could malloc() it, but
302 1.22 eeh * that gets more complicated.
303 1.22 eeh */
304 1.22 eeh len = OF_getproplen(node, "reg");
305 1.22 eeh if (len < sizeof(reg))
306 1.22 eeh continue;
307 1.22 eeh if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len)
308 1.22 eeh panic("pci_probe_bus: OF_getprop len botch");
309 1.22 eeh
310 1.22 eeh if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi))
311 1.22 eeh continue;
312 1.22 eeh if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi))
313 1.22 eeh continue;
314 1.22 eeh if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi))
315 1.22 eeh continue;
316 1.22 eeh
317 1.22 eeh /* Got a match */
318 1.22 eeh tag = PCITAG_CREATE(node, b, d, f);
319 1.22 eeh
320 1.1 mrg /*
321 1.22 eeh * Record the node. This has two effects:
322 1.22 eeh *
323 1.22 eeh * 1) We don't have to search as far.
324 1.22 eeh * 2) pci_bus_devorder will scan the right bus.
325 1.1 mrg */
326 1.22 eeh pc->curnode = node;
327 1.22 eeh
328 1.22 eeh /* Enable all the different spaces for this device */
329 1.22 eeh pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
330 1.22 eeh PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE|
331 1.22 eeh PCI_COMMAND_IO_ENABLE);
332 1.22 eeh DPRINTF(SPDB_PROBE, ("found node %x %s\n", node, name));
333 1.22 eeh return (tag);
334 1.1 mrg }
335 1.22 eeh /* No device found -- return a dead tag */
336 1.22 eeh return (tag);
337 1.1 mrg }
338 1.1 mrg
339 1.1 mrg /* assume we are mapped little-endian/side-effect */
340 1.1 mrg pcireg_t
341 1.1 mrg pci_conf_read(pc, tag, reg)
342 1.1 mrg pci_chipset_tag_t pc;
343 1.1 mrg pcitag_t tag;
344 1.1 mrg int reg;
345 1.1 mrg {
346 1.1 mrg struct psycho_pbm *pp = pc->cookie;
347 1.1 mrg struct psycho_softc *sc = pp->pp_sc;
348 1.22 eeh pcireg_t val = (pcireg_t)~0;
349 1.22 eeh
350 1.22 eeh DPRINTF(SPDB_CONF, ("pci_conf_read: tag %lx reg %x ",
351 1.22 eeh (long)tag, reg));
352 1.22 eeh if (PCITAG_NODE(tag) != -1) {
353 1.22 eeh DPRINTF(SPDB_CONF, ("asi=%x addr=%qx (offset=%x) ...",
354 1.26 eeh sc->sc_configaddr._asi,
355 1.26 eeh (long long)(sc->sc_configaddr._ptr +
356 1.22 eeh PCITAG_OFFSET(tag) + reg),
357 1.22 eeh (int)PCITAG_OFFSET(tag) + reg));
358 1.1 mrg
359 1.1 mrg val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr,
360 1.22 eeh PCITAG_OFFSET(tag) + reg);
361 1.1 mrg }
362 1.22 eeh #ifdef DEBUG
363 1.24 mrg else DPRINTF(SPDB_CONF, ("pci_conf_read: bogus pcitag %x\n",
364 1.24 mrg (int)PCITAG_OFFSET(tag)));
365 1.22 eeh #endif
366 1.1 mrg DPRINTF(SPDB_CONF, (" returning %08x\n", (u_int)val));
367 1.1 mrg
368 1.1 mrg return (val);
369 1.1 mrg }
370 1.1 mrg
371 1.1 mrg void
372 1.1 mrg pci_conf_write(pc, tag, reg, data)
373 1.1 mrg pci_chipset_tag_t pc;
374 1.1 mrg pcitag_t tag;
375 1.1 mrg int reg;
376 1.1 mrg pcireg_t data;
377 1.1 mrg {
378 1.1 mrg struct psycho_pbm *pp = pc->cookie;
379 1.1 mrg struct psycho_softc *sc = pp->pp_sc;
380 1.1 mrg
381 1.22 eeh DPRINTF(SPDB_CONF, ("pci_conf_write: tag %lx; reg %x; data %x; ",
382 1.22 eeh (long)PCITAG_OFFSET(tag), reg, (int)data));
383 1.1 mrg DPRINTF(SPDB_CONF, ("asi = %x; readaddr = %qx (offset = %x)\n",
384 1.26 eeh sc->sc_configaddr._asi,
385 1.26 eeh (long long)(sc->sc_configaddr._ptr + PCITAG_OFFSET(tag) + reg),
386 1.22 eeh (int)PCITAG_OFFSET(tag) + reg));
387 1.1 mrg
388 1.24 mrg /* If we don't know it, just punt it. */
389 1.24 mrg if (PCITAG_NODE(tag) == -1) {
390 1.24 mrg DPRINTF(SPDB_CONF, ("pci_conf_write: bad addr"));
391 1.24 mrg return;
392 1.24 mrg }
393 1.1 mrg
394 1.22 eeh bus_space_write_4(sc->sc_configtag, sc->sc_configaddr,
395 1.22 eeh PCITAG_OFFSET(tag) + reg, data);
396 1.1 mrg }
397 1.1 mrg
398 1.1 mrg /*
399 1.1 mrg * interrupt mapping foo.
400 1.20 mrg * XXX: how does this deal with multiple interrupts for a device?
401 1.1 mrg */
402 1.1 mrg int
403 1.16 sommerfe pci_intr_map(pa, ihp)
404 1.16 sommerfe struct pci_attach_args *pa;
405 1.1 mrg pci_intr_handle_t *ihp;
406 1.1 mrg {
407 1.22 eeh pcitag_t tag = pa->pa_tag;
408 1.22 eeh int interrupts;
409 1.22 eeh int len, node = PCITAG_NODE(tag);
410 1.22 eeh char devtype[30];
411 1.22 eeh
412 1.22 eeh len = OF_getproplen(node, "interrupts");
413 1.22 eeh if (len < sizeof(interrupts)) {
414 1.22 eeh DPRINTF(SPDB_INTMAP,
415 1.22 eeh ("pci_intr_map: interrupts len %d too small\n", len));
416 1.22 eeh return (ENODEV);
417 1.22 eeh }
418 1.22 eeh if (OF_getprop(node, "interrupts", (void *)&interrupts,
419 1.22 eeh sizeof(interrupts)) != len) {
420 1.22 eeh DPRINTF(SPDB_INTMAP,
421 1.22 eeh ("pci_intr_map: could not read interrupts\n"));
422 1.22 eeh return (ENODEV);
423 1.22 eeh }
424 1.20 mrg
425 1.22 eeh if (OF_mapintr(node, &interrupts, sizeof(interrupts),
426 1.23 eeh sizeof(interrupts)) < 0) {
427 1.22 eeh printf("OF_mapintr failed\n");
428 1.22 eeh }
429 1.22 eeh /* Try to find an IPL for this type of device. */
430 1.22 eeh if (OF_getprop(node, "device_type", &devtype, sizeof(devtype)) > 0) {
431 1.22 eeh for (len = 0; intrmap[len].in_class; len++)
432 1.22 eeh if (strcmp(intrmap[len].in_class, devtype) == 0) {
433 1.22 eeh interrupts |= INTLEVENCODE(intrmap[len].in_lev);
434 1.22 eeh break;
435 1.22 eeh }
436 1.22 eeh }
437 1.20 mrg
438 1.22 eeh /* XXXX -- we use the ino. What if there is a valid IGN? */
439 1.22 eeh *ihp = interrupts;
440 1.22 eeh return (0);
441 1.1 mrg }
442 1.1 mrg
443 1.1 mrg const char *
444 1.1 mrg pci_intr_string(pc, ih)
445 1.1 mrg pci_chipset_tag_t pc;
446 1.1 mrg pci_intr_handle_t ih;
447 1.1 mrg {
448 1.1 mrg static char str[16];
449 1.1 mrg
450 1.1 mrg DPRINTF(SPDB_INTR, ("pci_intr_string: ih %u", ih));
451 1.22 eeh sprintf(str, "ivec %x", ih);
452 1.1 mrg DPRINTF(SPDB_INTR, ("; returning %s\n", str));
453 1.1 mrg
454 1.1 mrg return (str);
455 1.8 cgd }
456 1.8 cgd
457 1.8 cgd const struct evcnt *
458 1.8 cgd pci_intr_evcnt(pc, ih)
459 1.8 cgd pci_chipset_tag_t pc;
460 1.8 cgd pci_intr_handle_t ih;
461 1.8 cgd {
462 1.8 cgd
463 1.8 cgd /* XXX for now, no evcnt parent reported */
464 1.8 cgd return NULL;
465 1.1 mrg }
466 1.1 mrg
467 1.1 mrg void *
468 1.1 mrg pci_intr_establish(pc, ih, level, func, arg)
469 1.1 mrg pci_chipset_tag_t pc;
470 1.1 mrg pci_intr_handle_t ih;
471 1.1 mrg int level;
472 1.1 mrg int (*func) __P((void *));
473 1.1 mrg void *arg;
474 1.1 mrg {
475 1.1 mrg void *cookie;
476 1.1 mrg struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie;
477 1.1 mrg
478 1.1 mrg DPRINTF(SPDB_INTR, ("pci_intr_establish: ih %lu; level %d", (u_long)ih, level));
479 1.13 pk cookie = bus_intr_establish(pp->pp_memt, ih, level, 0, func, arg);
480 1.1 mrg
481 1.1 mrg DPRINTF(SPDB_INTR, ("; returning handle %p\n", cookie));
482 1.1 mrg return (cookie);
483 1.1 mrg }
484 1.1 mrg
485 1.1 mrg void
486 1.1 mrg pci_intr_disestablish(pc, cookie)
487 1.1 mrg pci_chipset_tag_t pc;
488 1.1 mrg void *cookie;
489 1.1 mrg {
490 1.1 mrg
491 1.1 mrg DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie));
492 1.1 mrg
493 1.1 mrg /* XXX */
494 1.1 mrg panic("can't disestablish PCI interrupts yet");
495 1.1 mrg }
496