pci_machdep.c revision 1.29 1 1.29 thorpej /* $NetBSD: pci_machdep.c,v 1.29 2002/05/15 18:37:55 thorpej Exp $ */
2 1.1 mrg
3 1.1 mrg /*
4 1.5 mrg * Copyright (c) 1999, 2000 Matthew R. Green
5 1.1 mrg * All rights reserved.
6 1.1 mrg *
7 1.1 mrg * Redistribution and use in source and binary forms, with or without
8 1.1 mrg * modification, are permitted provided that the following conditions
9 1.1 mrg * are met:
10 1.1 mrg * 1. Redistributions of source code must retain the above copyright
11 1.1 mrg * notice, this list of conditions and the following disclaimer.
12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 mrg * notice, this list of conditions and the following disclaimer in the
14 1.1 mrg * documentation and/or other materials provided with the distribution.
15 1.1 mrg * 3. The name of the author may not be used to endorse or promote products
16 1.1 mrg * derived from this software without specific prior written permission.
17 1.1 mrg *
18 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 mrg * SUCH DAMAGE.
29 1.1 mrg */
30 1.1 mrg
31 1.1 mrg /*
32 1.1 mrg * functions expected by the MI PCI code.
33 1.1 mrg */
34 1.1 mrg
35 1.1 mrg #ifdef DEBUG
36 1.1 mrg #define SPDB_CONF 0x01
37 1.1 mrg #define SPDB_INTR 0x04
38 1.1 mrg #define SPDB_INTMAP 0x08
39 1.1 mrg #define SPDB_INTFIX 0x10
40 1.22 eeh #define SPDB_PROBE 0x20
41 1.4 mrg int sparc_pci_debug = 0x0;
42 1.1 mrg #define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0)
43 1.1 mrg #else
44 1.1 mrg #define DPRINTF(l, s)
45 1.1 mrg #endif
46 1.1 mrg
47 1.1 mrg #include <sys/types.h>
48 1.1 mrg #include <sys/param.h>
49 1.1 mrg #include <sys/time.h>
50 1.1 mrg #include <sys/systm.h>
51 1.1 mrg #include <sys/errno.h>
52 1.1 mrg #include <sys/device.h>
53 1.1 mrg #include <sys/malloc.h>
54 1.1 mrg
55 1.1 mrg #define _SPARC_BUS_DMA_PRIVATE
56 1.1 mrg #include <machine/bus.h>
57 1.1 mrg #include <machine/autoconf.h>
58 1.22 eeh #include <machine/openfirm.h>
59 1.1 mrg
60 1.1 mrg #include <dev/pci/pcivar.h>
61 1.1 mrg #include <dev/pci/pcireg.h>
62 1.1 mrg
63 1.19 mrg #include <dev/ofw/ofw_pci.h>
64 1.19 mrg
65 1.27 eeh #include <sparc64/dev/ofpcivar.h>
66 1.27 eeh
67 1.1 mrg #include <sparc64/dev/iommureg.h>
68 1.1 mrg #include <sparc64/dev/iommuvar.h>
69 1.1 mrg #include <sparc64/dev/psychoreg.h>
70 1.1 mrg #include <sparc64/dev/psychovar.h>
71 1.1 mrg
72 1.1 mrg /* this is a base to be copied */
73 1.1 mrg struct sparc_pci_chipset _sparc_pci_chipset = {
74 1.1 mrg NULL,
75 1.1 mrg };
76 1.2 mrg
77 1.1 mrg /*
78 1.1 mrg * functions provided to the MI code.
79 1.1 mrg */
80 1.1 mrg
81 1.1 mrg void
82 1.1 mrg pci_attach_hook(parent, self, pba)
83 1.1 mrg struct device *parent;
84 1.1 mrg struct device *self;
85 1.1 mrg struct pcibus_attach_args *pba;
86 1.1 mrg {
87 1.22 eeh /* Don't do nothing */
88 1.1 mrg }
89 1.1 mrg
90 1.1 mrg int
91 1.1 mrg pci_bus_maxdevs(pc, busno)
92 1.1 mrg pci_chipset_tag_t pc;
93 1.1 mrg int busno;
94 1.1 mrg {
95 1.1 mrg
96 1.1 mrg return 32;
97 1.1 mrg }
98 1.19 mrg
99 1.19 mrg #ifdef __PCI_BUS_DEVORDER
100 1.19 mrg int
101 1.19 mrg pci_bus_devorder(pc, busno, devs)
102 1.19 mrg pci_chipset_tag_t pc;
103 1.19 mrg int busno;
104 1.19 mrg char *devs;
105 1.19 mrg {
106 1.22 eeh struct ofw_pci_register reg;
107 1.19 mrg int node, len, device, i = 0;
108 1.19 mrg u_int32_t done = 0;
109 1.22 eeh #ifdef DEBUG
110 1.22 eeh char name[80];
111 1.22 eeh #endif
112 1.19 mrg
113 1.22 eeh node = pc->curnode;
114 1.22 eeh #ifdef DEBUG
115 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
116 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
117 1.22 eeh printf("pci_bus_devorder: curnode %x %s\n", node, name);
118 1.22 eeh }
119 1.22 eeh #endif
120 1.22 eeh /*
121 1.22 eeh * Initially, curnode is the root of the pci tree. As we
122 1.22 eeh * attach bridges, curnode should be set to that of the bridge.
123 1.22 eeh */
124 1.22 eeh for (node = OF_child(node); node; node = OF_peer(node)) {
125 1.19 mrg len = OF_getproplen(node, "reg");
126 1.22 eeh if (len < sizeof(reg))
127 1.19 mrg continue;
128 1.22 eeh if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len)
129 1.19 mrg panic("pci_probe_bus: OF_getprop len botch");
130 1.19 mrg
131 1.22 eeh device = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi);
132 1.19 mrg
133 1.19 mrg if (done & (1 << device))
134 1.19 mrg continue;
135 1.19 mrg
136 1.19 mrg devs[i++] = device;
137 1.19 mrg done |= 1 << device;
138 1.22 eeh #ifdef DEBUG
139 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
140 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
141 1.22 eeh printf("pci_bus_devorder: adding %x %s\n", node, name);
142 1.22 eeh }
143 1.22 eeh #endif
144 1.19 mrg if (i == 32)
145 1.19 mrg break;
146 1.19 mrg }
147 1.19 mrg if (i < 32)
148 1.19 mrg devs[i] = -1;
149 1.19 mrg
150 1.19 mrg return i;
151 1.19 mrg }
152 1.19 mrg #endif
153 1.1 mrg
154 1.1 mrg pcitag_t
155 1.1 mrg pci_make_tag(pc, b, d, f)
156 1.1 mrg pci_chipset_tag_t pc;
157 1.1 mrg int b;
158 1.1 mrg int d;
159 1.1 mrg int f;
160 1.1 mrg {
161 1.22 eeh struct ofw_pci_register reg;
162 1.22 eeh pcitag_t tag;
163 1.22 eeh int busrange[2];
164 1.22 eeh int node, len;
165 1.22 eeh #ifdef DEBUG
166 1.22 eeh char name[80];
167 1.22 eeh bzero(name, sizeof(name));
168 1.22 eeh #endif
169 1.1 mrg
170 1.22 eeh /*
171 1.22 eeh * Hunt for the node that corresponds to this device
172 1.22 eeh *
173 1.22 eeh * We could cache this info in an array in the parent
174 1.22 eeh * device... except then we have problems with devices
175 1.22 eeh * attached below pci-pci bridges, and we would need to
176 1.22 eeh * add special code to the pci-pci bridge to cache this
177 1.22 eeh * info.
178 1.22 eeh */
179 1.1 mrg
180 1.22 eeh tag = PCITAG_CREATE(-1, b, d, f);
181 1.22 eeh node = pc->rootnode;
182 1.22 eeh /*
183 1.22 eeh * First make sure we're on the right bus. If our parent
184 1.22 eeh * has a bus-range property and we're not in the range,
185 1.22 eeh * then we're obviously on the wrong bus. So go up one
186 1.22 eeh * level.
187 1.22 eeh */
188 1.22 eeh #ifdef DEBUG
189 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
190 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
191 1.22 eeh printf("curnode %x %s\n", node, name);
192 1.22 eeh }
193 1.22 eeh #endif
194 1.22 eeh #if 0
195 1.22 eeh while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange,
196 1.22 eeh sizeof(busrange)) == sizeof(busrange)) &&
197 1.22 eeh (b < busrange[0] || b > busrange[1])) {
198 1.22 eeh /* Out of range, go up one */
199 1.22 eeh node = OF_parent(node);
200 1.22 eeh #ifdef DEBUG
201 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
202 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
203 1.22 eeh printf("going up to node %x %s\n", node, name);
204 1.22 eeh }
205 1.22 eeh #endif
206 1.22 eeh }
207 1.22 eeh #endif
208 1.22 eeh /*
209 1.22 eeh * Now traverse all peers until we find the node or we find
210 1.22 eeh * the right bridge.
211 1.22 eeh *
212 1.22 eeh * XXX We go up one and down one to make sure nobody's missed.
213 1.22 eeh * but this should not be necessary.
214 1.22 eeh */
215 1.22 eeh for (node = ((node)); node; node = OF_peer(node)) {
216 1.1 mrg
217 1.22 eeh #ifdef DEBUG
218 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
219 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
220 1.22 eeh printf("checking node %x %s\n", node, name);
221 1.22 eeh }
222 1.22 eeh #endif
223 1.1 mrg
224 1.22 eeh #if 1
225 1.1 mrg /*
226 1.22 eeh * Check for PCI-PCI bridges. If the device we want is
227 1.22 eeh * in the bus-range for that bridge, work our way down.
228 1.1 mrg */
229 1.22 eeh while ((OF_getprop(node, "bus-range", (void *)&busrange,
230 1.22 eeh sizeof(busrange)) == sizeof(busrange)) &&
231 1.22 eeh (b >= busrange[0] && b <= busrange[1])) {
232 1.22 eeh /* Go down 1 level */
233 1.22 eeh node = OF_child(node);
234 1.22 eeh #ifdef DEBUG
235 1.22 eeh if (sparc_pci_debug & SPDB_PROBE) {
236 1.22 eeh OF_getprop(node, "name", &name, sizeof(name));
237 1.22 eeh printf("going down to node %x %s\n",
238 1.22 eeh node, name);
239 1.22 eeh }
240 1.22 eeh #endif
241 1.1 mrg }
242 1.22 eeh #endif
243 1.22 eeh /*
244 1.22 eeh * We only really need the first `reg' property.
245 1.22 eeh *
246 1.22 eeh * For simplicity, we'll query the `reg' when we
247 1.22 eeh * need it. Otherwise we could malloc() it, but
248 1.22 eeh * that gets more complicated.
249 1.22 eeh */
250 1.22 eeh len = OF_getproplen(node, "reg");
251 1.22 eeh if (len < sizeof(reg))
252 1.22 eeh continue;
253 1.22 eeh if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len)
254 1.22 eeh panic("pci_probe_bus: OF_getprop len botch");
255 1.22 eeh
256 1.22 eeh if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi))
257 1.22 eeh continue;
258 1.22 eeh if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi))
259 1.22 eeh continue;
260 1.22 eeh if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi))
261 1.22 eeh continue;
262 1.22 eeh
263 1.22 eeh /* Got a match */
264 1.27 eeh tag = ofpci_make_tag(pc, node, b, d, f);
265 1.22 eeh
266 1.1 mrg /*
267 1.22 eeh * Record the node. This has two effects:
268 1.22 eeh *
269 1.22 eeh * 1) We don't have to search as far.
270 1.22 eeh * 2) pci_bus_devorder will scan the right bus.
271 1.1 mrg */
272 1.22 eeh pc->curnode = node;
273 1.22 eeh return (tag);
274 1.1 mrg }
275 1.22 eeh /* No device found -- return a dead tag */
276 1.27 eeh return (tag);
277 1.28 thorpej }
278 1.28 thorpej
279 1.28 thorpej void
280 1.28 thorpej pci_decompose_tag(pc, tag, bp, dp, fp)
281 1.28 thorpej pci_chipset_tag_t pc;
282 1.28 thorpej pcitag_t tag;
283 1.28 thorpej int *bp, *dp, *fp;
284 1.28 thorpej {
285 1.28 thorpej
286 1.28 thorpej if (bp != NULL)
287 1.28 thorpej *bp = PCITAG_BUS(tag);
288 1.28 thorpej if (dp != NULL)
289 1.28 thorpej *dp = PCITAG_DEV(tag);
290 1.28 thorpej if (fp != NULL)
291 1.28 thorpej *fp = PCITAG_FUN(tag);
292 1.27 eeh }
293 1.27 eeh
294 1.27 eeh pcitag_t
295 1.27 eeh ofpci_make_tag(pc, node, b, d, f)
296 1.27 eeh pci_chipset_tag_t pc;
297 1.27 eeh int node;
298 1.27 eeh int b;
299 1.27 eeh int d;
300 1.27 eeh int f;
301 1.27 eeh {
302 1.27 eeh pcitag_t tag;
303 1.27 eeh
304 1.27 eeh tag = PCITAG_CREATE(node, b, d, f);
305 1.27 eeh
306 1.27 eeh /*
307 1.27 eeh * Record the node. This has two effects:
308 1.27 eeh *
309 1.27 eeh * 1) We don't have to search as far.
310 1.27 eeh * 2) pci_bus_devorder will scan the right bus.
311 1.27 eeh */
312 1.27 eeh pc->curnode = node;
313 1.27 eeh
314 1.27 eeh /* Enable all the different spaces for this device */
315 1.27 eeh pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
316 1.27 eeh PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE|
317 1.27 eeh PCI_COMMAND_IO_ENABLE);
318 1.22 eeh return (tag);
319 1.1 mrg }
320 1.1 mrg
321 1.1 mrg /* assume we are mapped little-endian/side-effect */
322 1.1 mrg pcireg_t
323 1.1 mrg pci_conf_read(pc, tag, reg)
324 1.1 mrg pci_chipset_tag_t pc;
325 1.1 mrg pcitag_t tag;
326 1.1 mrg int reg;
327 1.1 mrg {
328 1.1 mrg struct psycho_pbm *pp = pc->cookie;
329 1.1 mrg struct psycho_softc *sc = pp->pp_sc;
330 1.22 eeh pcireg_t val = (pcireg_t)~0;
331 1.22 eeh
332 1.22 eeh DPRINTF(SPDB_CONF, ("pci_conf_read: tag %lx reg %x ",
333 1.22 eeh (long)tag, reg));
334 1.22 eeh if (PCITAG_NODE(tag) != -1) {
335 1.22 eeh DPRINTF(SPDB_CONF, ("asi=%x addr=%qx (offset=%x) ...",
336 1.26 eeh sc->sc_configaddr._asi,
337 1.26 eeh (long long)(sc->sc_configaddr._ptr +
338 1.22 eeh PCITAG_OFFSET(tag) + reg),
339 1.22 eeh (int)PCITAG_OFFSET(tag) + reg));
340 1.1 mrg
341 1.1 mrg val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr,
342 1.22 eeh PCITAG_OFFSET(tag) + reg);
343 1.1 mrg }
344 1.22 eeh #ifdef DEBUG
345 1.24 mrg else DPRINTF(SPDB_CONF, ("pci_conf_read: bogus pcitag %x\n",
346 1.24 mrg (int)PCITAG_OFFSET(tag)));
347 1.22 eeh #endif
348 1.1 mrg DPRINTF(SPDB_CONF, (" returning %08x\n", (u_int)val));
349 1.1 mrg
350 1.1 mrg return (val);
351 1.1 mrg }
352 1.1 mrg
353 1.1 mrg void
354 1.1 mrg pci_conf_write(pc, tag, reg, data)
355 1.1 mrg pci_chipset_tag_t pc;
356 1.1 mrg pcitag_t tag;
357 1.1 mrg int reg;
358 1.1 mrg pcireg_t data;
359 1.1 mrg {
360 1.1 mrg struct psycho_pbm *pp = pc->cookie;
361 1.1 mrg struct psycho_softc *sc = pp->pp_sc;
362 1.1 mrg
363 1.22 eeh DPRINTF(SPDB_CONF, ("pci_conf_write: tag %lx; reg %x; data %x; ",
364 1.22 eeh (long)PCITAG_OFFSET(tag), reg, (int)data));
365 1.1 mrg DPRINTF(SPDB_CONF, ("asi = %x; readaddr = %qx (offset = %x)\n",
366 1.26 eeh sc->sc_configaddr._asi,
367 1.26 eeh (long long)(sc->sc_configaddr._ptr + PCITAG_OFFSET(tag) + reg),
368 1.22 eeh (int)PCITAG_OFFSET(tag) + reg));
369 1.1 mrg
370 1.24 mrg /* If we don't know it, just punt it. */
371 1.24 mrg if (PCITAG_NODE(tag) == -1) {
372 1.24 mrg DPRINTF(SPDB_CONF, ("pci_conf_write: bad addr"));
373 1.24 mrg return;
374 1.24 mrg }
375 1.1 mrg
376 1.22 eeh bus_space_write_4(sc->sc_configtag, sc->sc_configaddr,
377 1.22 eeh PCITAG_OFFSET(tag) + reg, data);
378 1.1 mrg }
379 1.1 mrg
380 1.1 mrg /*
381 1.1 mrg * interrupt mapping foo.
382 1.20 mrg * XXX: how does this deal with multiple interrupts for a device?
383 1.1 mrg */
384 1.1 mrg int
385 1.16 sommerfe pci_intr_map(pa, ihp)
386 1.16 sommerfe struct pci_attach_args *pa;
387 1.1 mrg pci_intr_handle_t *ihp;
388 1.1 mrg {
389 1.22 eeh pcitag_t tag = pa->pa_tag;
390 1.22 eeh int interrupts;
391 1.22 eeh int len, node = PCITAG_NODE(tag);
392 1.22 eeh char devtype[30];
393 1.22 eeh
394 1.22 eeh len = OF_getproplen(node, "interrupts");
395 1.22 eeh if (len < sizeof(interrupts)) {
396 1.22 eeh DPRINTF(SPDB_INTMAP,
397 1.22 eeh ("pci_intr_map: interrupts len %d too small\n", len));
398 1.22 eeh return (ENODEV);
399 1.22 eeh }
400 1.22 eeh if (OF_getprop(node, "interrupts", (void *)&interrupts,
401 1.22 eeh sizeof(interrupts)) != len) {
402 1.22 eeh DPRINTF(SPDB_INTMAP,
403 1.22 eeh ("pci_intr_map: could not read interrupts\n"));
404 1.22 eeh return (ENODEV);
405 1.22 eeh }
406 1.20 mrg
407 1.22 eeh if (OF_mapintr(node, &interrupts, sizeof(interrupts),
408 1.23 eeh sizeof(interrupts)) < 0) {
409 1.22 eeh printf("OF_mapintr failed\n");
410 1.22 eeh }
411 1.22 eeh /* Try to find an IPL for this type of device. */
412 1.22 eeh if (OF_getprop(node, "device_type", &devtype, sizeof(devtype)) > 0) {
413 1.22 eeh for (len = 0; intrmap[len].in_class; len++)
414 1.22 eeh if (strcmp(intrmap[len].in_class, devtype) == 0) {
415 1.22 eeh interrupts |= INTLEVENCODE(intrmap[len].in_lev);
416 1.22 eeh break;
417 1.22 eeh }
418 1.22 eeh }
419 1.20 mrg
420 1.22 eeh /* XXXX -- we use the ino. What if there is a valid IGN? */
421 1.22 eeh *ihp = interrupts;
422 1.22 eeh return (0);
423 1.1 mrg }
424 1.1 mrg
425 1.1 mrg const char *
426 1.1 mrg pci_intr_string(pc, ih)
427 1.1 mrg pci_chipset_tag_t pc;
428 1.1 mrg pci_intr_handle_t ih;
429 1.1 mrg {
430 1.1 mrg static char str[16];
431 1.1 mrg
432 1.1 mrg DPRINTF(SPDB_INTR, ("pci_intr_string: ih %u", ih));
433 1.22 eeh sprintf(str, "ivec %x", ih);
434 1.1 mrg DPRINTF(SPDB_INTR, ("; returning %s\n", str));
435 1.1 mrg
436 1.1 mrg return (str);
437 1.8 cgd }
438 1.8 cgd
439 1.8 cgd const struct evcnt *
440 1.8 cgd pci_intr_evcnt(pc, ih)
441 1.8 cgd pci_chipset_tag_t pc;
442 1.8 cgd pci_intr_handle_t ih;
443 1.8 cgd {
444 1.8 cgd
445 1.8 cgd /* XXX for now, no evcnt parent reported */
446 1.8 cgd return NULL;
447 1.1 mrg }
448 1.1 mrg
449 1.1 mrg void *
450 1.1 mrg pci_intr_establish(pc, ih, level, func, arg)
451 1.1 mrg pci_chipset_tag_t pc;
452 1.1 mrg pci_intr_handle_t ih;
453 1.1 mrg int level;
454 1.1 mrg int (*func) __P((void *));
455 1.1 mrg void *arg;
456 1.1 mrg {
457 1.1 mrg void *cookie;
458 1.1 mrg struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie;
459 1.1 mrg
460 1.1 mrg DPRINTF(SPDB_INTR, ("pci_intr_establish: ih %lu; level %d", (u_long)ih, level));
461 1.13 pk cookie = bus_intr_establish(pp->pp_memt, ih, level, 0, func, arg);
462 1.1 mrg
463 1.1 mrg DPRINTF(SPDB_INTR, ("; returning handle %p\n", cookie));
464 1.1 mrg return (cookie);
465 1.1 mrg }
466 1.1 mrg
467 1.1 mrg void
468 1.1 mrg pci_intr_disestablish(pc, cookie)
469 1.1 mrg pci_chipset_tag_t pc;
470 1.1 mrg void *cookie;
471 1.1 mrg {
472 1.1 mrg
473 1.1 mrg DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie));
474 1.1 mrg
475 1.1 mrg /* XXX */
476 1.1 mrg panic("can't disestablish PCI interrupts yet");
477 1.1 mrg }
478