pci_machdep.c revision 1.39 1 /* $NetBSD: pci_machdep.c,v 1.39 2003/08/22 00:45:40 petrov Exp $ */
2
3 /*
4 * Copyright (c) 1999, 2000 Matthew R. Green
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 /*
32 * functions expected by the MI PCI code.
33 */
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.39 2003/08/22 00:45:40 petrov Exp $");
37
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/time.h>
41 #include <sys/systm.h>
42 #include <sys/errno.h>
43 #include <sys/device.h>
44 #include <sys/malloc.h>
45
46 #define _SPARC_BUS_DMA_PRIVATE
47 #include <machine/bus.h>
48 #include <machine/autoconf.h>
49 #include <machine/openfirm.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcireg.h>
52
53 #include <dev/ofw/ofw_pci.h>
54
55 #include <sparc64/dev/iommureg.h>
56 #include <sparc64/dev/iommuvar.h>
57 #include <sparc64/dev/psychoreg.h>
58 #include <sparc64/dev/psychovar.h>
59 #include <sparc64/sparc64/cache.h>
60
61 #ifdef DEBUG
62 #define SPDB_CONF 0x01
63 #define SPDB_INTR 0x04
64 #define SPDB_INTMAP 0x08
65 #define SPDB_INTFIX 0x10
66 #define SPDB_PROBE 0x20
67 int sparc_pci_debug = 0x0;
68 #define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0)
69 #else
70 #define DPRINTF(l, s)
71 #endif
72
73 /* this is a base to be copied */
74 struct sparc_pci_chipset _sparc_pci_chipset = {
75 NULL,
76 };
77
78 static int pci_bus_frequency(int node);
79
80 static pcitag_t
81 ofpci_make_tag(pci_chipset_tag_t pc, int node, int b, int d, int f)
82 {
83 pcitag_t tag;
84
85 tag = PCITAG_CREATE(node, b, d, f);
86
87 /* Enable all the different spaces for this device */
88 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
89 PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE|
90 PCI_COMMAND_IO_ENABLE);
91 return (tag);
92 }
93
94 /*
95 * functions provided to the MI code.
96 */
97
98 void
99 pci_attach_hook(parent, self, pba)
100 struct device *parent;
101 struct device *self;
102 struct pcibus_attach_args *pba;
103 {
104 }
105
106 int
107 pci_bus_maxdevs(pc, busno)
108 pci_chipset_tag_t pc;
109 int busno;
110 {
111
112 return 32;
113 }
114
115 pcitag_t
116 pci_make_tag(pc, b, d, f)
117 pci_chipset_tag_t pc;
118 int b;
119 int d;
120 int f;
121 {
122 struct psycho_pbm *pp = pc->cookie;
123 struct ofw_pci_register reg;
124 pcitag_t tag;
125 int (*valid) __P((void *));
126 int busrange[2];
127 int node, len;
128 #ifdef DEBUG
129 char name[80];
130 bzero(name, sizeof(name));
131 #endif
132
133 /*
134 * Refer to the PCI/CardBus bus node first.
135 * It returns a tag if node is present and bus is valid.
136 */
137 if (0 <= b && b < 256) {
138 node = (*pp->pp_busnode)[b].node;
139 valid = (*pp->pp_busnode)[b].valid;
140 if (node != 0 && d == 0 &&
141 (valid == NULL || (*valid)((*pp->pp_busnode)[b].arg)))
142 return ofpci_make_tag(pc, node, b, d, f);
143 }
144
145 /*
146 * Hunt for the node that corresponds to this device
147 *
148 * We could cache this info in an array in the parent
149 * device... except then we have problems with devices
150 * attached below pci-pci bridges, and we would need to
151 * add special code to the pci-pci bridge to cache this
152 * info.
153 */
154
155 tag = PCITAG_CREATE(-1, b, d, f);
156 node = pc->rootnode;
157 /*
158 * First make sure we're on the right bus. If our parent
159 * has a bus-range property and we're not in the range,
160 * then we're obviously on the wrong bus. So go up one
161 * level.
162 */
163 #ifdef DEBUG
164 if (sparc_pci_debug & SPDB_PROBE) {
165 OF_getprop(node, "name", &name, sizeof(name));
166 printf("curnode %x %s\n", node, name);
167 }
168 #endif
169 #if 0
170 while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange,
171 sizeof(busrange)) == sizeof(busrange)) &&
172 (b < busrange[0] || b > busrange[1])) {
173 /* Out of range, go up one */
174 node = OF_parent(node);
175 #ifdef DEBUG
176 if (sparc_pci_debug & SPDB_PROBE) {
177 OF_getprop(node, "name", &name, sizeof(name));
178 printf("going up to node %x %s\n", node, name);
179 }
180 #endif
181 }
182 #endif
183 /*
184 * Now traverse all peers until we find the node or we find
185 * the right bridge.
186 *
187 * XXX We go up one and down one to make sure nobody's missed.
188 * but this should not be necessary.
189 */
190 for (node = ((node)); node; node = OF_peer(node)) {
191
192 #ifdef DEBUG
193 if (sparc_pci_debug & SPDB_PROBE) {
194 OF_getprop(node, "name", &name, sizeof(name));
195 printf("checking node %x %s\n", node, name);
196 }
197 #endif
198
199 #if 1
200 /*
201 * Check for PCI-PCI bridges. If the device we want is
202 * in the bus-range for that bridge, work our way down.
203 */
204 while ((OF_getprop(node, "bus-range", (void *)&busrange,
205 sizeof(busrange)) == sizeof(busrange)) &&
206 (b >= busrange[0] && b <= busrange[1])) {
207 /* Go down 1 level */
208 node = OF_child(node);
209 #ifdef DEBUG
210 if (sparc_pci_debug & SPDB_PROBE) {
211 OF_getprop(node, "name", &name, sizeof(name));
212 printf("going down to node %x %s\n",
213 node, name);
214 }
215 #endif
216 }
217 #endif
218 /*
219 * We only really need the first `reg' property.
220 *
221 * For simplicity, we'll query the `reg' when we
222 * need it. Otherwise we could malloc() it, but
223 * that gets more complicated.
224 */
225 len = OF_getproplen(node, "reg");
226 if (len < sizeof(reg))
227 continue;
228 if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len)
229 panic("pci_probe_bus: OF_getprop len botch");
230
231 if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi))
232 continue;
233 if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi))
234 continue;
235 if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi))
236 continue;
237
238 /* Got a match */
239 tag = ofpci_make_tag(pc, node, b, d, f);
240
241 return (tag);
242 }
243 /* No device found -- return a dead tag */
244 return (tag);
245 }
246
247 void
248 pci_decompose_tag(pc, tag, bp, dp, fp)
249 pci_chipset_tag_t pc;
250 pcitag_t tag;
251 int *bp, *dp, *fp;
252 {
253
254 if (bp != NULL)
255 *bp = PCITAG_BUS(tag);
256 if (dp != NULL)
257 *dp = PCITAG_DEV(tag);
258 if (fp != NULL)
259 *fp = PCITAG_FUN(tag);
260 }
261
262 static int
263 pci_bus_frequency(int node)
264 {
265 int len, bus_frequency;
266
267 len = OF_getproplen(node, "clock-frequency");
268 if (len < sizeof(bus_frequency)) {
269 DPRINTF(SPDB_PROBE,
270 ("pci_bus_frequency: clock-frequency len %d too small\n",
271 len));
272 return 33;
273 }
274 if (OF_getprop(node, "clock-frequency", &bus_frequency,
275 sizeof(bus_frequency)) != len) {
276 DPRINTF(SPDB_PROBE,
277 ("pci_bus_frequency: could not read clock-frequency\n"));
278 return 33;
279 }
280 return bus_frequency / 1000000;
281 }
282
283 int
284 pci_enumerate_bus(struct pci_softc *sc,
285 int (*match)(struct pci_attach_args *), struct pci_attach_args *pap)
286 {
287 struct ofw_pci_register reg;
288 pci_chipset_tag_t pc = sc->sc_pc;
289 pcitag_t tag;
290 pcireg_t class, csr, bhlc, ic;
291 int node, b, d, f, ret;
292 int bus_frequency, lt, cl, cacheline;
293 char name[30];
294 extern int pci_config_dump;
295
296 if (sc->sc_bridgetag)
297 node = PCITAG_NODE(*sc->sc_bridgetag);
298 else
299 node = pc->rootnode;
300
301 bus_frequency = pci_bus_frequency(node);
302
303 /*
304 * Make sure the cache line size is at least as big as the
305 * ecache line and the streaming cache (64 byte).
306 */
307 cacheline = max(cacheinfo.ec_linesize, 64);
308 KASSERT((cacheline/64)*64 == cacheline &&
309 (cacheline/cacheinfo.ec_linesize)*cacheinfo.ec_linesize == cacheline &&
310 (cacheline/4)*4 == cacheline);
311
312 /* Turn on parity for the bus. */
313 tag = ofpci_make_tag(pc, node, sc->sc_bus, 0, 0);
314 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
315 csr |= PCI_COMMAND_PARITY_ENABLE;
316 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
317
318 /*
319 * Initialize the latency timer register.
320 * The value 0x40 is from Solaris.
321 */
322 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
323 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
324 bhlc |= 0x40 << PCI_LATTIMER_SHIFT;
325 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc);
326
327 if (pci_config_dump) pci_conf_print(pc, tag, NULL);
328
329 for (node = OF_child(node); node != 0 && node != -1;
330 node = OF_peer(node)) {
331 name[0] = name[29] = 0;
332 OF_getprop(node, "name", name, sizeof(name));
333
334 if (OF_getprop(node, "class-code", &class, sizeof(class)) !=
335 sizeof(class))
336 continue;
337 if (OF_getprop(node, "reg", ®, sizeof(reg)) < sizeof(reg))
338 panic("pci_enumerate_bus: \"%s\" regs too small", name);
339
340 b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi);
341 d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi);
342 f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi);
343
344 if (sc->sc_bus != b) {
345 printf("%s: WARNING: incorrect bus # for \"%s\" "
346 "(%d/%d/%d)\n", sc->sc_dev.dv_xname, name, b, d, f);
347 continue;
348 }
349
350 tag = ofpci_make_tag(pc, node, b, d, f);
351
352 /*
353 * Turn on parity and fast-back-to-back for the device.
354 */
355 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
356 if (csr & PCI_STATUS_BACKTOBACK_SUPPORT)
357 csr |= PCI_COMMAND_BACKTOBACK_ENABLE;
358 csr |= PCI_COMMAND_PARITY_ENABLE;
359 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
360
361 /*
362 * Initialize the latency timer register for busmaster
363 * devices to work properly.
364 * latency-timer = min-grant * bus-freq / 4 (from FreeBSD)
365 * Also initialize the cache line size register.
366 * Solaris anytime sets this register to the value 0x10.
367 */
368 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
369 ic = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
370
371 lt = min(PCI_MIN_GNT(ic) * bus_frequency / 4, 255);
372 if (lt == 0 || lt < PCI_LATTIMER(bhlc))
373 lt = PCI_LATTIMER(bhlc);
374
375 cl = PCI_CACHELINE(bhlc);
376 if (cl == 0)
377 cl = cacheline;
378
379 bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) |
380 (PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT));
381 bhlc |= (lt << PCI_LATTIMER_SHIFT) |
382 (cl << PCI_CACHELINE_SHIFT);
383 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc);
384
385 ret = pci_probe_device(sc, tag, match, pap);
386 if (match != NULL && ret != 0)
387 return (ret);
388 }
389 return (0);
390 }
391
392 /* assume we are mapped little-endian/side-effect */
393 pcireg_t
394 pci_conf_read(pc, tag, reg)
395 pci_chipset_tag_t pc;
396 pcitag_t tag;
397 int reg;
398 {
399 struct psycho_pbm *pp = pc->cookie;
400 struct psycho_softc *sc = pp->pp_sc;
401 pcireg_t val = (pcireg_t)~0;
402
403 DPRINTF(SPDB_CONF, ("pci_conf_read: tag %lx reg %x ",
404 (long)tag, reg));
405 if (PCITAG_NODE(tag) != -1) {
406 DPRINTF(SPDB_CONF, ("asi=%x addr=%qx (offset=%x) ...",
407 sc->sc_configaddr._asi,
408 (long long)(sc->sc_configaddr._ptr +
409 PCITAG_OFFSET(tag) + reg),
410 (int)PCITAG_OFFSET(tag) + reg));
411
412 val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr,
413 PCITAG_OFFSET(tag) + reg);
414 }
415 #ifdef DEBUG
416 else DPRINTF(SPDB_CONF, ("pci_conf_read: bogus pcitag %x\n",
417 (int)PCITAG_OFFSET(tag)));
418 #endif
419 DPRINTF(SPDB_CONF, (" returning %08x\n", (u_int)val));
420
421 return (val);
422 }
423
424 void
425 pci_conf_write(pc, tag, reg, data)
426 pci_chipset_tag_t pc;
427 pcitag_t tag;
428 int reg;
429 pcireg_t data;
430 {
431 struct psycho_pbm *pp = pc->cookie;
432 struct psycho_softc *sc = pp->pp_sc;
433
434 DPRINTF(SPDB_CONF, ("pci_conf_write: tag %lx; reg %x; data %x; ",
435 (long)PCITAG_OFFSET(tag), reg, (int)data));
436 DPRINTF(SPDB_CONF, ("asi = %x; readaddr = %qx (offset = %x)\n",
437 sc->sc_configaddr._asi,
438 (long long)(sc->sc_configaddr._ptr + PCITAG_OFFSET(tag) + reg),
439 (int)PCITAG_OFFSET(tag) + reg));
440
441 /* If we don't know it, just punt it. */
442 if (PCITAG_NODE(tag) == -1) {
443 DPRINTF(SPDB_CONF, ("pci_conf_write: bad addr"));
444 return;
445 }
446
447 bus_space_write_4(sc->sc_configtag, sc->sc_configaddr,
448 PCITAG_OFFSET(tag) + reg, data);
449 }
450
451 /*
452 * interrupt mapping foo.
453 * XXX: how does this deal with multiple interrupts for a device?
454 */
455 int
456 pci_intr_map(pa, ihp)
457 struct pci_attach_args *pa;
458 pci_intr_handle_t *ihp;
459 {
460 pcitag_t tag = pa->pa_tag;
461 int interrupts;
462 int len, node = PCITAG_NODE(tag);
463 char devtype[30];
464
465 len = OF_getproplen(node, "interrupts");
466 if (len < sizeof(interrupts)) {
467 DPRINTF(SPDB_INTMAP,
468 ("pci_intr_map: interrupts len %d too small\n", len));
469 return (ENODEV);
470 }
471 if (OF_getprop(node, "interrupts", (void *)&interrupts,
472 sizeof(interrupts)) != len) {
473 DPRINTF(SPDB_INTMAP,
474 ("pci_intr_map: could not read interrupts\n"));
475 return (ENODEV);
476 }
477
478 if (OF_mapintr(node, &interrupts, sizeof(interrupts),
479 sizeof(interrupts)) < 0) {
480 printf("OF_mapintr failed\n");
481 }
482 /* Try to find an IPL for this type of device. */
483 if (OF_getprop(node, "device_type", &devtype, sizeof(devtype)) > 0) {
484 for (len = 0; intrmap[len].in_class; len++)
485 if (strcmp(intrmap[len].in_class, devtype) == 0) {
486 interrupts |= INTLEVENCODE(intrmap[len].in_lev);
487 break;
488 }
489 }
490
491 /* XXXX -- we use the ino. What if there is a valid IGN? */
492 *ihp = interrupts;
493 return (0);
494 }
495
496 const char *
497 pci_intr_string(pc, ih)
498 pci_chipset_tag_t pc;
499 pci_intr_handle_t ih;
500 {
501 static char str[16];
502
503 DPRINTF(SPDB_INTR, ("pci_intr_string: ih %u", ih));
504 sprintf(str, "ivec %x", ih);
505 DPRINTF(SPDB_INTR, ("; returning %s\n", str));
506
507 return (str);
508 }
509
510 const struct evcnt *
511 pci_intr_evcnt(pc, ih)
512 pci_chipset_tag_t pc;
513 pci_intr_handle_t ih;
514 {
515
516 /* XXX for now, no evcnt parent reported */
517 return NULL;
518 }
519
520 void *
521 pci_intr_establish(pc, ih, level, func, arg)
522 pci_chipset_tag_t pc;
523 pci_intr_handle_t ih;
524 int level;
525 int (*func) __P((void *));
526 void *arg;
527 {
528 void *cookie;
529 struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie;
530
531 DPRINTF(SPDB_INTR, ("pci_intr_establish: ih %lu; level %d", (u_long)ih, level));
532 cookie = bus_intr_establish(pp->pp_memt, ih, level, func, arg);
533
534 DPRINTF(SPDB_INTR, ("; returning handle %p\n", cookie));
535 return (cookie);
536 }
537
538 void
539 pci_intr_disestablish(pc, cookie)
540 pci_chipset_tag_t pc;
541 void *cookie;
542 {
543
544 DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie));
545
546 /* XXX */
547 panic("can't disestablish PCI interrupts yet");
548 }
549