pci_machdep.c revision 1.53.8.1
1 /* $NetBSD: pci_machdep.c,v 1.53.8.1 2007/04/10 13:23:18 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * functions expected by the MI PCI code. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.53.8.1 2007/04/10 13:23:18 ad Exp $"); 37 38 #include <sys/types.h> 39 #include <sys/param.h> 40 #include <sys/time.h> 41 #include <sys/systm.h> 42 #include <sys/errno.h> 43 #include <sys/device.h> 44 #include <sys/malloc.h> 45 46 #define _SPARC_BUS_DMA_PRIVATE 47 #include <machine/bus.h> 48 #include <machine/autoconf.h> 49 #include <machine/openfirm.h> 50 #include <dev/pci/pcivar.h> 51 #include <dev/pci/pcireg.h> 52 53 #include <dev/ofw/ofw_pci.h> 54 55 #include <sparc64/dev/iommureg.h> 56 #include <sparc64/dev/iommuvar.h> 57 #include <sparc64/dev/psychoreg.h> 58 #include <sparc64/dev/psychovar.h> 59 #include <sparc64/sparc64/cache.h> 60 61 #include "locators.h" 62 63 #ifdef DEBUG 64 #define SPDB_CONF 0x01 65 #define SPDB_INTR 0x04 66 #define SPDB_INTMAP 0x08 67 #define SPDB_PROBE 0x20 68 int sparc_pci_debug = 0x0; 69 #define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0) 70 #else 71 #define DPRINTF(l, s) 72 #endif 73 74 /* this is a base to be copied */ 75 struct sparc_pci_chipset _sparc_pci_chipset = { 76 .cookie = NULL, 77 }; 78 79 static int pci_find_ino(struct pci_attach_args *, pci_intr_handle_t *); 80 81 static pcitag_t 82 ofpci_make_tag(pci_chipset_tag_t pc, int node, int b, int d, int f) 83 { 84 pcitag_t tag; 85 86 tag = PCITAG_CREATE(node, b, d, f); 87 88 /* Enable all the different spaces for this device */ 89 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 90 PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE| 91 PCI_COMMAND_IO_ENABLE); 92 return (tag); 93 } 94 95 /* 96 * functions provided to the MI code. 97 */ 98 99 void 100 pci_attach_hook(struct device *parent, struct device *self, 101 struct pcibus_attach_args *pba) 102 { 103 } 104 105 int 106 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 107 { 108 109 return 32; 110 } 111 112 pcitag_t 113 pci_make_tag(pci_chipset_tag_t pc, int b, int d, int f) 114 { 115 struct psycho_pbm *pp = pc->cookie; 116 struct ofw_pci_register reg; 117 pcitag_t tag; 118 int (*valid)(void *); 119 int node, len; 120 #ifdef DEBUG 121 char name[80]; 122 memset(name, 0, sizeof(name)); 123 #endif 124 125 /* 126 * Refer to the PCI/CardBus bus node first. 127 * It returns a tag if node is present and bus is valid. 128 */ 129 if (0 <= b && b < 256) { 130 node = (*pp->pp_busnode)[b].node; 131 valid = (*pp->pp_busnode)[b].valid; 132 if (node != 0 && d == 0 && 133 (valid == NULL || (*valid)((*pp->pp_busnode)[b].arg))) 134 return ofpci_make_tag(pc, node, b, d, f); 135 } 136 137 /* 138 * Hunt for the node that corresponds to this device 139 * 140 * We could cache this info in an array in the parent 141 * device... except then we have problems with devices 142 * attached below pci-pci bridges, and we would need to 143 * add special code to the pci-pci bridge to cache this 144 * info. 145 */ 146 147 tag = PCITAG_CREATE(-1, b, d, f); 148 node = pc->rootnode; 149 /* 150 * First make sure we're on the right bus. If our parent 151 * has a bus-range property and we're not in the range, 152 * then we're obviously on the wrong bus. So go up one 153 * level. 154 */ 155 #ifdef DEBUG 156 if (sparc_pci_debug & SPDB_PROBE) { 157 printf("curnode %x %s\n", node, 158 prom_getpropstringA(node, "name", name, sizeof(name))); 159 } 160 #endif 161 #if 0 162 while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange, 163 sizeof(busrange)) == sizeof(busrange)) && 164 (b < busrange[0] || b > busrange[1])) { 165 /* Out of range, go up one */ 166 node = OF_parent(node); 167 #ifdef DEBUG 168 if (sparc_pci_debug & SPDB_PROBE) { 169 printf("going up to node %x %s\n", node, 170 prom_getpropstringA(node, "name", name, sizeof(name))); 171 } 172 #endif 173 } 174 #endif 175 /* 176 * Now traverse all peers until we find the node or we find 177 * the right bridge. 178 * 179 * XXX We go up one and down one to make sure nobody's missed. 180 * but this should not be necessary. 181 */ 182 for (node = ((node)); node; node = prom_nextsibling(node)) { 183 184 #ifdef DEBUG 185 if (sparc_pci_debug & SPDB_PROBE) { 186 printf("checking node %x %s\n", node, 187 prom_getpropstringA(node, "name", name, sizeof(name))); 188 189 } 190 #endif 191 192 #if 1 193 /* 194 * Check for PCI-PCI bridges. If the device we want is 195 * in the bus-range for that bridge, work our way down. 196 */ 197 while (1) { 198 int busrange[2], *brp; 199 len = 2; 200 brp = busrange; 201 if (prom_getprop(node, "bus-range", sizeof(*brp), 202 &len, &brp) != 0) 203 break; 204 if (len != 2 || b < busrange[0] || b > busrange[1]) 205 break; 206 /* Go down 1 level */ 207 node = prom_firstchild(node); 208 #ifdef DEBUG 209 if (sparc_pci_debug & SPDB_PROBE) { 210 printf("going down to node %x %s\n", node, 211 prom_getpropstringA(node, "name", 212 name, sizeof(name))); 213 } 214 #endif 215 } 216 #endif /*1*/ 217 /* 218 * We only really need the first `reg' property. 219 * 220 * For simplicity, we'll query the `reg' when we 221 * need it. Otherwise we could malloc() it, but 222 * that gets more complicated. 223 */ 224 len = prom_getproplen(node, "reg"); 225 if (len < sizeof(reg)) 226 continue; 227 if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len) 228 panic("pci_probe_bus: OF_getprop len botch"); 229 230 if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi)) 231 continue; 232 if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi)) 233 continue; 234 if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi)) 235 continue; 236 237 /* Got a match */ 238 tag = ofpci_make_tag(pc, node, b, d, f); 239 240 return (tag); 241 } 242 /* No device found -- return a dead tag */ 243 return (tag); 244 } 245 246 void 247 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp) 248 { 249 250 if (bp != NULL) 251 *bp = PCITAG_BUS(tag); 252 if (dp != NULL) 253 *dp = PCITAG_DEV(tag); 254 if (fp != NULL) 255 *fp = PCITAG_FUN(tag); 256 } 257 258 int 259 sparc64_pci_enumerate_bus(struct pci_softc *sc, const int *locators, 260 int (*match)(struct pci_attach_args *), struct pci_attach_args *pap) 261 { 262 struct ofw_pci_register reg; 263 pci_chipset_tag_t pc = sc->sc_pc; 264 pcitag_t tag; 265 pcireg_t class, csr, bhlc, ic; 266 int node, b, d, f, ret; 267 int bus_frequency, lt, cl, cacheline; 268 char name[30]; 269 extern int pci_config_dump; 270 271 if (sc->sc_bridgetag) 272 node = PCITAG_NODE(*sc->sc_bridgetag); 273 else 274 node = pc->rootnode; 275 276 bus_frequency = 277 prom_getpropint(node, "clock-frequency", 33000000) / 1000000; 278 279 /* 280 * Make sure the cache line size is at least as big as the 281 * ecache line and the streaming cache (64 byte). 282 */ 283 cacheline = max(ecache_min_line_size, 64); 284 KASSERT((cacheline/64)*64 == cacheline && 285 (cacheline/ecache_min_line_size)*ecache_min_line_size == cacheline && 286 (cacheline/4)*4 == cacheline); 287 288 /* Turn on parity for the bus. */ 289 tag = ofpci_make_tag(pc, node, sc->sc_bus, 0, 0); 290 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 291 csr |= PCI_COMMAND_PARITY_ENABLE; 292 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 293 294 /* 295 * Initialize the latency timer register. 296 * The value 0x40 is from Solaris. 297 */ 298 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 299 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 300 bhlc |= 0x40 << PCI_LATTIMER_SHIFT; 301 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 302 303 if (pci_config_dump) pci_conf_print(pc, tag, NULL); 304 305 for (node = prom_firstchild(node); node != 0 && node != -1; 306 node = prom_nextsibling(node)) { 307 name[0] = name[29] = 0; 308 prom_getpropstringA(node, "name", name, sizeof(name)); 309 310 if (OF_getprop(node, "class-code", &class, sizeof(class)) != 311 sizeof(class)) 312 continue; 313 if (OF_getprop(node, "reg", ®, sizeof(reg)) < sizeof(reg)) 314 panic("pci_enumerate_bus: \"%s\" regs too small", name); 315 316 b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi); 317 d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi); 318 f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi); 319 320 if (sc->sc_bus != b) { 321 printf("%s: WARNING: incorrect bus # for \"%s\" " 322 "(%d/%d/%d)\n", sc->sc_dev.dv_xname, name, b, d, f); 323 continue; 324 } 325 if ((locators[PCICF_DEV] != PCICF_DEV_DEFAULT) && 326 (locators[PCICF_DEV] != d)) 327 continue; 328 if ((locators[PCICF_FUNCTION] != PCICF_FUNCTION_DEFAULT) && 329 (locators[PCICF_FUNCTION] != f)) 330 continue; 331 332 tag = ofpci_make_tag(pc, node, b, d, f); 333 334 /* 335 * Turn on parity and fast-back-to-back for the device. 336 */ 337 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 338 if (csr & PCI_STATUS_BACKTOBACK_SUPPORT) 339 csr |= PCI_COMMAND_BACKTOBACK_ENABLE; 340 csr |= PCI_COMMAND_PARITY_ENABLE; 341 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 342 343 /* 344 * Initialize the latency timer register for busmaster 345 * devices to work properly. 346 * latency-timer = min-grant * bus-freq / 4 (from FreeBSD) 347 * Also initialize the cache line size register. 348 * Solaris anytime sets this register to the value 0x10. 349 */ 350 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG); 351 ic = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 352 353 lt = min(PCI_MIN_GNT(ic) * bus_frequency / 4, 255); 354 if (lt == 0 || lt < PCI_LATTIMER(bhlc)) 355 lt = PCI_LATTIMER(bhlc); 356 357 cl = PCI_CACHELINE(bhlc); 358 if (cl == 0) 359 cl = cacheline; 360 361 bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) | 362 (PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT)); 363 bhlc |= (lt << PCI_LATTIMER_SHIFT) | 364 (cl << PCI_CACHELINE_SHIFT); 365 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc); 366 367 ret = pci_probe_device(sc, tag, match, pap); 368 if (match != NULL && ret != 0) 369 return (ret); 370 } 371 return (0); 372 } 373 374 /* assume we are mapped little-endian/side-effect */ 375 pcireg_t 376 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 377 { 378 struct psycho_pbm *pp = pc->cookie; 379 struct psycho_softc *sc = pp->pp_sc; 380 pcireg_t val = (pcireg_t)~0; 381 382 DPRINTF(SPDB_CONF, ("pci_conf_read: tag %lx reg %x ", 383 (long)tag, reg)); 384 if (PCITAG_NODE(tag) != -1) { 385 DPRINTF(SPDB_CONF, ("asi=%x addr=%qx (offset=%x) ...", 386 sc->sc_configaddr._asi, 387 (long long)(sc->sc_configaddr._ptr + 388 PCITAG_OFFSET(tag) + reg), 389 (int)PCITAG_OFFSET(tag) + reg)); 390 391 val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr, 392 PCITAG_OFFSET(tag) + reg); 393 } 394 #ifdef DEBUG 395 else DPRINTF(SPDB_CONF, ("pci_conf_read: bogus pcitag %x\n", 396 (int)PCITAG_OFFSET(tag))); 397 #endif 398 DPRINTF(SPDB_CONF, (" returning %08x\n", (u_int)val)); 399 400 return (val); 401 } 402 403 void 404 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 405 { 406 struct psycho_pbm *pp = pc->cookie; 407 struct psycho_softc *sc = pp->pp_sc; 408 409 DPRINTF(SPDB_CONF, ("pci_conf_write: tag %lx; reg %x; data %x; ", 410 (long)PCITAG_OFFSET(tag), reg, (int)data)); 411 DPRINTF(SPDB_CONF, ("asi = %x; readaddr = %qx (offset = %x)\n", 412 sc->sc_configaddr._asi, 413 (long long)(sc->sc_configaddr._ptr + PCITAG_OFFSET(tag) + reg), 414 (int)PCITAG_OFFSET(tag) + reg)); 415 416 /* If we don't know it, just punt it. */ 417 if (PCITAG_NODE(tag) == -1) { 418 DPRINTF(SPDB_CONF, ("pci_conf_write: bad addr")); 419 return; 420 } 421 422 bus_space_write_4(sc->sc_configtag, sc->sc_configaddr, 423 PCITAG_OFFSET(tag) + reg, data); 424 } 425 426 /* 427 * XXX: This code assumes we're on a psycho host bridge. 428 */ 429 static int 430 pci_find_ino(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 431 { 432 struct psycho_pbm *pp = pa->pa_pc->cookie; 433 struct psycho_softc *sc = pp->pp_sc; 434 u_int bus; 435 u_int dev; 436 u_int pin; 437 438 DPRINTF(SPDB_INTMAP, ("pci_find_ino: pa_tag: node %x, %d:%d:%d\n", 439 PCITAG_NODE(pa->pa_tag), (int)PCITAG_BUS(pa->pa_tag), 440 (int)PCITAG_DEV(pa->pa_tag), 441 (int)PCITAG_FUN(pa->pa_tag))); 442 DPRINTF(SPDB_INTMAP, 443 ("pci_find_ino: intrswiz %d, intrpin %d, intrline %d, rawintrpin %d\n", 444 pa->pa_intrswiz, pa->pa_intrpin, pa->pa_intrline, pa->pa_rawintrpin)); 445 DPRINTF(SPDB_INTMAP, ("pci_find_ino: pa_intrtag: node %x, %d:%d:%d\n", 446 PCITAG_NODE(pa->pa_intrtag), 447 (int)PCITAG_BUS(pa->pa_intrtag), 448 (int)PCITAG_DEV(pa->pa_intrtag), 449 (int)PCITAG_FUN(pa->pa_intrtag))); 450 451 bus = (pp->pp_id == PSYCHO_PBM_B); 452 /* 453 * If we are on a ppb, use the devno on the underlying bus when forming 454 * the ivec. 455 */ 456 if (pa->pa_intrswiz != 0 && PCITAG_NODE(pa->pa_intrtag) != 0) 457 dev = PCITAG_DEV(pa->pa_intrtag); 458 else 459 dev = pa->pa_device; 460 dev--; 461 462 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 463 pp->pp_id == PSYCHO_PBM_B) 464 dev--; 465 466 pin = pa->pa_intrpin - 1; 467 DPRINTF(SPDB_INTMAP, ("pci_find_ino: mode %d, pbm %d, dev %d, pin %d\n", 468 sc->sc_mode, pp->pp_id, dev, pin)); 469 470 *ihp = sc->sc_ign | ((bus << 4) & INTMAP_PCIBUS) | 471 ((dev << 2) & INTMAP_PCISLOT) | (pin & INTMAP_PCIINT); 472 473 return (0); 474 } 475 476 /* 477 * interrupt mapping foo. 478 * XXX: how does this deal with multiple interrupts for a device? 479 */ 480 int 481 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 482 { 483 pcitag_t tag = pa->pa_tag; 484 int interrupts, *intp; 485 int len, node = PCITAG_NODE(tag); 486 char devtype[30]; 487 488 intp = &interrupts; 489 len = 1; 490 if (prom_getprop(node, "interrupts", sizeof(interrupts), 491 &len, &intp) != 0 || len != 1) { 492 DPRINTF(SPDB_INTMAP, 493 ("pci_intr_map: could not read interrupts\n")); 494 return (ENODEV); 495 } 496 497 if (OF_mapintr(node, &interrupts, sizeof(interrupts), 498 sizeof(interrupts)) < 0) { 499 printf("OF_mapintr failed\n"); 500 pci_find_ino(pa, &interrupts); 501 } 502 503 /* Try to find an IPL for this type of device. */ 504 prom_getpropstringA(node, "device_type", devtype, sizeof(devtype)); 505 for (len = 0; intrmap[len].in_class != NULL; len++) 506 if (strcmp(intrmap[len].in_class, devtype) == 0) { 507 interrupts |= INTLEVENCODE(intrmap[len].in_lev); 508 break; 509 } 510 511 /* XXXX -- we use the ino. What if there is a valid IGN? */ 512 *ihp = interrupts; 513 return (0); 514 } 515 516 const char * 517 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 518 { 519 static char str[16]; 520 521 DPRINTF(SPDB_INTR, ("pci_intr_string: ih %u", ih)); 522 sprintf(str, "ivec %x", ih); 523 DPRINTF(SPDB_INTR, ("; returning %s\n", str)); 524 525 return (str); 526 } 527 528 const struct evcnt * 529 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 530 { 531 532 /* XXX for now, no evcnt parent reported */ 533 return NULL; 534 } 535 536 void * 537 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 538 int (*func)(void *), void *arg) 539 { 540 void *cookie; 541 struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie; 542 543 DPRINTF(SPDB_INTR, ("pci_intr_establish: ih %lu; level %d", (u_long)ih, level)); 544 cookie = bus_intr_establish(pp->pp_memt, ih, level, func, arg); 545 546 DPRINTF(SPDB_INTR, ("; returning handle %p\n", cookie)); 547 return (cookie); 548 } 549 550 void 551 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 552 { 553 554 DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie)); 555 556 /* XXX */ 557 panic("can't disestablish PCI interrupts yet"); 558 } 559
Indexes created Wed Oct 15 16:09:53 GMT 2025