pci_machdep.c revision 1.72 1 /* $NetBSD: pci_machdep.c,v 1.72 2011/05/11 22:26:46 macallan Exp $ */
2
3 /*
4 * Copyright (c) 1999, 2000 Matthew R. Green
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * functions expected by the MI PCI code.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.72 2011/05/11 22:26:46 macallan Exp $");
35
36 #include <sys/types.h>
37 #include <sys/param.h>
38 #include <sys/time.h>
39 #include <sys/systm.h>
40 #include <sys/errno.h>
41 #include <sys/device.h>
42 #include <sys/malloc.h>
43
44 #define _SPARC_BUS_DMA_PRIVATE
45 #include <machine/bus.h>
46 #include <machine/autoconf.h>
47 #include <machine/openfirm.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcireg.h>
50
51 #include <dev/ofw/ofw_pci.h>
52
53 #include <sparc64/dev/iommureg.h>
54 #include <sparc64/sparc64/cache.h>
55
56 #include "locators.h"
57
58 #ifdef DEBUG
59 #define SPDB_CONF 0x01
60 #define SPDB_INTR 0x04
61 #define SPDB_INTMAP 0x08
62 #define SPDB_PROBE 0x20
63 #define SPDB_TAG 0x40
64 int sparc_pci_debug = 0x0;
65 #define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0)
66 #else
67 #define DPRINTF(l, s)
68 #endif
69
70 /* this is a base to be copied */
71 struct sparc_pci_chipset _sparc_pci_chipset = {
72 .cookie = NULL,
73 };
74
75 static pcitag_t
76 ofpci_make_tag(pci_chipset_tag_t pc, int node, int b, int d, int f)
77 {
78 pcitag_t tag;
79 pcireg_t reg;
80
81 tag = PCITAG_CREATE(node, b, d, f);
82
83 DPRINTF(SPDB_TAG,
84 ("%s: creating tag for node %x bus %d dev %d fn %d\n",
85 __func__, node, b, d, f));
86
87 /* Enable all the different spaces for this device */
88 reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
89 reg |= PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_MASTER_ENABLE|
90 PCI_COMMAND_IO_ENABLE;
91 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg);
92
93 return (tag);
94 }
95
96 /*
97 * functions provided to the MI code.
98 */
99
100 void
101 pci_attach_hook(struct device *parent, struct device *self,
102 struct pcibus_attach_args *pba)
103 {
104 }
105
106 int
107 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
108 {
109
110 return 32;
111 }
112
113 pcitag_t
114 pci_make_tag(pci_chipset_tag_t pc, int b, int d, int f)
115 {
116 struct ofw_pci_register reg;
117 pcitag_t tag;
118 int (*valid)(void *);
119 int node, len;
120 #ifdef DEBUG
121 char name[80];
122 memset(name, 0, sizeof(name));
123 #endif
124
125 /*
126 * Refer to the PCI/CardBus bus node first.
127 * It returns a tag if node is present and bus is valid.
128 */
129 if (0 <= b && b < 256) {
130 KASSERT(pc->spc_busnode != NULL);
131 node = (*pc->spc_busnode)[b].node;
132 valid = (*pc->spc_busnode)[b].valid;
133 if (node != 0 && d == 0 &&
134 (valid == NULL || (*valid)((*pc->spc_busnode)[b].arg)))
135 return ofpci_make_tag(pc, node, b, d, f);
136 }
137
138 /*
139 * Hunt for the node that corresponds to this device
140 *
141 * We could cache this info in an array in the parent
142 * device... except then we have problems with devices
143 * attached below pci-pci bridges, and we would need to
144 * add special code to the pci-pci bridge to cache this
145 * info.
146 */
147
148 tag = PCITAG_CREATE(-1, b, d, f);
149 node = pc->rootnode;
150 /*
151 * First make sure we're on the right bus. If our parent
152 * has a bus-range property and we're not in the range,
153 * then we're obviously on the wrong bus. So go up one
154 * level.
155 */
156 #ifdef DEBUG
157 if (sparc_pci_debug & SPDB_PROBE) {
158 printf("curnode %x %s\n", node,
159 prom_getpropstringA(node, "name", name, sizeof(name)));
160 }
161 #endif
162 #if 0
163 while ((OF_getprop(OF_parent(node), "bus-range", (void *)&busrange,
164 sizeof(busrange)) == sizeof(busrange)) &&
165 (b < busrange[0] || b > busrange[1])) {
166 /* Out of range, go up one */
167 node = OF_parent(node);
168 #ifdef DEBUG
169 if (sparc_pci_debug & SPDB_PROBE) {
170 printf("going up to node %x %s\n", node,
171 prom_getpropstringA(node, "name", name, sizeof(name)));
172 }
173 #endif
174 }
175 #endif
176 node = prom_firstchild(node);
177 /*
178 * Now traverse all peers until we find the node or we find
179 * the right bridge.
180 *
181 * XXX We go up one and down one to make sure nobody's missed.
182 * but this should not be necessary.
183 */
184 for (node = ((node)); node; node = prom_nextsibling(node)) {
185
186 #ifdef DEBUG
187 if (sparc_pci_debug & SPDB_PROBE) {
188 printf("checking node %x %s\n", node,
189 prom_getpropstringA(node, "name", name, sizeof(name)));
190
191 }
192 #endif
193
194 #if 1
195 /*
196 * Check for PCI-PCI bridges. If the device we want is
197 * in the bus-range for that bridge, work our way down.
198 */
199 while (1) {
200 int busrange[2], *brp;
201 len = 2;
202 brp = busrange;
203 if (prom_getprop(node, "bus-range", sizeof(*brp),
204 &len, &brp) != 0)
205 break;
206 if (len != 2 || b < busrange[0] || b > busrange[1])
207 break;
208 /* Go down 1 level */
209 node = prom_firstchild(node);
210 #ifdef DEBUG
211 if (sparc_pci_debug & SPDB_PROBE) {
212 printf("going down to node %x %s\n", node,
213 prom_getpropstringA(node, "name",
214 name, sizeof(name)));
215 }
216 #endif
217 }
218 #endif /*1*/
219 /*
220 * We only really need the first `reg' property.
221 *
222 * For simplicity, we'll query the `reg' when we
223 * need it. Otherwise we could malloc() it, but
224 * that gets more complicated.
225 */
226 len = prom_getproplen(node, "reg");
227 if (len < sizeof(reg))
228 continue;
229 if (OF_getprop(node, "reg", (void *)®, sizeof(reg)) != len)
230 panic("pci_probe_bus: OF_getprop len botch");
231
232 if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi))
233 continue;
234 if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi))
235 continue;
236 if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi))
237 continue;
238
239 /* Got a match */
240 tag = ofpci_make_tag(pc, node, b, d, f);
241
242 return (tag);
243 }
244 /* No device found -- return a dead tag */
245 return (tag);
246 }
247
248 void
249 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp)
250 {
251
252 if (bp != NULL)
253 *bp = PCITAG_BUS(tag);
254 if (dp != NULL)
255 *dp = PCITAG_DEV(tag);
256 if (fp != NULL)
257 *fp = PCITAG_FUN(tag);
258 }
259
260 int
261 sparc64_pci_enumerate_bus(struct pci_softc *sc, const int *locators,
262 int (*match)(const struct pci_attach_args *), struct pci_attach_args *pap)
263 {
264 struct ofw_pci_register reg;
265 pci_chipset_tag_t pc = sc->sc_pc;
266 pcitag_t tag;
267 pcireg_t class, csr, bhlc, ic;
268 int node, b, d, f, ret;
269 int bus_frequency, lt, cl, cacheline;
270 char name[30];
271 #if 0
272 extern int pci_config_dump;
273 #endif
274
275 if (sc->sc_bridgetag)
276 node = PCITAG_NODE(*sc->sc_bridgetag);
277 else
278 node = pc->rootnode;
279
280 bus_frequency =
281 prom_getpropint(node, "clock-frequency", 33000000) / 1000000;
282
283 /*
284 * Make sure the cache line size is at least as big as the
285 * ecache line and the streaming cache (64 byte).
286 */
287 cacheline = max(ecache_min_line_size, 64);
288 KASSERT((cacheline/64)*64 == cacheline &&
289 (cacheline/ecache_min_line_size)*ecache_min_line_size == cacheline &&
290 (cacheline/4)*4 == cacheline);
291
292 #if 0
293 /*
294 * XXX this faults on Fire PCIe controllers.
295 * XXX move into the psycho and schizo driver front ends.
296 */
297 /* Turn on parity for the bus. */
298 tag = ofpci_make_tag(pc, node, sc->sc_bus, 0, 0);
299 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
300 csr |= PCI_COMMAND_PARITY_ENABLE;
301 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
302
303 /*
304 * Initialize the latency timer register.
305 * The value 0x40 is from Solaris.
306 */
307 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
308 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
309 bhlc |= 0x40 << PCI_LATTIMER_SHIFT;
310 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc);
311
312 if (pci_config_dump)
313 pci_conf_print(pc, tag, NULL);
314 #endif
315
316 for (node = prom_firstchild(node); node != 0 && node != -1;
317 node = prom_nextsibling(node)) {
318 name[0] = name[29] = 0;
319 prom_getpropstringA(node, "name", name, sizeof(name));
320
321 if (OF_getprop(node, "class-code", &class, sizeof(class)) !=
322 sizeof(class))
323 continue;
324 if (OF_getprop(node, "reg", ®, sizeof(reg)) < sizeof(reg))
325 panic("pci_enumerate_bus: \"%s\" regs too small", name);
326
327 b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi);
328 d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi);
329 f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi);
330
331 if (sc->sc_bus != b) {
332 aprint_error_dev(sc->sc_dev, "WARNING: incorrect "
333 "bus # for \"%s\" (%d/%d/%d)\n", name, b, d, f);
334 continue;
335 }
336 if ((locators[PCICF_DEV] != PCICF_DEV_DEFAULT) &&
337 (locators[PCICF_DEV] != d))
338 continue;
339 if ((locators[PCICF_FUNCTION] != PCICF_FUNCTION_DEFAULT) &&
340 (locators[PCICF_FUNCTION] != f))
341 continue;
342
343 tag = ofpci_make_tag(pc, node, b, d, f);
344
345 /*
346 * Turn on parity and fast-back-to-back for the device.
347 */
348 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
349 if (csr & PCI_STATUS_BACKTOBACK_SUPPORT)
350 csr |= PCI_COMMAND_BACKTOBACK_ENABLE;
351 csr |= PCI_COMMAND_PARITY_ENABLE;
352 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
353
354 /*
355 * Initialize the latency timer register for busmaster
356 * devices to work properly.
357 * latency-timer = min-grant * bus-freq / 4 (from FreeBSD)
358 * Also initialize the cache line size register.
359 * Solaris anytime sets this register to the value 0x10.
360 */
361 bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
362 ic = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
363
364 lt = min(PCI_MIN_GNT(ic) * bus_frequency / 4, 255);
365 if (lt == 0 || lt < PCI_LATTIMER(bhlc))
366 lt = PCI_LATTIMER(bhlc);
367
368 cl = PCI_CACHELINE(bhlc);
369 if (cl == 0)
370 cl = cacheline;
371
372 bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) |
373 (PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT));
374 bhlc |= (lt << PCI_LATTIMER_SHIFT) |
375 (cl << PCI_CACHELINE_SHIFT);
376 pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc);
377
378 ret = pci_probe_device(sc, tag, match, pap);
379 if (match != NULL && ret != 0)
380 return (ret);
381 }
382 return (0);
383 }
384
385 const char *
386 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
387 {
388 static char str[16];
389
390 sprintf(str, "ivec %x", ih);
391 DPRINTF(SPDB_INTR, ("pci_intr_string: returning %s\n", str));
392
393 return (str);
394 }
395
396 const struct evcnt *
397 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
398 {
399
400 /* XXX for now, no evcnt parent reported */
401 return NULL;
402 }
403
404 int
405 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih,
406 int attr, uint64_t data)
407 {
408
409 switch (attr) {
410 case PCI_INTR_MPSAFE:
411 return 0;
412 default:
413 return ENODEV;
414 }
415 }
416
417 /*
418 * interrupt mapping foo.
419 * XXX: how does this deal with multiple interrupts for a device?
420 */
421 int
422 pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
423 {
424 pcitag_t tag = pa->pa_tag;
425 int interrupts[4], *intp, int_used;
426 int len, node = PCITAG_NODE(tag);
427 char devtype[30];
428
429 intp = &interrupts[0];
430 len = prom_getproplen(node, "interrupts");
431 if (len > sizeof(interrupts)) {
432 DPRINTF(SPDB_INTMAP,
433 ("pci_intr_map: too many available interrupts\n"));
434 return (ENODEV);
435 }
436 if (prom_getprop(node, "interrupts", len,
437 &len, &intp) != 0 || len != 1) {
438 DPRINTF(SPDB_INTMAP,
439 ("pci_intr_map: could not read interrupts\n"));
440 return (ENODEV);
441 }
442
443 /* XXX We pick the first interrupt, but should do better */
444 int_used = interrupts[0];
445 if (OF_mapintr(node, &int_used, sizeof(int_used),
446 sizeof(int_used)) < 0) {
447 printf("OF_mapintr failed\n");
448 if (pa->pa_pc->spc_find_ino)
449 pa->pa_pc->spc_find_ino(pa, &int_used);
450 }
451 DPRINTF(SPDB_INTMAP, ("OF_mapintr() gave %x\n", int_used));
452
453 /* Try to find an IPL for this type of device. */
454 prom_getpropstringA(node, "device_type", devtype, sizeof(devtype));
455 for (len = 0; intrmap[len].in_class != NULL; len++)
456 if (strcmp(intrmap[len].in_class, devtype) == 0) {
457 int_used |= INTLEVENCODE(intrmap[len].in_lev);
458 DPRINTF(SPDB_INTMAP, ("reset to %x\n", int_used));
459 break;
460 }
461
462 *ihp = int_used;
463
464 /* Call the sub-driver is necessary */
465 if (pa->pa_pc->spc_intr_map)
466 (*pa->pa_pc->spc_intr_map)(pa, ihp);
467
468 return (0);
469 }
470
471 void
472 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
473 {
474
475 DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie));
476
477 /* XXX */
478 /* panic("can't disestablish PCI interrupts yet"); */
479 }
480
481 int
482 sparc_pci_childspace(int type)
483 {
484 int ss;
485
486 switch (type) {
487 case PCI_CONFIG_BUS_SPACE:
488 ss = 0x00;
489 break;
490 case PCI_IO_BUS_SPACE:
491 ss = 0x01;
492 break;
493 case PCI_MEMORY_BUS_SPACE:
494 ss = 0x02;
495 break;
496 #if 0
497 /* we don't do 64 bit memory space */
498 case PCI_MEMORY64_BUS_SPACE:
499 ss = 0x03;
500 break;
501 #endif
502 default:
503 panic("get_childspace: unknown bus type: %d", type);
504 }
505
506 return (ss);
507 }
508