psycho.c revision 1.28
1 /* $NetBSD: psycho.c,v 1.28 2000/12/04 20:29:34 fvdl Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include "opt_ddb.h" 32 33 /* 34 * PCI support for UltraSPARC `psycho' 35 */ 36 37 #undef DEBUG 38 #define DEBUG 39 40 #ifdef DEBUG 41 #define PDB_PROM 0x01 42 #define PDB_IOMMU 0x02 43 #define PDB_BUSMAP 0x04 44 #define PDB_BUSDMA 0x08 45 #define PDB_INTR 0x10 46 int psycho_debug = 0x0; 47 #define DPRINTF(l, s) do { if (psycho_debug & l) printf s; } while (0) 48 #else 49 #define DPRINTF(l, s) 50 #endif 51 52 #include <sys/param.h> 53 #include <sys/device.h> 54 #include <sys/errno.h> 55 #include <sys/extent.h> 56 #include <sys/malloc.h> 57 #include <sys/systm.h> 58 #include <sys/time.h> 59 60 #define _SPARC_BUS_DMA_PRIVATE 61 #include <machine/bus.h> 62 #include <machine/autoconf.h> 63 #include <machine/psl.h> 64 65 #include <dev/pci/pcivar.h> 66 #include <dev/pci/pcireg.h> 67 68 #include <sparc64/dev/iommureg.h> 69 #include <sparc64/dev/iommuvar.h> 70 #include <sparc64/dev/psychoreg.h> 71 #include <sparc64/dev/psychovar.h> 72 #include <sparc64/sparc64/cache.h> 73 74 #include "ioconf.h" 75 76 static pci_chipset_tag_t psycho_alloc_chipset __P((struct psycho_pbm *, int, 77 pci_chipset_tag_t)); 78 static void psycho_get_bus_range __P((int, int *)); 79 static void psycho_get_ranges __P((int, struct psycho_ranges **, int *)); 80 static void psycho_get_registers __P((int, struct psycho_registers **, int *)); 81 static void psycho_get_intmap __P((int, struct psycho_interrupt_map **, int *)); 82 static void psycho_get_intmapmask __P((int, struct psycho_interrupt_map_mask *)); 83 84 /* IOMMU support */ 85 static void psycho_iommu_init __P((struct psycho_softc *, int)); 86 87 /* 88 * bus space and bus dma support for UltraSPARC `psycho'. note that most 89 * of the bus dma support is provided by the iommu dvma controller. 90 */ 91 static int psycho_bus_mmap __P((bus_space_tag_t, bus_type_t, bus_addr_t, 92 int, bus_space_handle_t *)); 93 static int _psycho_bus_map __P((bus_space_tag_t, bus_type_t, bus_addr_t, 94 bus_size_t, int, vaddr_t, 95 bus_space_handle_t *)); 96 static void *psycho_intr_establish __P((bus_space_tag_t, int, int, int, 97 int (*) __P((void *)), void *)); 98 99 static int psycho_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 100 bus_size_t, struct proc *, int)); 101 static void psycho_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 102 static int psycho_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 103 bus_dma_segment_t *, int, bus_size_t, int)); 104 static void psycho_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 105 bus_size_t, int)); 106 int psycho_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 107 bus_dma_segment_t *, int, int *, int)); 108 void psycho_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int)); 109 int psycho_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 110 caddr_t *, int)); 111 void psycho_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t)); 112 113 /* base pci_chipset */ 114 extern struct sparc_pci_chipset _sparc_pci_chipset; 115 116 /* 117 * autoconfiguration 118 */ 119 static int psycho_match __P((struct device *, struct cfdata *, void *)); 120 static void psycho_attach __P((struct device *, struct device *, void *)); 121 static int psycho_print __P((void *aux, const char *p)); 122 123 static void sabre_init __P((struct psycho_softc *, 124 struct mainbus_attach_args *, 125 struct pcibus_attach_args *)); 126 static void psycho_init __P((struct psycho_softc *, 127 struct mainbus_attach_args *, 128 struct pcibus_attach_args *)); 129 130 struct cfattach psycho_ca = { 131 sizeof(struct psycho_softc), psycho_match, psycho_attach 132 }; 133 134 /* 135 * "sabre" is the UltraSPARC IIi onboard PCI interface, normally connected to 136 * an APB (advanced PCI bridge), which was designed specifically for the IIi. 137 * the APB appears as two "simba"'s underneath the sabre. real devices 138 * typically appear on the "simba"'s only. 139 * 140 * a pair of "psycho"s sit on the mainbus and have real devices attached to 141 * them. they implemented in the U2P (UPA to PCI). these two devices share 142 * register space and as such need to be configured together, even though the 143 * autoconfiguration will attach them separately. 144 * 145 * each of these appears as two usable PCI busses, though the sabre itself 146 * takes pci0 in this case, leaving real devices on pci1 and pci2. there can 147 * be multiple pairs of psycho's, however, in multi-board machines. 148 */ 149 #define ROM_PCI_NAME "pci" 150 #define ROM_SABRE_MODEL "SUNW,sabre" 151 #define ROM_SIMBA_MODEL "SUNW,simba" 152 #define ROM_PSYCHO_MODEL "SUNW,psycho" 153 154 static int 155 psycho_match(parent, match, aux) 156 struct device *parent; 157 struct cfdata *match; 158 void *aux; 159 { 160 struct mainbus_attach_args *ma = aux; 161 char *model = getpropstring(ma->ma_node, "model"); 162 163 /* match on a name of "pci" and a sabre or a psycho */ 164 if (strcmp(ma->ma_name, ROM_PCI_NAME) == 0 && 165 (strcmp(model, ROM_SABRE_MODEL) == 0 || 166 strcmp(model, ROM_PSYCHO_MODEL) == 0)) 167 return (1); 168 169 return (0); 170 } 171 172 static void 173 psycho_attach(parent, self, aux) 174 struct device *parent, *self; 175 void *aux; 176 { 177 struct psycho_softc *sc = (struct psycho_softc *)self; 178 struct pcibus_attach_args pba; 179 struct mainbus_attach_args *ma = aux; 180 char *model = getpropstring(ma->ma_node, "model"); 181 182 printf("\n"); 183 184 sc->sc_node = ma->ma_node; 185 sc->sc_bustag = ma->ma_bustag; 186 sc->sc_dmatag = ma->ma_dmatag; 187 188 /* 189 * pull in all the information about the psycho as we can. 190 */ 191 192 /* 193 * call the model-specific initialisation routine. 194 */ 195 if (strcmp(model, ROM_SABRE_MODEL) == 0) 196 sabre_init(sc, ma, &pba); 197 else if (strcmp(model, ROM_PSYCHO_MODEL) == 0) 198 psycho_init(sc, ma, &pba); 199 #ifdef DIAGNOSTIC 200 else 201 panic("psycho_attach: unknown model %s?", model); 202 #endif 203 204 /* 205 * attach the pci.. note we pass PCI A tags, etc., for the sabre here. 206 */ 207 pba.pba_busname = "pci"; 208 pba.pba_flags = sc->sc_psycho_this->pp_flags; 209 pba.pba_dmat = sc->sc_psycho_this->pp_dmat; 210 pba.pba_iot = sc->sc_psycho_this->pp_iot; 211 pba.pba_memt = sc->sc_psycho_this->pp_memt; 212 213 config_found(self, &pba, psycho_print); 214 } 215 216 static int 217 psycho_print(aux, p) 218 void *aux; 219 const char *p; 220 { 221 222 if (p == NULL) 223 return (UNCONF); 224 return (QUIET); 225 } 226 227 /* 228 * SUNW,sabre initialisation .. 229 * - get the sabre's ranges. this are used for both simba's. 230 * - find the two SUNW,simba's underneath (a and b) 231 * - work out which simba is which via the bus-range property 232 * - get each simba's interrupt-map and interrupt-map-mask. 233 * - turn on the iommu 234 */ 235 static void 236 sabre_init(sc, ma, pba) 237 struct psycho_softc *sc; 238 struct mainbus_attach_args *ma; 239 struct pcibus_attach_args *pba; 240 { 241 struct psycho_pbm *pp; 242 bus_space_handle_t bh; 243 u_int64_t csr; 244 unsigned int node; 245 int sabre_br[2], simba_br[2]; 246 247 /* 248 * The sabre gets two register banks: 249 * (0) per-PBM PCI configuration space, containing only the 250 * PBM 256-byte PCI header 251 * (1) the shared psycho configuration registers (struct psychoreg) 252 * 253 * XXX use the prom address for the psycho registers? we do so far. 254 */ 255 sc->sc_regs = (struct psychoreg *)(u_long)ma->ma_address[0]; 256 sc->sc_basepaddr = (paddr_t)ma->ma_reg[0].ur_paddr; 257 sc->sc_ign = 0x7c0; /* XXX - try not to hardcode? */ 258 259 /* who? said a voice, incredulous */ 260 sc->sc_mode = PSYCHO_MODE_SABRE; 261 printf("sabre: "); 262 263 /* setup the PCI control register; there is only one for the sabre */ 264 csr = bus_space_read_8(sc->sc_bustag, (bus_space_handle_t)(u_long) 265 &sc->sc_regs->psy_pcictl[0].pci_csr, 0); 266 csr |= PCICTL_MRLM | 267 PCICTL_ARB_PARK | 268 PCICTL_ERRINTEN | 269 PCICTL_4ENABLE; 270 csr &= ~(PCICTL_SERR | 271 PCICTL_CPU_PRIO | 272 PCICTL_ARB_PRIO | 273 PCICTL_RTRYWAIT); 274 bus_space_write_8(sc->sc_bustag, 275 (bus_space_handle_t)(u_long)&sc->sc_regs->psy_pcictl[0].pci_csr, 276 0, csr); 277 278 /* allocate a pair of psycho_pbm's for our simba's */ 279 sc->sc_sabre = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 280 sc->sc_simba_a = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 281 sc->sc_simba_b = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 282 if (sc->sc_sabre == NULL || sc->sc_simba_a == NULL || 283 sc->sc_simba_b == NULL) 284 panic("could not allocate simba pbm's"); 285 286 memset(sc->sc_sabre, 0, sizeof *pp); 287 memset(sc->sc_simba_a, 0, sizeof *pp); 288 memset(sc->sc_simba_b, 0, sizeof *pp); 289 290 /* grab the sabre ranges; use them for both simba's */ 291 psycho_get_ranges(sc->sc_node, &sc->sc_sabre->pp_range, 292 &sc->sc_sabre->pp_nrange); 293 sc->sc_simba_b->pp_range = sc->sc_simba_a->pp_range = 294 sc->sc_sabre->pp_range; 295 sc->sc_simba_b->pp_nrange = sc->sc_simba_a->pp_nrange = 296 sc->sc_sabre->pp_nrange; 297 298 /* get the bus-range for the sabre. we expect 0..2 */ 299 psycho_get_bus_range(sc->sc_node, sabre_br); 300 301 pba->pba_bus = sabre_br[0]; 302 303 printf("bus range %u to %u", sabre_br[0], sabre_br[1]); 304 305 for (node = firstchild(sc->sc_node); node; node = nextsibling(node)) { 306 char *name = getpropstring(node, "name"); 307 char *model, who; 308 struct psycho_registers *regs = NULL; 309 int nregs, fn; 310 311 if (strcmp(name, ROM_PCI_NAME) != 0) 312 continue; 313 314 model = getpropstring(node, "model"); 315 if (strcmp(model, ROM_SIMBA_MODEL) != 0) 316 continue; 317 318 psycho_get_bus_range(node, simba_br); 319 psycho_get_registers(node, ®s, &nregs); 320 321 fn = TAG2FN(regs->phys_hi); 322 switch (fn) { 323 case 0: 324 pp = sc->sc_simba_a; 325 who = 'a'; 326 pp->pp_regs = regs; 327 pp->pp_nregs = nregs; 328 break; 329 case 1: 330 pp = sc->sc_simba_b; 331 who = 'b'; 332 pp->pp_regs = regs; 333 pp->pp_nregs = nregs; 334 break; 335 default: 336 panic("illegal simba funcion %d\n", fn); 337 } 338 pp->pp_pcictl = &sc->sc_regs->psy_pcictl[0]; 339 /* link us in .. */ 340 pp->pp_sc = sc; 341 342 printf("; simba %c, PCI bus %d", who, simba_br[0]); 343 344 /* grab the simba registers, interrupt map and map mask */ 345 psycho_get_intmap(node, &pp->pp_intmap, &pp->pp_nintmap); 346 psycho_get_intmapmask(node, &pp->pp_intmapmask); 347 348 /* allocate our tags */ 349 pp->pp_memt = psycho_alloc_mem_tag(pp); 350 pp->pp_iot = psycho_alloc_io_tag(pp); 351 pp->pp_dmat = psycho_alloc_dma_tag(pp); 352 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 353 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 354 355 /* allocate a chipset for this */ 356 pp->pp_pc = psycho_alloc_chipset(pp, node, &_sparc_pci_chipset); 357 pp->pp_pc->busno = pp->pp_bus = simba_br[0]; 358 } 359 360 /* setup the rest of the sabre pbm */ 361 pp = sc->sc_sabre; 362 pp->pp_sc = sc; 363 pp->pp_memt = sc->sc_psycho_this->pp_memt; 364 pp->pp_iot = sc->sc_psycho_this->pp_iot; 365 pp->pp_dmat = sc->sc_psycho_this->pp_dmat; 366 pp->pp_flags = sc->sc_psycho_this->pp_flags; 367 pp->pp_intmap = NULL; 368 pp->pp_regs = NULL; 369 pp->pp_pcictl = sc->sc_psycho_this->pp_pcictl; 370 pba->pba_pc = psycho_alloc_chipset(pp, sc->sc_node, 371 sc->sc_psycho_this->pp_pc); 372 373 printf("\n"); 374 375 376 /* 377 * SABRE seems to be buggy. It only appears to work with 128K IOTSB. 378 * I have tried other sizes but they just don't seem to work. Maybe 379 * more testing is needed. 380 * 381 * The PROM reserves a certain amount of RAM for an IOTSB. The 382 * problem is that it's not necessarily the full 128K. So we'll free 383 * this space up and let iommu_init() allocate a full mapping. 384 * 385 * (Otherwise we would need to change the iommu code to handle a 386 * preallocated TSB that may not cover the entire DVMA address 387 * space... 388 * 389 * The information about this memory is shared between the 390 * `virtual-dma' property, which describes the base and size of the 391 * virtual region, and the IOMMU base address register which is the 392 * only known pointer to the RAM. To free up the memory you need to 393 * read the base addres register and then calculate the size by taking 394 * the virtual size and dividing it by 1K to get the size in bytes. 395 * This range can then be freed up by calling uvm_page_physload(). 396 * 397 */ 398 399 /* and finally start up the IOMMU ... */ 400 psycho_iommu_init(sc, 7); 401 402 /* 403 * get us a config space tag, and punch in the physical address 404 * of the PCI configuration space. note that we use unmapped 405 * access to PCI configuration space, relying on the bus space 406 * macros to provide the proper ASI based on the bus tag. 407 */ 408 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_simba_a); 409 if (bus_space_map2(sc->sc_bustag, 410 PCI_CONFIG_BUS_SPACE, 411 sc->sc_basepaddr + 0x01000000, 412 0x0100000, 413 0, 414 0, 415 &bh)) 416 panic("could not map sabre PCI configuration space"); 417 sc->sc_configaddr = bh; 418 } 419 420 /* 421 * SUNW,psycho initialisation .. 422 * - XXX what do we do here? 423 * 424 * i think that an attaching psycho should here find it's partner psycho 425 * and if they haven't been attached yet, allocate both psycho_pbm's and 426 * fill them both in here, and when the partner attaches, there is little 427 * to do... perhaps keep a static array of what psycho have been found so 428 * far (or perhaps those that have not yet been finished). .mrg. 429 * note that the partner can be found via matching `ranges' properties. 430 */ 431 static void 432 psycho_init(sc, ma, pba) 433 struct psycho_softc *sc; 434 struct mainbus_attach_args *ma; 435 struct pcibus_attach_args *pba; 436 { 437 struct psycho_softc *osc = NULL; 438 struct psycho_pbm *pp; 439 bus_space_handle_t bh; 440 u_int64_t csr; 441 int psycho_br[2], n; 442 struct pci_ctl *pci_ctl; 443 444 /* 445 * The psycho gets three register banks: 446 * (0) per-PBM configuration and status registers 447 * (1) per-PBM PCI configuration space, containing only the 448 * PBM 256-byte PCI header 449 * (2) the shared psycho configuration registers (struct psychoreg) 450 * 451 * XXX use the prom address for the psycho registers? we do so far. 452 */ 453 sc->sc_regs = (struct psychoreg *)(u_long)ma->ma_address[2]; 454 sc->sc_basepaddr = (paddr_t)ma->ma_reg[2].ur_paddr; 455 pci_ctl = (struct pci_ctl *)(u_long)ma->ma_address[0]; 456 457 csr = sc->sc_regs->psy_csr; 458 printf("psycho: impl %d, version %d: ", 459 PSYCHO_GCSR_IMPL(csr), PSYCHO_GCSR_VERS(csr) ); 460 461 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 462 463 sc->sc_mode = PSYCHO_MODE_PSYCHO; 464 465 /* 466 * Match other psycho's that are already configured against 467 * the base physical address. This will be the same for a 468 * pair of devices that share register space. 469 */ 470 for (n = 0; n < psycho_cd.cd_ndevs; n++) { 471 472 struct psycho_softc *asc = 473 (struct psycho_softc *)psycho_cd.cd_devs[n]; 474 475 if (asc == NULL || asc == sc) 476 /* This entry is not there or it is me */ 477 continue; 478 479 if (asc->sc_basepaddr != sc->sc_basepaddr) 480 /* This is an unrelated psycho */ 481 continue; 482 483 /* Found partner */ 484 osc = asc; 485 break; 486 } 487 488 489 /* Oh, dear. OK, lets get started */ 490 491 /* 492 * Setup the PCI control register 493 */ 494 csr = bus_space_read_8(sc->sc_bustag, 495 (bus_space_handle_t)(u_long)&pci_ctl->pci_csr, 0); 496 csr |= PCICTL_MRLM | 497 PCICTL_ARB_PARK | 498 PCICTL_ERRINTEN | 499 PCICTL_4ENABLE; 500 csr &= ~(PCICTL_SERR | 501 PCICTL_CPU_PRIO | 502 PCICTL_ARB_PRIO | 503 PCICTL_RTRYWAIT); 504 bus_space_write_8(sc->sc_bustag, 505 (bus_space_handle_t)(u_long)&pci_ctl->pci_csr, 0, csr); 506 507 508 /* 509 * Allocate our psycho_pbm 510 */ 511 pp = sc->sc_psycho_this = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 512 if (pp == NULL) 513 panic("could not allocate psycho pbm"); 514 515 memset(pp, 0, sizeof *pp); 516 517 pp->pp_sc = sc; 518 519 /* grab the psycho ranges */ 520 psycho_get_ranges(sc->sc_node, &pp->pp_range, &pp->pp_nrange); 521 522 /* get the bus-range for the psycho */ 523 psycho_get_bus_range(sc->sc_node, psycho_br); 524 525 pba->pba_bus = psycho_br[0]; 526 527 printf("bus range %u to %u", psycho_br[0], psycho_br[1]); 528 printf("; PCI bus %d", psycho_br[0]); 529 530 pp->pp_pcictl = &sc->sc_regs->psy_pcictl[0]; 531 532 /* grab the interrupt map and map mask */ 533 psycho_get_intmap(sc->sc_node, &pp->pp_intmap, &pp->pp_nintmap); 534 psycho_get_intmapmask(sc->sc_node, &pp->pp_intmapmask); 535 536 /* allocate our tags */ 537 pp->pp_memt = psycho_alloc_mem_tag(pp); 538 pp->pp_iot = psycho_alloc_io_tag(pp); 539 pp->pp_dmat = psycho_alloc_dma_tag(pp); 540 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 541 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 542 543 /* allocate a chipset for this */ 544 pp->pp_pc = psycho_alloc_chipset(pp, sc->sc_node, &_sparc_pci_chipset); 545 546 /* setup the rest of the psycho pbm */ 547 pba->pba_pc = psycho_alloc_chipset(pp, sc->sc_node, pp->pp_pc); 548 549 printf("\n"); 550 551 /* 552 * And finally, if we're the first of a pair of psycho's to 553 * arrive here, start up the IOMMU and get a config space tag. 554 * Note that we use unmapped access to PCI configuration space, 555 * relying on the bus space macros to provide the proper ASI based 556 * on the bus tag. 557 */ 558 if (osc == NULL) { 559 /* 560 * Setup IOMMU and PCI configuration if we're the first 561 * of a pair of psycho's to arrive here. 562 * 563 * We should calculate a TSB size based on amount of RAM 564 * and number of bus controllers. 565 * 566 * For the moment, 32KB should be more than enough. 567 */ 568 psycho_iommu_init(sc, 2); 569 570 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_psycho_this); 571 if (bus_space_map2(sc->sc_bustag, 572 PCI_CONFIG_BUS_SPACE, 573 sc->sc_basepaddr + 0x01000000, 574 0x0100000, 575 0, 576 0, 577 &bh)) 578 panic("could not map psycho PCI configuration space"); 579 sc->sc_configaddr = (off_t)bh; 580 } else { 581 /* Just copy IOMMU state, config tag and address */ 582 sc->sc_is = osc->sc_is; 583 sc->sc_configtag = osc->sc_configtag; 584 sc->sc_configaddr = osc->sc_configaddr; 585 } 586 } 587 588 /* 589 * PCI bus support 590 */ 591 592 /* 593 * allocate a PCI chipset tag and set it's cookie. 594 */ 595 static pci_chipset_tag_t 596 psycho_alloc_chipset(pp, node, pc) 597 struct psycho_pbm *pp; 598 int node; 599 pci_chipset_tag_t pc; 600 { 601 pci_chipset_tag_t npc; 602 603 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 604 if (npc == NULL) 605 panic("could not allocate pci_chipset_tag_t"); 606 memcpy(npc, pc, sizeof *pc); 607 npc->cookie = pp; 608 npc->node = node; 609 610 return (npc); 611 } 612 613 /* 614 * grovel the OBP for various psycho properties 615 */ 616 static void 617 psycho_get_bus_range(node, brp) 618 int node; 619 int *brp; 620 { 621 int n; 622 623 if (getprop(node, "bus-range", sizeof(*brp), &n, (void **)&brp)) 624 panic("could not get psycho bus-range"); 625 if (n != 2) 626 panic("broken psycho bus-range"); 627 DPRINTF(PDB_PROM, ("psycho debug: got `bus-range' for node %08x: %u - %u\n", node, brp[0], brp[1])); 628 } 629 630 static void 631 psycho_get_ranges(node, rp, np) 632 int node; 633 struct psycho_ranges **rp; 634 int *np; 635 { 636 637 if (getprop(node, "ranges", sizeof(**rp), np, (void **)rp)) 638 panic("could not get psycho ranges"); 639 DPRINTF(PDB_PROM, ("psycho debug: got `ranges' for node %08x: %d entries\n", node, *np)); 640 } 641 642 static void 643 psycho_get_registers(node, rp, np) 644 int node; 645 struct psycho_registers **rp; 646 int *np; 647 { 648 649 if (getprop(node, "reg", sizeof(**rp), np, (void **)rp)) 650 panic("could not get psycho registers"); 651 DPRINTF(PDB_PROM, ("psycho debug: got `reg' for node %08x: %d entries\n", node, *np)); 652 } 653 654 static void 655 psycho_get_intmap(node, imp, np) 656 int node; 657 struct psycho_interrupt_map **imp; 658 int *np; 659 { 660 661 if (getprop(node, "interrupt-map", sizeof(**imp), np, (void **)imp)) 662 panic("could not get psycho interrupt-map"); 663 DPRINTF(PDB_PROM, ("psycho debug: got `interupt-map' for node %08x\n", node)); 664 } 665 666 static void 667 psycho_get_intmapmask(node, immp) 668 int node; 669 struct psycho_interrupt_map_mask *immp; 670 { 671 int n; 672 673 if (getprop(node, "interrupt-map-mask", sizeof(*immp), &n, 674 (void **)&immp)) 675 panic("could not get psycho interrupt-map-mask"); 676 if (n != 1) 677 panic("broken psycho interrupt-map-mask"); 678 DPRINTF(PDB_PROM, ("psycho debug: got `interrupt-map-mask' for node %08x\n", node)); 679 } 680 681 /* 682 * initialise the IOMMU.. 683 */ 684 void 685 psycho_iommu_init(sc, tsbsize) 686 struct psycho_softc *sc; 687 int tsbsize; 688 { 689 char *name; 690 struct iommu_state *is; 691 692 is = malloc(sizeof(struct iommu_state), M_DEVBUF, M_NOWAIT); 693 if (is == NULL) 694 panic("psycho_iommu_init: malloc is"); 695 696 sc->sc_is = is; 697 698 /* punch in our copies */ 699 is->is_bustag = sc->sc_bustag; 700 is->is_iommu = &sc->sc_regs->psy_iommu; 701 702 if (getproplen(sc->sc_node, "no-streaming-cache") < 0) 703 is->is_sb = 0; 704 else 705 is->is_sb = &sc->sc_regs->psy_iommu_strbuf; 706 707 /* give us a nice name.. */ 708 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 709 if (name == 0) 710 panic("couldn't malloc iommu name"); 711 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 712 713 iommu_init(name, is, tsbsize); 714 } 715 716 /* 717 * below here is bus space and bus dma support 718 */ 719 bus_space_tag_t 720 psycho_alloc_bus_tag(pp, type) 721 struct psycho_pbm *pp; 722 int type; 723 { 724 struct psycho_softc *sc = pp->pp_sc; 725 bus_space_tag_t bt; 726 727 bt = (bus_space_tag_t) 728 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 729 if (bt == NULL) 730 panic("could not allocate psycho bus tag"); 731 732 bzero(bt, sizeof *bt); 733 bt->cookie = pp; 734 bt->parent = sc->sc_bustag; 735 bt->type = type; 736 bt->sparc_bus_map = _psycho_bus_map; 737 bt->sparc_bus_mmap = psycho_bus_mmap; 738 bt->sparc_intr_establish = psycho_intr_establish; 739 return (bt); 740 } 741 742 bus_dma_tag_t 743 psycho_alloc_dma_tag(pp) 744 struct psycho_pbm *pp; 745 { 746 struct psycho_softc *sc = pp->pp_sc; 747 bus_dma_tag_t dt, pdt = sc->sc_dmatag; 748 749 dt = (bus_dma_tag_t) 750 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 751 if (dt == NULL) 752 panic("could not allocate psycho dma tag"); 753 754 bzero(dt, sizeof *dt); 755 dt->_cookie = pp; 756 dt->_parent = pdt; 757 #define PCOPY(x) dt->x = pdt->x 758 PCOPY(_dmamap_create); 759 PCOPY(_dmamap_destroy); 760 dt->_dmamap_load = psycho_dmamap_load; 761 PCOPY(_dmamap_load_mbuf); 762 PCOPY(_dmamap_load_uio); 763 dt->_dmamap_load_raw = psycho_dmamap_load_raw; 764 dt->_dmamap_unload = psycho_dmamap_unload; 765 dt->_dmamap_sync = psycho_dmamap_sync; 766 dt->_dmamem_alloc = psycho_dmamem_alloc; 767 dt->_dmamem_free = psycho_dmamem_free; 768 dt->_dmamem_map = psycho_dmamem_map; 769 dt->_dmamem_unmap = psycho_dmamem_unmap; 770 PCOPY(_dmamem_mmap); 771 #undef PCOPY 772 return (dt); 773 } 774 775 /* 776 * bus space support. <sparc64/dev/psychoreg.h> has a discussion about 777 * PCI physical addresses. 778 */ 779 780 static int get_childspace __P((int)); 781 782 static int 783 get_childspace(type) 784 int type; 785 { 786 int ss; 787 788 switch (type) { 789 case PCI_CONFIG_BUS_SPACE: 790 ss = 0x00; 791 break; 792 case PCI_IO_BUS_SPACE: 793 ss = 0x01; 794 break; 795 case PCI_MEMORY_BUS_SPACE: 796 ss = 0x02; 797 break; 798 #if 0 799 /* we don't do 64 bit memory space */ 800 case PCI_MEMORY64_BUS_SPACE: 801 ss = 0x03; 802 break; 803 #endif 804 default: 805 panic("get_childspace: unknown bus type"); 806 } 807 808 return (ss); 809 } 810 811 static int 812 _psycho_bus_map(t, btype, offset, size, flags, vaddr, hp) 813 bus_space_tag_t t; 814 bus_type_t btype; 815 bus_addr_t offset; 816 bus_size_t size; 817 int flags; 818 vaddr_t vaddr; 819 bus_space_handle_t *hp; 820 { 821 struct psycho_pbm *pp = t->cookie; 822 struct psycho_softc *sc = pp->pp_sc; 823 int i, ss; 824 825 DPRINTF(PDB_BUSMAP, ("_psycho_bus_map: type %d off %qx sz %qx flags %d va %p", t->type, (unsigned long long)offset, (unsigned long long)size, flags, 826 (void *)vaddr)); 827 828 ss = get_childspace(t->type); 829 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 830 831 832 for (i = 0; i < pp->pp_nrange; i++) { 833 bus_addr_t paddr; 834 835 if (((pp->pp_range[i].cspace >> 24) & 0x03) != ss) 836 continue; 837 838 paddr = pp->pp_range[i].phys_lo + offset; 839 paddr |= ((bus_addr_t)pp->pp_range[i].phys_hi<<32); 840 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_map: mapping paddr space %lx offset %lx paddr %qx\n", 841 (long)ss, (long)offset, 842 (unsigned long long)paddr)); 843 return (bus_space_map2(sc->sc_bustag, t->type, paddr, 844 size, flags, vaddr, hp)); 845 } 846 DPRINTF(PDB_BUSMAP, (" FAILED\n")); 847 return (EINVAL); 848 } 849 850 static int 851 psycho_bus_mmap(t, btype, paddr, flags, hp) 852 bus_space_tag_t t; 853 bus_type_t btype; 854 bus_addr_t paddr; 855 int flags; 856 bus_space_handle_t *hp; 857 { 858 bus_addr_t offset = paddr; 859 struct psycho_pbm *pp = t->cookie; 860 struct psycho_softc *sc = pp->pp_sc; 861 int i, ss; 862 863 ss = get_childspace(t->type); 864 865 DPRINTF(PDB_BUSMAP, ("_psycho_bus_mmap: type %d flags %d pa %qx\n", btype, flags, (unsigned long long)paddr)); 866 867 for (i = 0; i < pp->pp_nrange; i++) { 868 bus_addr_t paddr; 869 870 if (((pp->pp_range[i].cspace >> 24) & 0x03) != ss) 871 continue; 872 873 paddr = pp->pp_range[i].phys_lo + offset; 874 paddr |= ((bus_addr_t)pp->pp_range[i].phys_hi<<32); 875 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_mmap: mapping paddr space %lx offset %lx paddr %qx\n", 876 (long)ss, (long)offset, 877 (unsigned long long)paddr)); 878 return (bus_space_mmap(sc->sc_bustag, 0, paddr, 879 flags, hp)); 880 } 881 882 return (-1); 883 } 884 885 /* 886 * interrupt mapping. this tells what sparc ipl any given ino runs at. 887 */ 888 static int pci_ino_to_ipl_table[] = { 889 0, 0, 0, 0, /* PCI A, Slot 0, INTA#/B#/C#/D# */ 890 0, 0, 0, 0, /* PCI A, Slot 1, INTA#/B#/C#/D# */ 891 0, 0, 0, 0, /* PCI A, Slot 2, INTA#/B#/C#/D# (unavailable) */ 892 0, 0, 0, 0, /* PCI A, Slot 3, INTA#/B#/C#/D# (unavailable) */ 893 0, 0, 0, 0, /* PCI B, Slot 0, INTA#/B#/C#/D# */ 894 0, 0, 0, 0, /* PCI B, Slot 1, INTA#/B#/C#/D# */ 895 0, 0, 0, 0, /* PCI B, Slot 2, INTA#/B#/C#/D# */ 896 0, 0, 0, 0, /* PCI B, Slot 3, INTA#/B#/C#/D# */ 897 PIL_SCSI, /* SCSI */ 898 PIL_NET, /* Ethernet */ 899 3, /* Parallel */ 900 PIL_AUD, /* Audio Record */ 901 PIL_AUD, /* Audio Playback */ 902 14, /* Power Fail */ 903 4, /* Keyboard/Mouse/Serial */ 904 PIL_FD, /* Floppy */ 905 14, /* Thermal Warning */ 906 PIL_SER, /* Keyboard */ 907 PIL_SER, /* Mouse */ 908 PIL_SER, /* Serial */ 909 0, /* Reserved */ 910 0, /* Reserved */ 911 14, /* Uncorrectable ECC error */ 912 14, /* Correctable ECC error */ 913 14, /* PCI A bus error */ 914 14, /* PCI B bus error */ 915 14, /* power management */ 916 }; 917 918 int 919 psycho_intr_map(tag, pin, line, ihp) 920 pcitag_t tag; 921 int pin; 922 int line; 923 pci_intr_handle_t *ihp; 924 { 925 926 if (line < 0 || line > 0x32) 927 panic("psycho_intr_map: line line < 0 || line > 0x32"); 928 929 /* UltraSPARC IIi does not use this register, but we have set it */ 930 (*ihp) = line; 931 return (0); 932 } 933 934 /* 935 * install an interrupt handler for a PCI device 936 */ 937 void * 938 psycho_intr_establish(t, ihandle, level, flags, handler, arg) 939 bus_space_tag_t t; 940 int ihandle; 941 int level; 942 int flags; 943 int (*handler) __P((void *)); 944 void *arg; 945 { 946 struct psycho_pbm *pp = t->cookie; 947 struct psycho_softc *sc = pp->pp_sc; 948 struct intrhand *ih; 949 int ino; 950 long vec = ihandle; 951 952 ih = (struct intrhand *) 953 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 954 if (ih == NULL) 955 return (NULL); 956 957 DPRINTF(PDB_INTR, ("\npsycho_intr_establish: ihandle %x", ihandle)); 958 ino = INTINO(vec); 959 DPRINTF(PDB_INTR, (" ino %x", ino)); 960 if ((flags & BUS_INTR_ESTABLISH_SOFTINTR) == 0) { 961 volatile int64_t *intrmapptr, *intrclrptr; 962 int64_t intrmap = 0; 963 int i; 964 965 DPRINTF(PDB_INTR, ("\npsycho: intr %lx: %p\nHunting for IRQ...\n", 966 (long)ino, intrlev[ino])); 967 if ((ino & INTMAP_OBIO) == 0) { 968 /* 969 * there are only 8 PCI interrupt INO's available 970 */ 971 i = INTPCIINOX(vec); 972 973 intrmapptr = &((&sc->sc_regs->pcia_slot0_int)[i]); 974 intrclrptr = &sc->sc_regs->pcia0_clr_int[ino]; 975 976 DPRINTF(PDB_INTR, ("- turning on PCI intr %d", i)); 977 } else { 978 /* 979 * there are INTPCI_MAXOBINO (0x16) OBIO interrupts 980 * available here (i think). 981 */ 982 i = INTPCIOBINOX(vec); 983 if (i > INTPCI_MAXOBINO) 984 panic("ino %ld", vec); 985 986 intrmapptr = &((&sc->sc_regs->scsi_int_map)[i]); 987 intrclrptr = &((&sc->sc_regs->scsi_clr_int)[i]); 988 989 DPRINTF(PDB_INTR, ("- turning on OBIO intr %d", i)); 990 } 991 992 /* Register the map and clear intr registers */ 993 ih->ih_map = intrmapptr; 994 ih->ih_clr = intrclrptr; 995 996 /* 997 * Read the current value as we can't change it besides the 998 * valid bit so so make sure only this bit is changed. 999 */ 1000 intrmap = *intrmapptr; 1001 DPRINTF(PDB_INTR, ("; read intrmap = %016qx", 1002 (unsigned long long)intrmap)); 1003 1004 /* Enable the interrupt */ 1005 intrmap |= INTMAP_V; 1006 DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr)); 1007 DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", 1008 (unsigned long long)intrmap)); 1009 *intrmapptr = intrmap; 1010 DPRINTF(PDB_INTR, ("; reread intrmap = %016qx", 1011 (unsigned long long)(intrmap = *intrmapptr))); 1012 } 1013 #ifdef NOT_DEBUG 1014 if (psycho_debug & PDB_INTR) { 1015 long i; 1016 1017 for (i = 0; i < 500000000; i++) 1018 continue; 1019 } 1020 #endif 1021 1022 ih->ih_fun = handler; 1023 ih->ih_arg = arg; 1024 ih->ih_number = ino | sc->sc_ign; 1025 /* 1026 * If a `device class' level is specified, use it, 1027 * else get the PIL from a built-in table. 1028 */ 1029 if (level != IPL_NONE) 1030 ih->ih_pil = level; 1031 else 1032 ih->ih_pil = pci_ino_to_ipl_table[ino]; 1033 1034 DPRINTF(PDB_INTR, ( 1035 "; installing handler %p arg %p with ino %u pil %u\n", 1036 handler, arg, (u_int)ino, (u_int)ih->ih_pil)); 1037 1038 intr_establish(ih->ih_pil, ih); 1039 return (ih); 1040 } 1041 1042 /* 1043 * hooks into the iommu dvma calls. 1044 */ 1045 int 1046 psycho_dmamap_load(t, map, buf, buflen, p, flags) 1047 bus_dma_tag_t t; 1048 bus_dmamap_t map; 1049 void *buf; 1050 bus_size_t buflen; 1051 struct proc *p; 1052 int flags; 1053 { 1054 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1055 struct psycho_softc *sc = pp->pp_sc; 1056 1057 return (iommu_dvmamap_load(t, sc->sc_is, map, buf, buflen, p, flags)); 1058 } 1059 1060 void 1061 psycho_dmamap_unload(t, map) 1062 bus_dma_tag_t t; 1063 bus_dmamap_t map; 1064 { 1065 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1066 struct psycho_softc *sc = pp->pp_sc; 1067 1068 iommu_dvmamap_unload(t, sc->sc_is, map); 1069 } 1070 1071 int 1072 psycho_dmamap_load_raw(t, map, segs, nsegs, size, flags) 1073 bus_dma_tag_t t; 1074 bus_dmamap_t map; 1075 bus_dma_segment_t *segs; 1076 int nsegs; 1077 bus_size_t size; 1078 int flags; 1079 { 1080 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1081 struct psycho_softc *sc = pp->pp_sc; 1082 1083 return (iommu_dvmamap_load_raw(t, sc->sc_is, map, segs, nsegs, flags, size)); 1084 } 1085 1086 void 1087 psycho_dmamap_sync(t, map, offset, len, ops) 1088 bus_dma_tag_t t; 1089 bus_dmamap_t map; 1090 bus_addr_t offset; 1091 bus_size_t len; 1092 int ops; 1093 { 1094 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1095 struct psycho_softc *sc = pp->pp_sc; 1096 1097 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 1098 /* Flush the CPU then the IOMMU */ 1099 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1100 iommu_dvmamap_sync(t, sc->sc_is, map, offset, len, ops); 1101 } 1102 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 1103 /* Flush the IOMMU then the CPU */ 1104 iommu_dvmamap_sync(t, sc->sc_is, map, offset, len, ops); 1105 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1106 } 1107 1108 } 1109 1110 int 1111 psycho_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags) 1112 bus_dma_tag_t t; 1113 bus_size_t size; 1114 bus_size_t alignment; 1115 bus_size_t boundary; 1116 bus_dma_segment_t *segs; 1117 int nsegs; 1118 int *rsegs; 1119 int flags; 1120 { 1121 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1122 struct psycho_softc *sc = pp->pp_sc; 1123 1124 return (iommu_dvmamem_alloc(t, sc->sc_is, size, alignment, boundary, 1125 segs, nsegs, rsegs, flags)); 1126 } 1127 1128 void 1129 psycho_dmamem_free(t, segs, nsegs) 1130 bus_dma_tag_t t; 1131 bus_dma_segment_t *segs; 1132 int nsegs; 1133 { 1134 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1135 struct psycho_softc *sc = pp->pp_sc; 1136 1137 iommu_dvmamem_free(t, sc->sc_is, segs, nsegs); 1138 } 1139 1140 int 1141 psycho_dmamem_map(t, segs, nsegs, size, kvap, flags) 1142 bus_dma_tag_t t; 1143 bus_dma_segment_t *segs; 1144 int nsegs; 1145 size_t size; 1146 caddr_t *kvap; 1147 int flags; 1148 { 1149 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1150 struct psycho_softc *sc = pp->pp_sc; 1151 1152 return (iommu_dvmamem_map(t, sc->sc_is, segs, nsegs, size, kvap, flags)); 1153 } 1154 1155 void 1156 psycho_dmamem_unmap(t, kva, size) 1157 bus_dma_tag_t t; 1158 caddr_t kva; 1159 size_t size; 1160 { 1161 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1162 struct psycho_softc *sc = pp->pp_sc; 1163 1164 iommu_dvmamem_unmap(t, sc->sc_is, kva, size); 1165 } 1166
Indexes created Thu Sep 25 16:09:42 GMT 2025