psycho.c revision 1.8
1 /* $NetBSD: psycho.c,v 1.8 2000/05/06 04:15:35 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include "opt_ddb.h" 32 33 /* 34 * PCI support for UltraSPARC `psycho' 35 */ 36 37 #undef DEBUG 38 #define DEBUG 39 40 #ifdef DEBUG 41 #define PDB_PROM 0x01 42 #define PDB_IOMMU 0x02 43 #define PDB_BUSMAP 0x04 44 #define PDB_BUSDMA 0x08 45 #define PDB_INTR 0x10 46 int psycho_debug = 0x0; 47 #define DPRINTF(l, s) do { if (psycho_debug & l) printf s; } while (0) 48 #else 49 #define DPRINTF(l, s) 50 #endif 51 52 #include <sys/param.h> 53 #include <sys/device.h> 54 #include <sys/errno.h> 55 #include <sys/extent.h> 56 #include <sys/malloc.h> 57 #include <sys/systm.h> 58 #include <sys/time.h> 59 60 #include <vm/vm.h> 61 #include <vm/vm_kern.h> 62 63 #define _SPARC_BUS_DMA_PRIVATE 64 #include <machine/bus.h> 65 #include <machine/autoconf.h> 66 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/pcireg.h> 69 70 #include <sparc64/dev/iommureg.h> 71 #include <sparc64/dev/iommuvar.h> 72 #include <sparc64/dev/psychoreg.h> 73 #include <sparc64/dev/psychovar.h> 74 #include <sparc64/sparc64/cache.h> 75 76 #include "ioconf.h" 77 78 static pci_chipset_tag_t psycho_alloc_chipset __P((struct psycho_pbm *, int, 79 pci_chipset_tag_t)); 80 static void psycho_get_bus_range __P((int, int *)); 81 static void psycho_get_ranges __P((int, struct psycho_ranges **, int *)); 82 static void psycho_get_registers __P((int, struct psycho_registers **, int *)); 83 static void psycho_get_intmap __P((int, struct psycho_interrupt_map **, int *)); 84 static void psycho_get_intmapmask __P((int, struct psycho_interrupt_map_mask *)); 85 86 /* IOMMU support */ 87 static void psycho_iommu_init __P((struct psycho_softc *)); 88 89 /* 90 * bus space and bus dma support for UltraSPARC `psycho'. note that most 91 * of the bus dma support is provided by the iommu dvma controller. 92 */ 93 static int psycho_bus_mmap __P((bus_space_tag_t, bus_type_t, bus_addr_t, 94 int, bus_space_handle_t *)); 95 static int _psycho_bus_map __P((bus_space_tag_t, bus_type_t, bus_addr_t, 96 bus_size_t, int, vaddr_t, 97 bus_space_handle_t *)); 98 static void *psycho_intr_establish __P((bus_space_tag_t, int, int, 99 int (*) __P((void *)), void *)); 100 101 static int psycho_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 102 bus_size_t, struct proc *, int)); 103 static void psycho_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 104 static void psycho_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 105 bus_size_t, int)); 106 int psycho_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 107 bus_dma_segment_t *, int, int *, int)); 108 void psycho_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int)); 109 int psycho_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 110 caddr_t *, int)); 111 void psycho_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t)); 112 113 /* base pci_chipset */ 114 extern struct sparc_pci_chipset _sparc_pci_chipset; 115 116 /* 117 * autoconfiguration 118 */ 119 static int psycho_match __P((struct device *, struct cfdata *, void *)); 120 static void psycho_attach __P((struct device *, struct device *, void *)); 121 static int psycho_print __P((void *aux, const char *p)); 122 123 static void sabre_init __P((struct psycho_softc *, struct pcibus_attach_args *)); 124 static void psycho_init __P((struct psycho_softc *, struct pcibus_attach_args *)); 125 126 struct cfattach psycho_ca = { 127 sizeof(struct psycho_softc), psycho_match, psycho_attach 128 }; 129 130 /* 131 * "sabre" is the UltraSPARC IIi onboard PCI interface, normally connected to 132 * an APB (advanced PCI bridge), which was designed specifically for the IIi. 133 * the APB appears as two "simba"'s underneath the sabre. real devices 134 * typically appear on the "simba"'s only. 135 * 136 * a pair of "psycho"s sit on the mainbus and have real devices attached to 137 * them. they implemented in the U2P (UPA to PCI). these two devices share 138 * register space and as such need to be configured together, even though the 139 * autoconfiguration will attach them separately. 140 * 141 * each of these appears as two usable PCI busses, though the sabre itself 142 * takes pci0 in this case, leaving real devices on pci1 and pci2. there can 143 * be multiple pairs of psycho's, however, in multi-board machines. 144 */ 145 #define ROM_PCI_NAME "pci" 146 #define ROM_SABRE_MODEL "SUNW,sabre" 147 #define ROM_SIMBA_MODEL "SUNW,simba" 148 #define ROM_PSYCHO_MODEL "SUNW,psycho" 149 150 static int 151 psycho_match(parent, match, aux) 152 struct device *parent; 153 struct cfdata *match; 154 void *aux; 155 { 156 struct mainbus_attach_args *ma = aux; 157 char *model = getpropstring(ma->ma_node, "model"); 158 159 /* match on a name of "pci" and a sabre or a psycho */ 160 if (strcmp(ma->ma_name, ROM_PCI_NAME) == 0 && 161 (strcmp(model, ROM_SABRE_MODEL) == 0 || 162 strcmp(model, ROM_PSYCHO_MODEL) == 0)) 163 return (1); 164 165 return (0); 166 } 167 168 static void 169 psycho_attach(parent, self, aux) 170 struct device *parent, *self; 171 void *aux; 172 { 173 struct psycho_softc *sc = (struct psycho_softc *)self; 174 struct pcibus_attach_args pba; 175 struct mainbus_attach_args *ma = aux; 176 char *model = getpropstring(ma->ma_node, "model"); 177 178 printf("\n"); 179 180 sc->sc_node = ma->ma_node; 181 sc->sc_bustag = ma->ma_bustag; 182 sc->sc_dmatag = ma->ma_dmatag; 183 184 /* 185 * pull in all the information about the psycho as we can. 186 */ 187 188 /* 189 * XXX use the prom address for the psycho registers? we do so far. 190 */ 191 sc->sc_regs = (struct psychoreg *)(u_long)ma->ma_address[0]; 192 sc->sc_basepaddr = (paddr_t)ma->ma_reg[0].ur_paddr; 193 194 /* 195 * call the model-specific initialisation routine. 196 */ 197 if (strcmp(model, ROM_SABRE_MODEL) == 0) 198 sabre_init(sc, &pba); 199 else if (strcmp(model, ROM_PSYCHO_MODEL) == 0) 200 psycho_init(sc, &pba); 201 #ifdef DIAGNOSTIC 202 else 203 panic("psycho_attach: unknown model %s?", model); 204 #endif 205 206 /* 207 * attach the pci.. note we pass PCI A tags, etc., for the sabre here. 208 */ 209 pba.pba_busname = "pci"; 210 pba.pba_flags = sc->sc_psycho_this->pp_flags; 211 pba.pba_dmat = sc->sc_psycho_this->pp_dmat; 212 pba.pba_iot = sc->sc_psycho_this->pp_iot; 213 pba.pba_memt = sc->sc_psycho_this->pp_memt; 214 215 config_found(self, &pba, psycho_print); 216 } 217 218 static int 219 psycho_print(aux, p) 220 void *aux; 221 const char *p; 222 { 223 224 if (p == NULL) 225 return (UNCONF); 226 return (QUIET); 227 } 228 229 /* 230 * SUNW,sabre initialisation .. 231 * - get the sabre's ranges. this are used for both simba's. 232 * - find the two SUNW,simba's underneath (a and b) 233 * - work out which simba is which via the bus-range property 234 * - get each simba's interrupt-map and interrupt-map-mask. 235 * - turn on the iommu 236 */ 237 static void 238 sabre_init(sc, pba) 239 struct psycho_softc *sc; 240 struct pcibus_attach_args *pba; 241 { 242 struct psycho_pbm *pp; 243 bus_space_handle_t bh; 244 u_int64_t csr; 245 int node; 246 int sabre_br[2], simba_br[2]; 247 248 /* who? said a voice, incredulous */ 249 sc->sc_mode = PSYCHO_MODE_SABRE; 250 printf("sabre: "); 251 252 /* setup the PCI control register; there is only one for the sabre */ 253 csr = bus_space_read_8(sc->sc_bustag, (bus_space_handle_t)(u_long)&sc->sc_regs->psy_pcictl[0].pci_csr, 0); 254 csr |= PCICTL_MRLM | 255 PCICTL_ARB_PARK | 256 PCICTL_ERRINTEN | 257 PCICTL_4ENABLE; 258 csr &= ~(PCICTL_SERR | 259 PCICTL_CPU_PRIO | 260 PCICTL_ARB_PRIO | 261 PCICTL_RTRYWAIT); 262 bus_space_write_8(sc->sc_bustag, &sc->sc_regs->psy_pcictl[0].pci_csr, 0, csr); 263 264 /* allocate a pair of psycho_pbm's for our simba's */ 265 sc->sc_sabre = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 266 sc->sc_simba_a = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 267 sc->sc_simba_b = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 268 if (sc->sc_sabre == NULL || sc->sc_simba_a == NULL || 269 sc->sc_simba_b == NULL) 270 panic("could not allocate simba pbm's"); 271 272 memset(sc->sc_sabre, 0, sizeof *pp); 273 memset(sc->sc_simba_a, 0, sizeof *pp); 274 memset(sc->sc_simba_b, 0, sizeof *pp); 275 276 /* grab the sabre ranges; use them for both simba's */ 277 psycho_get_ranges(sc->sc_node, &sc->sc_sabre->pp_range, 278 &sc->sc_sabre->pp_nrange); 279 sc->sc_simba_b->pp_range = sc->sc_simba_a->pp_range = 280 sc->sc_sabre->pp_range; 281 sc->sc_simba_b->pp_nrange = sc->sc_simba_a->pp_nrange = 282 sc->sc_sabre->pp_nrange; 283 284 /* get the bus-range for the sabre. we expect 0..2 */ 285 psycho_get_bus_range(sc->sc_node, sabre_br); 286 287 pba->pba_bus = sabre_br[0]; 288 289 printf("bus range %u to %u", sabre_br[0], sabre_br[1]); 290 291 for (node = firstchild(sc->sc_node); node; node = nextsibling(node)) { 292 char *name = getpropstring(node, "name"); 293 char *model, who; 294 295 if (strcmp(name, ROM_PCI_NAME) != 0) 296 continue; 297 298 model = getpropstring(node, "model"); 299 if (strcmp(model, ROM_SIMBA_MODEL) != 0) 300 continue; 301 302 psycho_get_bus_range(node, simba_br); 303 304 if (simba_br[0] == 1) { /* PCI B */ 305 pp = sc->sc_simba_b; 306 who = 'b'; 307 } else { /* PCI A */ 308 pp = sc->sc_simba_a; 309 who = 'a'; 310 } 311 pp->pp_pcictl = &sc->sc_regs->psy_pcictl[0]; 312 /* link us in .. */ 313 pp->pp_sc = sc; 314 315 printf("; simba %c, PCI bus %d", who, simba_br[0]); 316 317 /* grab the simba registers, interrupt map and map mask */ 318 psycho_get_registers(node, &pp->pp_regs, &pp->pp_nregs); 319 psycho_get_intmap(node, &pp->pp_intmap, &pp->pp_nintmap); 320 psycho_get_intmapmask(node, &pp->pp_intmapmask); 321 322 /* allocate our tags */ 323 pp->pp_memt = psycho_alloc_mem_tag(pp); 324 pp->pp_iot = psycho_alloc_io_tag(pp); 325 pp->pp_dmat = psycho_alloc_dma_tag(pp); 326 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 327 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 328 329 /* allocate a chipset for this */ 330 pp->pp_pc = psycho_alloc_chipset(pp, node, &_sparc_pci_chipset); 331 } 332 333 /* setup the rest of the sabre pbm */ 334 pp = sc->sc_sabre; 335 pp->pp_sc = sc; 336 pp->pp_memt = sc->sc_psycho_this->pp_memt; 337 pp->pp_iot = sc->sc_psycho_this->pp_iot; 338 pp->pp_dmat = sc->sc_psycho_this->pp_dmat; 339 pp->pp_flags = sc->sc_psycho_this->pp_flags; 340 pp->pp_intmap = NULL; 341 pp->pp_regs = NULL; 342 pp->pp_pcictl = sc->sc_psycho_this->pp_pcictl; 343 pba->pba_pc = psycho_alloc_chipset(pp, sc->sc_node, 344 sc->sc_psycho_this->pp_pc); 345 346 printf("\n"); 347 348 /* and finally start up the IOMMU ... */ 349 psycho_iommu_init(sc); 350 351 /* 352 * get us a config space tag, and punch in the physical address 353 * of the PCI configuration space. note that we use unmapped 354 * access to PCI configuration space, relying on the bus space 355 * macros to provide the proper ASI based on the bus tag. 356 */ 357 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_simba_a); 358 if (bus_space_map2(sc->sc_bustag, 359 PCI_CONFIG_BUS_SPACE, 360 sc->sc_basepaddr + 0x01000000, 361 0x0100000, 362 0, 363 0, 364 &bh)) 365 panic("could not map sabre PCI configuration space"); 366 sc->sc_configaddr = (paddr_t)bh; 367 } 368 369 /* 370 * SUNW,psycho initialisation .. 371 * - XXX what do we do here? 372 * 373 * i think that an attaching psycho should here find it's partner psycho 374 * and if they haven't been attached yet, allocate both psycho_pbm's and 375 * fill them both in here, and when the partner attaches, there is little 376 * to do... perhaps keep a static array of what psycho have been found so 377 * far (or perhaps those that have not yet been finished). .mrg. 378 * note that the partner can be found via matching `ranges' properties. 379 */ 380 static void 381 psycho_init(sc, pba) 382 struct psycho_softc *sc; 383 struct pcibus_attach_args *pba; 384 { 385 struct psycho_softc *osc = NULL; 386 struct psycho_pbm *pp; 387 bus_space_handle_t bh; 388 u_int64_t csr; 389 int psycho_br[2], n; 390 char who; 391 392 printf("psycho: "); 393 394 /* 395 * OK, so the deal here is: 396 * - given our base register address, search our sibling 397 * devices for a match. 398 * - if we find a match, we are attaching an almost 399 * already setup PCI bus, the partner already done. 400 * - otherwise, we are doing the hard slog. 401 */ 402 for (n = 0; n < psycho_cd.cd_ndevs; n++) { 403 404 osc = (struct psycho_softc *)&psycho_cd.cd_devs[n]; 405 406 /* 407 * I am not myself. 408 */ 409 if (osc == sc || osc->sc_regs != sc->sc_regs) 410 continue; 411 412 /* 413 * OK, so we found a matching regs that wasn't me, 414 * so that means my IOMMU is setup. 415 */ 416 417 /* who? said a voice, incredulous */ 418 sc->sc_mode = PSYCHO_MODE_PSYCHO_B; /* XXX */ 419 who = 'b'; 420 break; 421 } 422 423 if (sc->sc_mode != PSYCHO_MODE_PSYCHO_B) { 424 sc->sc_mode = PSYCHO_MODE_PSYCHO_A; /* XXX */ 425 who = 'a'; 426 } 427 428 /* Oh, dear. OK, lets get started */ 429 430 /* XXX: check this is OK for real psycho */ 431 /* setup the PCI control register */ 432 csr = bus_space_read_8(sc->sc_bustag, (bus_space_handle_t)(u_long)&sc->sc_regs->psy_pcictl[0].pci_csr, 0); 433 csr |= PCICTL_MRLM | 434 PCICTL_ARB_PARK | 435 PCICTL_ERRINTEN | 436 PCICTL_4ENABLE; 437 csr &= ~(PCICTL_SERR | 438 PCICTL_CPU_PRIO | 439 PCICTL_ARB_PRIO | 440 PCICTL_RTRYWAIT); 441 bus_space_write_8(sc->sc_bustag, &sc->sc_regs->psy_pcictl[0].pci_csr, 0, csr); 442 443 /* allocate our psycho_pbm */ 444 sc->sc_psycho_this = malloc(sizeof *pp, M_DEVBUF, M_NOWAIT); 445 if (sc->sc_psycho_this == NULL) 446 panic("could not allocate psycho pbm"); 447 if (osc) { 448 sc->sc_psycho_other = osc->sc_psycho_this; 449 osc->sc_psycho_other = sc->sc_psycho_this; 450 } 451 452 memset(sc->sc_psycho_this, 0, sizeof *pp); 453 454 /* grab the psycho ranges */ 455 psycho_get_ranges(sc->sc_node, &sc->sc_psycho_this->pp_range, 456 &sc->sc_psycho_this->pp_nrange); 457 458 /* get the bus-range for the psycho */ 459 psycho_get_bus_range(sc->sc_node, psycho_br); 460 461 pba->pba_bus = psycho_br[0]; 462 463 printf("bus range %u to %u", psycho_br[0], psycho_br[1]); 464 printf("; simba %c, PCI bus %d", who, psycho_br[0]); 465 466 pp->pp_pcictl = &sc->sc_regs->psy_pcictl[0]; 467 468 /* grab the psycho registers, interrupt map and map mask */ 469 psycho_get_registers(sc->sc_node, &pp->pp_regs, &pp->pp_nregs); 470 psycho_get_intmap(sc->sc_node, &pp->pp_intmap, &pp->pp_nintmap); 471 psycho_get_intmapmask(sc->sc_node, &pp->pp_intmapmask); 472 473 /* allocate our tags */ 474 pp->pp_memt = psycho_alloc_mem_tag(pp); 475 pp->pp_iot = psycho_alloc_io_tag(pp); 476 pp->pp_dmat = psycho_alloc_dma_tag(pp); 477 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 478 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 479 480 /* allocate a chipset for this */ 481 pp->pp_pc = psycho_alloc_chipset(pp, sc->sc_node, &_sparc_pci_chipset); 482 483 /* setup the rest of the psycho pbm */ 484 pp->pp_sc = sc; 485 pba->pba_pc = psycho_alloc_chipset(pp, sc->sc_node, 486 sc->sc_psycho_this->pp_pc); 487 488 printf("\n"); 489 490 /* 491 * and finally, if we a a psycho A, start up the IOMMU and 492 * get us a config space tag, and punch in the physical address 493 * of the PCI configuration space. note that we use unmapped 494 * access to PCI configuration space, relying on the bus space 495 * macros to provide the proper ASI based on the bus tag. 496 */ 497 if (sc->sc_mode == PSYCHO_MODE_PSYCHO_A) { 498 psycho_iommu_init(sc); 499 500 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_psycho_this); 501 if (bus_space_map2(sc->sc_bustag, 502 PCI_CONFIG_BUS_SPACE, 503 sc->sc_basepaddr + 0x01000000, 504 0x0100000, 505 0, 506 0, 507 &bh)) 508 panic("could not map sabre PCI configuration space"); 509 sc->sc_configaddr = (paddr_t)bh; 510 } else { 511 /* for psycho B, we just copy the config tag and address */ 512 sc->sc_configtag = osc->sc_configtag; 513 sc->sc_configaddr = osc->sc_configaddr; 514 } 515 } 516 517 /* 518 * PCI bus support 519 */ 520 521 /* 522 * allocate a PCI chipset tag and set it's cookie. 523 */ 524 static pci_chipset_tag_t 525 psycho_alloc_chipset(pp, node, pc) 526 struct psycho_pbm *pp; 527 int node; 528 pci_chipset_tag_t pc; 529 { 530 pci_chipset_tag_t npc; 531 532 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 533 if (npc == NULL) 534 panic("could not allocate pci_chipset_tag_t"); 535 memcpy(npc, pc, sizeof *pc); 536 npc->cookie = pp; 537 npc->node = node; 538 539 return (npc); 540 } 541 542 /* 543 * grovel the OBP for various psycho properties 544 */ 545 static void 546 psycho_get_bus_range(node, brp) 547 int node; 548 int *brp; 549 { 550 int n; 551 552 if (getprop(node, "bus-range", sizeof(*brp), &n, (void **)&brp)) 553 panic("could not get psycho bus-range"); 554 if (n != 2) 555 panic("broken psycho bus-range"); 556 DPRINTF(PDB_PROM, ("psycho debug: got `bus-range' for node %08x: %u - %u\n", node, brp[0], brp[1])); 557 } 558 559 static void 560 psycho_get_ranges(node, rp, np) 561 int node; 562 struct psycho_ranges **rp; 563 int *np; 564 { 565 566 if (getprop(node, "ranges", sizeof(**rp), np, (void **)rp)) 567 panic("could not get psycho ranges"); 568 DPRINTF(PDB_PROM, ("psycho debug: got `ranges' for node %08x: %d entries\n", node, *np)); 569 } 570 571 static void 572 psycho_get_registers(node, rp, np) 573 int node; 574 struct psycho_registers **rp; 575 int *np; 576 { 577 578 if (getprop(node, "reg", sizeof(**rp), np, (void **)rp)) 579 panic("could not get psycho registers"); 580 DPRINTF(PDB_PROM, ("psycho debug: got `reg' for node %08x: %d entries\n", node, *np)); 581 } 582 583 static void 584 psycho_get_intmap(node, imp, np) 585 int node; 586 struct psycho_interrupt_map **imp; 587 int *np; 588 { 589 590 if (getprop(node, "interrupt-map", sizeof(**imp), np, (void **)imp)) 591 panic("could not get psycho interrupt-map"); 592 DPRINTF(PDB_PROM, ("psycho debug: got `interupt-map' for node %08x\n", node)); 593 } 594 595 static void 596 psycho_get_intmapmask(node, immp) 597 int node; 598 struct psycho_interrupt_map_mask *immp; 599 { 600 int n; 601 602 if (getprop(node, "interrupt-map-mask", sizeof(*immp), &n, 603 (void **)&immp)) 604 panic("could not get psycho interrupt-map-mask"); 605 if (n != 1) 606 panic("broken psycho interrupt-map-mask"); 607 DPRINTF(PDB_PROM, ("psycho debug: got `interrupt-map-mask' for node %08x\n", node)); 608 } 609 610 /* 611 * initialise the IOMMU.. 612 */ 613 void 614 psycho_iommu_init(sc) 615 struct psycho_softc *sc; 616 { 617 char *name; 618 619 /* punch in our copies */ 620 sc->sc_is.is_bustag = sc->sc_bustag; 621 sc->sc_is.is_iommu = &sc->sc_regs->psy_iommu; 622 /* IIi does not have streaming buffers */ 623 if (sc->sc_mode != PSYCHO_MODE_SABRE) 624 sc->sc_is.is_sb = &sc->sc_regs->psy_iommu_strbuf; 625 else 626 sc->sc_is.is_sb = 0; 627 628 /* give us a nice name.. */ 629 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 630 if (name == 0) 631 panic("couldn't malloc iommu name"); 632 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 633 634 /* XXX XXX XXX FIX ME tsbsize XXX XXX XXX */ 635 iommu_init(name, &sc->sc_is, 0); 636 } 637 638 /* 639 * below here is bus space and bus dma support 640 */ 641 bus_space_tag_t 642 psycho_alloc_bus_tag(pp, type) 643 struct psycho_pbm *pp; 644 int type; 645 { 646 struct psycho_softc *sc = pp->pp_sc; 647 bus_space_tag_t bt; 648 649 bt = (bus_space_tag_t) 650 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 651 if (bt == NULL) 652 panic("could not allocate psycho bus tag"); 653 654 bzero(bt, sizeof *bt); 655 bt->cookie = pp; 656 bt->parent = sc->sc_bustag; 657 bt->type = type; 658 bt->sparc_bus_map = _psycho_bus_map; 659 bt->sparc_bus_mmap = psycho_bus_mmap; 660 bt->sparc_intr_establish = psycho_intr_establish; 661 return (bt); 662 } 663 664 bus_dma_tag_t 665 psycho_alloc_dma_tag(pp) 666 struct psycho_pbm *pp; 667 { 668 struct psycho_softc *sc = pp->pp_sc; 669 bus_dma_tag_t dt, pdt = sc->sc_dmatag; 670 671 dt = (bus_dma_tag_t) 672 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 673 if (dt == NULL) 674 panic("could not allocate psycho dma tag"); 675 676 bzero(dt, sizeof *dt); 677 dt->_cookie = pp; 678 dt->_parent = pdt; 679 #define PCOPY(x) dt->x = pdt->x 680 PCOPY(_dmamap_create); 681 PCOPY(_dmamap_destroy); 682 dt->_dmamap_load = psycho_dmamap_load; 683 PCOPY(_dmamap_load_mbuf); 684 PCOPY(_dmamap_load_uio); 685 PCOPY(_dmamap_load_raw); 686 dt->_dmamap_unload = psycho_dmamap_unload; 687 dt->_dmamap_sync = psycho_dmamap_sync; 688 dt->_dmamem_alloc = psycho_dmamem_alloc; 689 dt->_dmamem_free = psycho_dmamem_free; 690 dt->_dmamem_map = psycho_dmamem_map; 691 dt->_dmamem_unmap = psycho_dmamem_unmap; 692 PCOPY(_dmamem_mmap); 693 #undef PCOPY 694 return (dt); 695 } 696 697 /* 698 * bus space support. <sparc64/dev/psychoreg.h> has a discussion about 699 * PCI physical addresses. 700 */ 701 702 static int get_childspace __P((int)); 703 704 static int 705 get_childspace(type) 706 int type; 707 { 708 int ss; 709 710 switch (type) { 711 case PCI_CONFIG_BUS_SPACE: 712 ss = 0x00; 713 break; 714 case PCI_IO_BUS_SPACE: 715 ss = 0x01; 716 break; 717 case PCI_MEMORY_BUS_SPACE: 718 ss = 0x02; 719 break; 720 #if 0 721 /* we don't do 64 bit memory space */ 722 case PCI_MEMORY64_BUS_SPACE: 723 ss = 0x03; 724 break; 725 #endif 726 default: 727 panic("get_childspace: unknown bus type"); 728 } 729 730 return (ss); 731 } 732 733 static int 734 _psycho_bus_map(t, btype, offset, size, flags, vaddr, hp) 735 bus_space_tag_t t; 736 bus_type_t btype; 737 bus_addr_t offset; 738 bus_size_t size; 739 int flags; 740 vaddr_t vaddr; 741 bus_space_handle_t *hp; 742 { 743 struct psycho_pbm *pp = t->cookie; 744 struct psycho_softc *sc = pp->pp_sc; 745 int i, ss; 746 747 DPRINTF(PDB_BUSMAP, ("_psycho_bus_map: type %d off %qx sz %qx flags %d va %p", t->type, offset, size, flags, vaddr)); 748 749 ss = get_childspace(t->type); 750 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 751 752 753 for (i = 0; i < pp->pp_nrange; i++) { 754 bus_addr_t paddr; 755 756 if (((pp->pp_range[i].cspace >> 24) & 0x03) != ss) 757 continue; 758 759 paddr = pp->pp_range[i].phys_lo + offset; 760 paddr |= ((bus_addr_t)pp->pp_range[i].phys_hi<<32); 761 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_map: mapping paddr space %lx offset %lx paddr %qx\n", 762 (long)ss, (long)offset, paddr)); 763 return (bus_space_map2(sc->sc_bustag, t->type, paddr, 764 size, flags, vaddr, hp)); 765 } 766 DPRINTF(PDB_BUSMAP, (" FAILED\n")); 767 return (EINVAL); 768 } 769 770 static int 771 psycho_bus_mmap(t, btype, paddr, flags, hp) 772 bus_space_tag_t t; 773 bus_type_t btype; 774 bus_addr_t paddr; 775 int flags; 776 bus_space_handle_t *hp; 777 { 778 bus_addr_t offset = paddr; 779 struct psycho_pbm *pp = t->cookie; 780 struct psycho_softc *sc = pp->pp_sc; 781 int i, ss; 782 783 ss = get_childspace(t->type); 784 785 DPRINTF(PDB_BUSMAP, ("_psycho_bus_mmap: type %d flags %d pa %qx\n", btype, flags, paddr)); 786 787 for (i = 0; i < pp->pp_nrange; i++) { 788 bus_addr_t paddr; 789 790 if (((pp->pp_range[i].cspace >> 24) & 0x03) != ss) 791 continue; 792 793 paddr = pp->pp_range[i].phys_lo + offset; 794 paddr |= ((bus_addr_t)pp->pp_range[i].phys_hi<<32); 795 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_mmap: mapping paddr space %lx offset %lx paddr %qx\n", 796 (long)ss, (long)offset, paddr)); 797 return (bus_space_mmap(sc->sc_bustag, 0, paddr, 798 flags, hp)); 799 } 800 801 return (-1); 802 } 803 804 /* 805 * interrupt mapping. this tells what sparc ipl any given ino runs at. 806 */ 807 static int pci_ino_to_ipl_table[] = { 808 0, 0, 0, 0, /* PCI A, Slot 0, INTA#/B#/C#/D# */ 809 0, 0, 0, 0, /* PCI A, Slot 1, INTA#/B#/C#/D# */ 810 0, 0, 0, 0, /* PCI A, Slot 2, INTA#/B#/C#/D# (unavailable) */ 811 0, 0, 0, 0, /* PCI A, Slot 3, INTA#/B#/C#/D# (unavailable) */ 812 0, 0, 0, 0, /* PCI B, Slot 0, INTA#/B#/C#/D# */ 813 0, 0, 0, 0, /* PCI B, Slot 0, INTA#/B#/C#/D# */ 814 0, 0, 0, 0, /* PCI B, Slot 2, INTA#/B#/C#/D# */ 815 0, 0, 0, 0, /* PCI B, Slot 3, INTA#/B#/C#/D# */ 816 4, /* SCSI */ 817 6, /* Ethernet */ 818 3, /* Parallel */ 819 9, /* Audio Record */ 820 9, /* Audio Playback */ 821 14, /* Power Fail */ 822 4, /* Keyboard/Mouse/Serial */ 823 8, /* Floppy */ 824 14, /* Thermal Warning */ 825 12, /* Keyboard */ 826 12, /* Mouse */ 827 12, /* Serial */ 828 0, /* Reserved */ 829 0, /* Reserved */ 830 14, /* Uncorrectable ECC error */ 831 14, /* Correctable ECC error */ 832 14, /* PCI A bus error */ 833 14, /* PCI B bus error */ 834 14, /* power management */ 835 }; 836 837 int 838 psycho_intr_map(tag, pin, line, ihp) 839 pcitag_t tag; 840 int pin; 841 int line; 842 pci_intr_handle_t *ihp; 843 { 844 845 if (line < 0 || line > 0x32) 846 panic("psycho_intr_map: line line < 0 || line > 0x32"); 847 848 /* UltraSPARC IIi does not use this register, but we have set it */ 849 (*ihp) = line; 850 return (0); 851 } 852 853 /* 854 * install an interrupt handler for a PCI device 855 */ 856 void * 857 psycho_intr_establish(t, level, flags, handler, arg) 858 bus_space_tag_t t; 859 int level; 860 int flags; 861 int (*handler) __P((void *)); 862 void *arg; 863 { 864 struct psycho_pbm *pp = t->cookie; 865 struct psycho_softc *sc = pp->pp_sc; 866 struct intrhand *ih; 867 int ino; 868 long vec = level; 869 870 ih = (struct intrhand *) 871 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 872 if (ih == NULL) 873 return (NULL); 874 875 DPRINTF(PDB_INTR, ("\npsycho_intr_establish: level %x", level)); 876 ino = INTINO(vec); 877 DPRINTF(PDB_INTR, (" ino %x", ino)); 878 if ((flags & BUS_INTR_ESTABLISH_SOFTINTR) == 0) { 879 volatile int64_t *intrmapptr, *intrclrptr; 880 int64_t intrmap = 0; 881 int i; 882 883 DPRINTF(PDB_INTR, ("\npsycho: intr %lx: %lx\nHunting for IRQ...\n", 884 (long)ino, intrlev[ino])); 885 if ((ino & INTMAP_OBIO) == 0) { 886 /* 887 * there are only 8 PCI interrupt INO's available 888 */ 889 i = INTPCIINOX(vec); 890 891 intrmapptr = &((&sc->sc_regs->pcia_slot0_int)[i]); 892 intrclrptr = &sc->sc_regs->pcia0_clr_int[i<<2]; 893 894 DPRINTF(PDB_INTR, ("- turning on PCI intr %d", i)); 895 } else { 896 /* 897 * there are INTPCI_MAXOBINO (0x16) OBIO interrupts 898 * available here (i think). 899 */ 900 i = INTPCIOBINOX(vec); 901 if (i > INTPCI_MAXOBINO) 902 panic("ino %d", vec); 903 904 intrmapptr = &((&sc->sc_regs->scsi_int_map)[i]); 905 intrclrptr = &((&sc->sc_regs->scsi_clr_int)[i]); 906 907 DPRINTF(PDB_INTR, ("- turning on OBIO intr %d", i)); 908 } 909 910 /* Register the map and clear intr registers */ 911 ih->ih_map = intrmapptr; 912 ih->ih_clr = intrclrptr; 913 914 /* 915 * Read the current value as we can't change it besides the 916 * valid bit so so make sure only this bit is changed. 917 */ 918 intrmap = *intrmapptr; 919 DPRINTF(PDB_INTR, ("; read intrmap = %016qx", intrmap)); 920 921 /* Enable the interrupt */ 922 intrmap |= INTMAP_V; 923 DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr)); 924 DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", intrmap)); 925 *intrmapptr = intrmap; 926 DPRINTF(PDB_INTR, ("; reread intrmap = %016qx", 927 (intrmap = *intrmapptr))); 928 } 929 #ifdef DEBUG 930 if (psycho_debug & PDB_INTR) { 931 long i; 932 933 for (i = 0; i < 500000000; i++) 934 continue; 935 } 936 #endif 937 938 ih->ih_fun = handler; 939 ih->ih_arg = arg; 940 ih->ih_number = ino | 0x7c0; 941 ih->ih_pil = pci_ino_to_ipl_table[ino]; 942 DPRINTF(PDB_INTR, ("; installing handler %p with ino %u pil %u\n", 943 handler, (u_int)ino, (u_int)ih->ih_pil)); 944 intr_establish(ih->ih_pil, ih); 945 return (ih); 946 } 947 948 /* 949 * hooks into the iommu dvma calls. 950 */ 951 int 952 psycho_dmamap_load(t, map, buf, buflen, p, flags) 953 bus_dma_tag_t t; 954 bus_dmamap_t map; 955 void *buf; 956 bus_size_t buflen; 957 struct proc *p; 958 int flags; 959 { 960 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 961 struct psycho_softc *sc = pp->pp_sc; 962 963 return (iommu_dvmamap_load(t, &sc->sc_is, map, buf, buflen, p, flags)); 964 } 965 966 void 967 psycho_dmamap_unload(t, map) 968 bus_dma_tag_t t; 969 bus_dmamap_t map; 970 { 971 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 972 struct psycho_softc *sc = pp->pp_sc; 973 974 iommu_dvmamap_unload(t, &sc->sc_is, map); 975 } 976 977 void 978 psycho_dmamap_sync(t, map, offset, len, ops) 979 bus_dma_tag_t t; 980 bus_dmamap_t map; 981 bus_addr_t offset; 982 bus_size_t len; 983 int ops; 984 { 985 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 986 struct psycho_softc *sc = pp->pp_sc; 987 988 iommu_dvmamap_sync(t, &sc->sc_is, map, offset, len, ops); 989 bus_dmamap_sync(t->_parent, map, offset, len, ops); 990 } 991 992 int 993 psycho_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags) 994 bus_dma_tag_t t; 995 bus_size_t size; 996 bus_size_t alignment; 997 bus_size_t boundary; 998 bus_dma_segment_t *segs; 999 int nsegs; 1000 int *rsegs; 1001 int flags; 1002 { 1003 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1004 struct psycho_softc *sc = pp->pp_sc; 1005 1006 return (iommu_dvmamem_alloc(t, &sc->sc_is, size, alignment, boundary, 1007 segs, nsegs, rsegs, flags)); 1008 } 1009 1010 void 1011 psycho_dmamem_free(t, segs, nsegs) 1012 bus_dma_tag_t t; 1013 bus_dma_segment_t *segs; 1014 int nsegs; 1015 { 1016 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1017 struct psycho_softc *sc = pp->pp_sc; 1018 1019 iommu_dvmamem_free(t, &sc->sc_is, segs, nsegs); 1020 } 1021 1022 int 1023 psycho_dmamem_map(t, segs, nsegs, size, kvap, flags) 1024 bus_dma_tag_t t; 1025 bus_dma_segment_t *segs; 1026 int nsegs; 1027 size_t size; 1028 caddr_t *kvap; 1029 int flags; 1030 { 1031 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1032 struct psycho_softc *sc = pp->pp_sc; 1033 1034 return (iommu_dvmamem_map(t, &sc->sc_is, segs, nsegs, size, kvap, flags)); 1035 } 1036 1037 void 1038 psycho_dmamem_unmap(t, kva, size) 1039 bus_dma_tag_t t; 1040 caddr_t kva; 1041 size_t size; 1042 { 1043 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1044 struct psycho_softc *sc = pp->pp_sc; 1045 1046 iommu_dvmamem_unmap(t, &sc->sc_is, kva, size); 1047 } 1048
Indexes created Thu Sep 25 06:09:39 GMT 2025