1 1.21 nakayama /* $NetBSD: psychovar.h,v 1.21 2013/12/07 11:17:24 nakayama Exp $ */ 2 1.1 mrg 3 1.1 mrg /* 4 1.2 mrg * Copyright (c) 1999, 2000 Matthew R. Green 5 1.1 mrg * All rights reserved. 6 1.1 mrg * 7 1.1 mrg * Redistribution and use in source and binary forms, with or without 8 1.1 mrg * modification, are permitted provided that the following conditions 9 1.1 mrg * are met: 10 1.1 mrg * 1. Redistributions of source code must retain the above copyright 11 1.1 mrg * notice, this list of conditions and the following disclaimer. 12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 mrg * notice, this list of conditions and the following disclaimer in the 14 1.1 mrg * documentation and/or other materials provided with the distribution. 15 1.1 mrg * 16 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 mrg * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 mrg * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 mrg * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 mrg * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 mrg * SUCH DAMAGE. 27 1.1 mrg */ 28 1.1 mrg 29 1.1 mrg #ifndef _SPARC64_DEV_PSYCHOVAR_H_ 30 1.1 mrg #define _SPARC64_DEV_PSYCHOVAR_H_ 31 1.1 mrg 32 1.10 martin #include <dev/sysmon/sysmonvar.h> 33 1.10 martin 34 1.1 mrg /* per real PCI bus info */ 35 1.1 mrg struct psycho_softc; 36 1.1 mrg 37 1.1 mrg struct psycho_pbm { 38 1.1 mrg /* link to mum */ 39 1.1 mrg struct psycho_softc *pp_sc; 40 1.1 mrg 41 1.1 mrg /* 42 1.1 mrg * note that the sabre really only has one ranges property, 43 1.1 mrg * used for both simba a and simba b (but the ranges for 44 1.1 mrg * real psychos are the same for PCI A and PCI B anyway). 45 1.1 mrg */ 46 1.1 mrg struct psycho_registers *pp_regs; 47 1.1 mrg struct psycho_ranges *pp_range; 48 1.1 mrg 49 1.1 mrg /* counts of above */ 50 1.1 mrg int pp_nregs; 51 1.1 mrg int pp_nrange; 52 1.1 mrg int pp_nintmap; 53 1.1 mrg 54 1.9 nakayama /* extents for free bus space */ 55 1.9 nakayama struct extent *pp_exmem; 56 1.9 nakayama struct extent *pp_exio; 57 1.9 nakayama 58 1.12 petrov /* PCI Bus Module A or PCI Bus Module B */ 59 1.12 petrov int pp_id; 60 1.12 petrov #define PSYCHO_PBM_UNKNOWN 0 61 1.12 petrov #define PSYCHO_PBM_A 1 62 1.12 petrov #define PSYCHO_PBM_B 2 63 1.12 petrov 64 1.1 mrg /* chipset tag for this instance */ 65 1.1 mrg pci_chipset_tag_t pp_pc; 66 1.1 mrg 67 1.1 mrg /* our tags */ 68 1.1 mrg bus_space_tag_t pp_memt; 69 1.1 mrg bus_space_tag_t pp_iot; 70 1.1 mrg bus_dma_tag_t pp_dmat; 71 1.3 eeh int pp_bus; 72 1.1 mrg int pp_flags; 73 1.1 mrg 74 1.1 mrg /* and pointers into the psycho regs for our bits */ 75 1.7 eeh bus_space_handle_t pp_pcictl; 76 1.8 eeh struct strbuf_ctl pp_sb; 77 1.8 eeh /* area we can use for flushing our streaming buffer */ 78 1.8 eeh char pp_flush[0x80]; 79 1.1 mrg }; 80 1.1 mrg 81 1.1 mrg /* 82 1.1 mrg * per-PCI bus on mainbus softc structure; one for sabre, or two 83 1.1 mrg * per pair of psycho's. 84 1.1 mrg */ 85 1.1 mrg struct psycho_softc { 86 1.18 christos device_t sc_dev; 87 1.1 mrg 88 1.1 mrg /* 89 1.1 mrg * one sabre has two simba's. psycho's are separately attached, 90 1.1 mrg * with the `other' psycho_pbm allocated at the first's attach. 91 1.1 mrg */ 92 1.1 mrg struct psycho_pbm *__sc_psycho_this; 93 1.1 mrg struct psycho_pbm *__sc_psycho_other; 94 1.1 mrg #define sc_psycho_this __sc_psycho_this 95 1.1 mrg #define sc_psycho_other __sc_psycho_other 96 1.1 mrg 97 1.1 mrg /* 98 1.1 mrg * PSYCHO register. we record the base physical address of these 99 1.1 mrg * also as it is the base of the entire PSYCHO 100 1.1 mrg */ 101 1.1 mrg struct psychoreg *sc_regs; 102 1.1 mrg paddr_t sc_basepaddr; 103 1.1 mrg 104 1.4 pk /* Interrupt Group Number for this device */ 105 1.4 pk int sc_ign; 106 1.4 pk 107 1.1 mrg /* our tags (from parent) */ 108 1.1 mrg bus_space_tag_t sc_bustag; 109 1.7 eeh bus_dma_tag_t sc_dmatag; 110 1.7 eeh 111 1.7 eeh bus_space_handle_t sc_bh; 112 1.1 mrg 113 1.1 mrg /* config space */ 114 1.1 mrg bus_space_tag_t sc_configtag; 115 1.3 eeh bus_space_handle_t sc_configaddr; 116 1.1 mrg 117 1.1 mrg int sc_clockfreq; 118 1.1 mrg int sc_node; /* prom node */ 119 1.1 mrg int sc_mode; /* (whatareya?) */ 120 1.1 mrg #define PSYCHO_MODE_SABRE 1 /* i'm a sabre (yob) */ 121 1.4 pk #define PSYCHO_MODE_PSYCHO 2 /* i'm a psycho (w*nker) */ 122 1.1 mrg 123 1.4 pk struct iommu_state *sc_is; 124 1.10 martin 125 1.10 martin struct sysmon_pswitch *sc_smcontext; /* power switch definition */ 126 1.10 martin int sc_powerpressed;/* already signaled */ 127 1.19 macallan uint64_t sc_last_stick; 128 1.1 mrg }; 129 1.9 nakayama 130 1.9 nakayama /* get a PCI offset address from bus_space_handle_t */ 131 1.14 cdi bus_addr_t psycho_bus_offset(bus_space_tag_t, bus_space_handle_t *); 132 1.1 mrg 133 1.11 wiz /* config space is per-psycho. mem/io/DMA are per-pci bus */ 134 1.14 cdi bus_dma_tag_t psycho_alloc_dma_tag(struct psycho_pbm *); 135 1.14 cdi bus_space_tag_t psycho_alloc_bus_tag(struct psycho_pbm *, int); 136 1.1 mrg 137 1.1 mrg #define psycho_alloc_config_tag(pp) psycho_alloc_bus_tag((pp), PCI_CONFIG_BUS_SPACE) 138 1.1 mrg #define psycho_alloc_mem_tag(pp) psycho_alloc_bus_tag((pp), PCI_MEMORY_BUS_SPACE) 139 1.1 mrg #define psycho_alloc_io_tag(pp) psycho_alloc_bus_tag((pp), PCI_IO_BUS_SPACE) 140 1.1 mrg 141 1.20 nakayama uint64_t psycho_getstick(void); 142 1.21 nakayama uint32_t psycho_getstick32(void); 143 1.19 macallan void psycho_setstick(long); 144 1.19 macallan void psycho_nextstick(long); 145 1.19 macallan 146 1.1 mrg #endif /* _SPARC64_DEV_PSYCHOVAR_H_ */ 147