Home | History | Annotate | Line # | Download | only in dev
psychovar.h revision 1.11
      1  1.11       wiz /*	$NetBSD: psychovar.h,v 1.11 2003/05/03 18:11:02 wiz Exp $	*/
      2   1.1       mrg 
      3   1.1       mrg /*
      4   1.2       mrg  * Copyright (c) 1999, 2000 Matthew R. Green
      5   1.1       mrg  * All rights reserved.
      6   1.1       mrg  *
      7   1.1       mrg  * Redistribution and use in source and binary forms, with or without
      8   1.1       mrg  * modification, are permitted provided that the following conditions
      9   1.1       mrg  * are met:
     10   1.1       mrg  * 1. Redistributions of source code must retain the above copyright
     11   1.1       mrg  *    notice, this list of conditions and the following disclaimer.
     12   1.1       mrg  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1       mrg  *    notice, this list of conditions and the following disclaimer in the
     14   1.1       mrg  *    documentation and/or other materials provided with the distribution.
     15   1.1       mrg  * 3. The name of the author may not be used to endorse or promote products
     16   1.1       mrg  *    derived from this software without specific prior written permission.
     17   1.1       mrg  *
     18   1.1       mrg  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19   1.1       mrg  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20   1.1       mrg  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21   1.1       mrg  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22   1.1       mrg  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     23   1.1       mrg  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     24   1.1       mrg  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     25   1.1       mrg  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     26   1.1       mrg  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27   1.1       mrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28   1.1       mrg  * SUCH DAMAGE.
     29   1.1       mrg  */
     30   1.1       mrg 
     31   1.1       mrg #ifndef _SPARC64_DEV_PSYCHOVAR_H_
     32   1.1       mrg #define _SPARC64_DEV_PSYCHOVAR_H_
     33   1.1       mrg 
     34  1.10    martin #include <dev/sysmon/sysmonvar.h>
     35  1.10    martin 
     36   1.1       mrg /* per real PCI bus info */
     37   1.1       mrg struct psycho_softc;
     38   1.1       mrg 
     39   1.1       mrg struct psycho_pbm {
     40   1.1       mrg 	/* link to mum */
     41   1.1       mrg 	struct psycho_softc		*pp_sc;
     42   1.1       mrg 
     43   1.1       mrg 	/*
     44   1.1       mrg 	 * note that the sabre really only has one ranges property,
     45   1.1       mrg 	 * used for both simba a and simba b (but the ranges for
     46   1.1       mrg 	 * real psychos are the same for PCI A and PCI B anyway).
     47   1.1       mrg 	 */
     48   1.1       mrg 	struct psycho_registers		*pp_regs;
     49   1.1       mrg 	struct psycho_ranges		*pp_range;
     50   1.1       mrg 
     51   1.1       mrg 	/* counts of above */
     52   1.1       mrg 	int				pp_nregs;
     53   1.1       mrg 	int				pp_nrange;
     54   1.1       mrg 	int				pp_nintmap;
     55   1.1       mrg 
     56   1.9  nakayama 	/* extents for free bus space */
     57   1.9  nakayama 	struct extent			*pp_exmem;
     58   1.9  nakayama 	struct extent			*pp_exio;
     59   1.9  nakayama 
     60   1.1       mrg 	/* chipset tag for this instance */
     61   1.1       mrg 	pci_chipset_tag_t		pp_pc;
     62   1.1       mrg 
     63   1.1       mrg 	/* our tags */
     64   1.1       mrg 	bus_space_tag_t			pp_memt;
     65   1.1       mrg 	bus_space_tag_t			pp_iot;
     66   1.1       mrg 	bus_dma_tag_t			pp_dmat;
     67   1.3       eeh 	int				pp_bus;
     68   1.9  nakayama 	int				pp_busmax;
     69   1.9  nakayama 	struct pp_busnode {
     70   1.9  nakayama 		int	node;
     71   1.9  nakayama 		int	(*valid) __P((void *));
     72   1.9  nakayama 		void	*arg;
     73   1.9  nakayama 	}				(*pp_busnode)[256];
     74   1.1       mrg 	int				pp_flags;
     75   1.1       mrg 
     76   1.1       mrg 	/* and pointers into the psycho regs for our bits */
     77   1.7       eeh 	bus_space_handle_t		pp_pcictl;
     78   1.8       eeh 	struct strbuf_ctl		pp_sb;
     79   1.8       eeh 	/* area we can use for flushing our streaming buffer */
     80   1.8       eeh 	char				pp_flush[0x80];
     81   1.1       mrg };
     82   1.1       mrg 
     83   1.1       mrg /*
     84   1.1       mrg  * per-PCI bus on mainbus softc structure; one for sabre, or two
     85   1.1       mrg  * per pair of psycho's.
     86   1.1       mrg  */
     87   1.1       mrg struct psycho_softc {
     88   1.1       mrg 	struct	device			sc_dev;
     89   1.1       mrg 
     90   1.1       mrg 	/*
     91   1.1       mrg 	 * one sabre has two simba's.  psycho's are separately attached,
     92   1.1       mrg 	 * with the `other' psycho_pbm allocated at the first's attach.
     93   1.1       mrg 	 */
     94   1.1       mrg 	struct psycho_pbm		*__sc_psycho_this;
     95   1.1       mrg 	struct psycho_pbm		*__sc_psycho_other;
     96   1.1       mrg #define	sc_psycho_this	__sc_psycho_this
     97   1.1       mrg #define	sc_psycho_other	__sc_psycho_other
     98   1.1       mrg 
     99   1.1       mrg 	/*
    100   1.1       mrg 	 * PSYCHO register.  we record the base physical address of these
    101   1.1       mrg 	 * also as it is the base of the entire PSYCHO
    102   1.1       mrg 	 */
    103   1.1       mrg 	struct psychoreg		*sc_regs;
    104   1.1       mrg 	paddr_t				sc_basepaddr;
    105   1.1       mrg 
    106   1.4        pk 	/* Interrupt Group Number for this device */
    107   1.4        pk 	int				sc_ign;
    108   1.4        pk 
    109   1.1       mrg 	/* our tags (from parent) */
    110   1.1       mrg 	bus_space_tag_t			sc_bustag;
    111   1.7       eeh 	bus_dma_tag_t			sc_dmatag;
    112   1.7       eeh 
    113   1.7       eeh 	bus_space_handle_t		sc_bh;
    114   1.1       mrg 
    115   1.1       mrg 	/* config space */
    116   1.1       mrg 	bus_space_tag_t			sc_configtag;
    117   1.3       eeh 	bus_space_handle_t		sc_configaddr;
    118   1.1       mrg 
    119   1.1       mrg 	int				sc_clockfreq;
    120   1.1       mrg 	int				sc_node;	/* prom node */
    121   1.1       mrg 	int				sc_mode;	/* (whatareya?) */
    122   1.1       mrg #define	PSYCHO_MODE_SABRE	1	/* i'm a sabre (yob) */
    123   1.4        pk #define	PSYCHO_MODE_PSYCHO	2	/* i'm a psycho (w*nker) */
    124   1.1       mrg 
    125   1.4        pk 	struct iommu_state		*sc_is;
    126  1.10    martin 
    127  1.10    martin 	struct sysmon_pswitch		*sc_smcontext;	/* power switch definition */
    128  1.10    martin 	int				sc_powerpressed;/* already signaled */
    129   1.1       mrg };
    130   1.9  nakayama 
    131   1.9  nakayama /* get a PCI offset address from bus_space_handle_t */
    132   1.9  nakayama bus_addr_t psycho_bus_offset __P((bus_space_tag_t, bus_space_handle_t *));
    133   1.1       mrg 
    134  1.11       wiz /* config space is per-psycho.  mem/io/DMA are per-pci bus */
    135   1.1       mrg bus_dma_tag_t psycho_alloc_dma_tag __P((struct psycho_pbm *));
    136   1.1       mrg bus_space_tag_t psycho_alloc_bus_tag __P((struct psycho_pbm *, int));
    137   1.1       mrg 
    138   1.1       mrg #define psycho_alloc_config_tag(pp) psycho_alloc_bus_tag((pp), PCI_CONFIG_BUS_SPACE)
    139   1.1       mrg #define psycho_alloc_mem_tag(pp) psycho_alloc_bus_tag((pp), PCI_MEMORY_BUS_SPACE)
    140   1.1       mrg #define psycho_alloc_io_tag(pp) psycho_alloc_bus_tag((pp), PCI_IO_BUS_SPACE)
    141   1.1       mrg 
    142   1.1       mrg #endif /* _SPARC64_DEV_PSYCHOVAR_H_ */
    143