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psychovar.h revision 1.3
      1  1.3  eeh /*	$NetBSD: psychovar.h,v 1.3 2000/05/24 20:27:52 eeh Exp $	*/
      2  1.1  mrg 
      3  1.1  mrg /*
      4  1.2  mrg  * Copyright (c) 1999, 2000 Matthew R. Green
      5  1.1  mrg  * All rights reserved.
      6  1.1  mrg  *
      7  1.1  mrg  * Redistribution and use in source and binary forms, with or without
      8  1.1  mrg  * modification, are permitted provided that the following conditions
      9  1.1  mrg  * are met:
     10  1.1  mrg  * 1. Redistributions of source code must retain the above copyright
     11  1.1  mrg  *    notice, this list of conditions and the following disclaimer.
     12  1.1  mrg  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  mrg  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  mrg  *    documentation and/or other materials provided with the distribution.
     15  1.1  mrg  * 3. The name of the author may not be used to endorse or promote products
     16  1.1  mrg  *    derived from this software without specific prior written permission.
     17  1.1  mrg  *
     18  1.1  mrg  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  1.1  mrg  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20  1.1  mrg  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  1.1  mrg  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  1.1  mrg  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     23  1.1  mrg  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     24  1.1  mrg  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     25  1.1  mrg  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     26  1.1  mrg  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27  1.1  mrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28  1.1  mrg  * SUCH DAMAGE.
     29  1.1  mrg  */
     30  1.1  mrg 
     31  1.1  mrg #ifndef _SPARC64_DEV_PSYCHOVAR_H_
     32  1.1  mrg #define _SPARC64_DEV_PSYCHOVAR_H_
     33  1.1  mrg 
     34  1.1  mrg /* per real PCI bus info */
     35  1.1  mrg struct psycho_softc;
     36  1.1  mrg 
     37  1.1  mrg struct psycho_pbm {
     38  1.1  mrg 	/* link to mum */
     39  1.1  mrg 	struct psycho_softc		*pp_sc;
     40  1.1  mrg 
     41  1.1  mrg 	/*
     42  1.1  mrg 	 * note that the sabre really only has one ranges property,
     43  1.1  mrg 	 * used for both simba a and simba b (but the ranges for
     44  1.1  mrg 	 * real psychos are the same for PCI A and PCI B anyway).
     45  1.1  mrg 	 */
     46  1.1  mrg 	struct psycho_registers		*pp_regs;
     47  1.1  mrg 	struct psycho_ranges		*pp_range;
     48  1.1  mrg 	struct psycho_interrupt_map	*pp_intmap;
     49  1.1  mrg 	struct psycho_interrupt_map_mask pp_intmapmask;
     50  1.1  mrg 
     51  1.1  mrg 	/* counts of above */
     52  1.1  mrg 	int				pp_nregs;
     53  1.1  mrg 	int				pp_nrange;
     54  1.1  mrg 	int				pp_nintmap;
     55  1.1  mrg 
     56  1.1  mrg 	/* chipset tag for this instance */
     57  1.1  mrg 	pci_chipset_tag_t		pp_pc;
     58  1.1  mrg 
     59  1.1  mrg 	/* our tags */
     60  1.1  mrg 	bus_space_tag_t			pp_memt;
     61  1.1  mrg 	bus_space_tag_t			pp_iot;
     62  1.1  mrg 	bus_dma_tag_t			pp_dmat;
     63  1.3  eeh 	int				pp_bus;
     64  1.1  mrg 	int				pp_flags;
     65  1.1  mrg 
     66  1.1  mrg 	/* and pointers into the psycho regs for our bits */
     67  1.1  mrg 	struct pci_ctl			*pp_pcictl;
     68  1.1  mrg };
     69  1.1  mrg 
     70  1.1  mrg /*
     71  1.1  mrg  * per-PCI bus on mainbus softc structure; one for sabre, or two
     72  1.1  mrg  * per pair of psycho's.
     73  1.1  mrg  */
     74  1.1  mrg struct psycho_softc {
     75  1.1  mrg 	struct	device			sc_dev;
     76  1.1  mrg 
     77  1.1  mrg 	/*
     78  1.1  mrg 	 * one sabre has two simba's.  psycho's are separately attached,
     79  1.1  mrg 	 * with the `other' psycho_pbm allocated at the first's attach.
     80  1.1  mrg 	 */
     81  1.1  mrg 	struct psycho_pbm		*sc_sabre;
     82  1.1  mrg 	struct psycho_pbm		*__sc_psycho_this;
     83  1.1  mrg 	struct psycho_pbm		*__sc_psycho_other;
     84  1.1  mrg #define	sc_simba_a	__sc_psycho_this
     85  1.1  mrg #define	sc_simba_b	__sc_psycho_other
     86  1.1  mrg #define	sc_psycho_this	__sc_psycho_this
     87  1.1  mrg #define	sc_psycho_other	__sc_psycho_other
     88  1.1  mrg 
     89  1.1  mrg 	/*
     90  1.1  mrg 	 * PSYCHO register.  we record the base physical address of these
     91  1.1  mrg 	 * also as it is the base of the entire PSYCHO
     92  1.1  mrg 	 */
     93  1.1  mrg 	struct psychoreg		*sc_regs;
     94  1.1  mrg 	paddr_t				sc_basepaddr;
     95  1.1  mrg 
     96  1.1  mrg 	/* our tags (from parent) */
     97  1.1  mrg 	bus_space_tag_t			sc_bustag;
     98  1.1  mrg 	bus_dma_tag_t			sc_dmatag;
     99  1.1  mrg 
    100  1.1  mrg 	/* config space */
    101  1.1  mrg 	bus_space_tag_t			sc_configtag;
    102  1.3  eeh 	bus_space_handle_t		sc_configaddr;
    103  1.1  mrg 
    104  1.1  mrg 	int				sc_clockfreq;
    105  1.1  mrg 	int				sc_node;	/* prom node */
    106  1.1  mrg 	int				sc_mode;	/* (whatareya?) */
    107  1.1  mrg #define	PSYCHO_MODE_SABRE	1	/* i'm a sabre (yob) */
    108  1.1  mrg #define	PSYCHO_MODE_PSYCHO_A	2	/* i'm a psycho (w*nker) */
    109  1.1  mrg #define	PSYCHO_MODE_PSYCHO_B	3	/* i'm another psycho (w*nker) */
    110  1.1  mrg 
    111  1.1  mrg 	struct iommu_state		sc_is;
    112  1.1  mrg };
    113  1.1  mrg 
    114  1.1  mrg /* config space is per-psycho.  mem/io/dma are per-pci bus */
    115  1.1  mrg bus_dma_tag_t psycho_alloc_dma_tag __P((struct psycho_pbm *));
    116  1.1  mrg bus_space_tag_t psycho_alloc_bus_tag __P((struct psycho_pbm *, int));
    117  1.1  mrg 
    118  1.1  mrg #define psycho_alloc_config_tag(pp) psycho_alloc_bus_tag((pp), PCI_CONFIG_BUS_SPACE)
    119  1.1  mrg #define psycho_alloc_mem_tag(pp) psycho_alloc_bus_tag((pp), PCI_MEMORY_BUS_SPACE)
    120  1.1  mrg #define psycho_alloc_io_tag(pp) psycho_alloc_bus_tag((pp), PCI_IO_BUS_SPACE)
    121  1.1  mrg 
    122  1.1  mrg int psycho_intr_map __P((pcitag_t, int, int, pci_intr_handle_t *));
    123  1.1  mrg 
    124  1.1  mrg #endif /* _SPARC64_DEV_PSYCHOVAR_H_ */
    125