pyro.c revision 1.1
1 /* $OpenBSD: pyro.c,v 1.20 2010/12/05 15:15:14 kettenis Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Jason L. Wright (jason (at) thought.net) 5 * Copyright (c) 2003 Henric Jungheim 6 * Copyright (c) 2007 Mark Kettenis 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 27 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <sys/param.h> 32 #include <sys/device.h> 33 #include <sys/errno.h> 34 #include <sys/malloc.h> 35 #include <sys/systm.h> 36 37 #define _SPARC_BUS_DMA_PRIVATE 38 #include <machine/bus.h> 39 #include <machine/autoconf.h> 40 41 #ifdef DDB 42 #include <machine/db_machdep.h> 43 #endif 44 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcireg.h> 47 48 #include <sparc64/dev/iommureg.h> 49 #include <sparc64/dev/iommuvar.h> 50 #include <sparc64/dev/pyrovar.h> 51 52 #ifdef DEBUG 53 #define PDB_PROM 0x01 54 #define PDB_BUSMAP 0x02 55 #define PDB_INTR 0x04 56 #define PDB_CONF 0x08 57 int pyro_debug = ~0; 58 #define DPRINTF(l, s) do { if (pyro_debug & l) printf s; } while (0) 59 #else 60 #define DPRINTF(l, s) 61 #endif 62 63 #define FIRE_RESET_GEN 0x7010 64 65 #define FIRE_RESET_GEN_XIR 0x0000000000000002L 66 67 #define FIRE_INTRMAP_INT_CNTRL_NUM_MASK 0x000003c0 68 #define FIRE_INTRMAP_INT_CNTRL_NUM0 0x00000040 69 #define FIRE_INTRMAP_INT_CNTRL_NUM1 0x00000080 70 #define FIRE_INTRMAP_INT_CNTRL_NUM2 0x00000100 71 #define FIRE_INTRMAP_INT_CNTRL_NUM3 0x00000200 72 #define FIRE_INTRMAP_T_JPID_SHIFT 26 73 #define FIRE_INTRMAP_T_JPID_MASK 0x7c000000 74 75 #define OBERON_INTRMAP_T_DESTID_SHIFT 21 76 #define OBERON_INTRMAP_T_DESTID_MASK 0x7fe00000 77 78 extern struct sparc_pci_chipset _sparc_pci_chipset; 79 80 int pyro_match(struct device *, void *, void *); 81 void pyro_attach(struct device *, struct device *, void *); 82 void pyro_init(struct pyro_softc *, int); 83 void pyro_init_iommu(struct pyro_softc *, struct pyro_pbm *); 84 int pyro_print(void *, const char *); 85 86 pci_chipset_tag_t pyro_alloc_chipset(struct pyro_pbm *, int, 87 pci_chipset_tag_t); 88 bus_space_tag_t pyro_alloc_mem_tag(struct pyro_pbm *); 89 bus_space_tag_t pyro_alloc_io_tag(struct pyro_pbm *); 90 bus_space_tag_t pyro_alloc_config_tag(struct pyro_pbm *); 91 bus_space_tag_t _pyro_alloc_bus_tag(struct pyro_pbm *, const char *, 92 int, int, int); 93 bus_dma_tag_t pyro_alloc_dma_tag(struct pyro_pbm *); 94 95 int pyro_conf_size(pci_chipset_tag_t, pcitag_t); 96 pcireg_t pyro_conf_read(pci_chipset_tag_t, pcitag_t, int); 97 void pyro_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 98 99 int pyro_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 100 int _pyro_bus_map(bus_space_tag_t, bus_space_tag_t, bus_addr_t, 101 bus_size_t, int, bus_space_handle_t *); 102 paddr_t _pyro_bus_mmap(bus_space_tag_t, bus_space_tag_t, bus_addr_t, off_t, 103 int, int); 104 void *_pyro_intr_establish(bus_space_tag_t, bus_space_tag_t, int, int, int, 105 int (*)(void *), void *, const char *); 106 107 int pyro_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, int, 108 bus_size_t, bus_size_t, int, bus_dmamap_t *); 109 110 #ifdef DDB 111 void pyro_xir(void *, int); 112 #endif 113 114 int 115 pyro_match(struct device *parent, void *match, void *aux) 116 { 117 struct mainbus_attach_args *ma = aux; 118 char *str; 119 120 if (strcmp(ma->ma_name, "pci") != 0) 121 return (0); 122 123 str = getpropstring(ma->ma_node, "compatible"); 124 if (strcmp(str, "pciex108e,80f0") == 0 || 125 strcmp(str, "pciex108e,80f8") == 0) 126 return (1); 127 128 return (0); 129 } 130 131 void 132 pyro_attach(struct device *parent, struct device *self, void *aux) 133 { 134 struct pyro_softc *sc = (struct pyro_softc *)self; 135 struct mainbus_attach_args *ma = aux; 136 char *str; 137 int busa; 138 139 sc->sc_node = ma->ma_node; 140 sc->sc_dmat = ma->ma_dmatag; 141 sc->sc_bust = ma->ma_bustag; 142 sc->sc_csr = ma->ma_reg[0].ur_paddr; 143 sc->sc_xbc = ma->ma_reg[1].ur_paddr; 144 sc->sc_ign = INTIGN(ma->ma_upaid << INTMAP_IGN_SHIFT); 145 146 if ((ma->ma_reg[0].ur_paddr & 0x00700000) == 0x00600000) 147 busa = 1; 148 else 149 busa = 0; 150 151 if (bus_space_map(sc->sc_bust, sc->sc_csr, 152 ma->ma_reg[0].ur_len, 0, &sc->sc_csrh)) { 153 printf(": failed to map csr registers\n"); 154 return; 155 } 156 157 if (bus_space_map(sc->sc_bust, sc->sc_xbc, 158 ma->ma_reg[1].ur_len, 0, &sc->sc_xbch)) { 159 printf(": failed to map xbc registers\n"); 160 return; 161 } 162 163 str = getpropstring(ma->ma_node, "compatible"); 164 if (strcmp(str, "pciex108e,80f8") == 0) 165 sc->sc_oberon = 1; 166 167 pyro_init(sc, busa); 168 } 169 170 void 171 pyro_init(struct pyro_softc *sc, int busa) 172 { 173 struct pyro_pbm *pbm; 174 struct pcibus_attach_args pba; 175 int *busranges = NULL, nranges; 176 177 pbm = malloc(sizeof(*pbm), M_DEVBUF, M_NOWAIT | M_ZERO); 178 if (pbm == NULL) 179 panic("pyro: can't alloc pyro pbm"); 180 181 pbm->pp_sc = sc; 182 pbm->pp_bus_a = busa; 183 184 if (getprop(sc->sc_node, "ranges", sizeof(struct pyro_range), 185 &pbm->pp_nrange, (void **)&pbm->pp_range)) 186 panic("pyro: can't get ranges"); 187 188 if (getprop(sc->sc_node, "bus-range", sizeof(int), &nranges, 189 (void **)&busranges)) 190 panic("pyro: can't get bus-range"); 191 192 printf(": \"%s\", rev %d, ign %x, bus %c %d to %d\n", 193 sc->sc_oberon ? "Oberon" : "Fire", 194 getpropint(sc->sc_node, "module-revision#", 0), sc->sc_ign, 195 busa ? 'A' : 'B', busranges[0], busranges[1]); 196 197 printf("%s: ", sc->sc_dv.dv_xname); 198 pyro_init_iommu(sc, pbm); 199 200 pbm->pp_memt = pyro_alloc_mem_tag(pbm); 201 pbm->pp_iot = pyro_alloc_io_tag(pbm); 202 pbm->pp_cfgt = pyro_alloc_config_tag(pbm); 203 pbm->pp_dmat = pyro_alloc_dma_tag(pbm); 204 205 if (bus_space_map(pbm->pp_cfgt, 0, 0x10000000, 0, &pbm->pp_cfgh)) 206 panic("pyro: can't map config space"); 207 208 pbm->pp_pc = pyro_alloc_chipset(pbm, sc->sc_node, &_sparc_pci_chipset); 209 210 pbm->pp_pc->bustag = pbm->pp_cfgt; 211 pbm->pp_pc->bushandle = pbm->pp_cfgh; 212 213 bzero(&pba, sizeof(pba)); 214 pba.pba_busname = "pci"; 215 pba.pba_domain = pci_ndomains++; 216 pba.pba_bus = busranges[0]; 217 pba.pba_pc = pbm->pp_pc; 218 #if 0 219 pba.pba_flags = pbm->pp_flags; 220 #endif 221 pba.pba_dmat = pbm->pp_dmat; 222 pba.pba_memt = pbm->pp_memt; 223 pba.pba_iot = pbm->pp_iot; 224 pba.pba_pc->conf_size = pyro_conf_size; 225 pba.pba_pc->conf_read = pyro_conf_read; 226 pba.pba_pc->conf_write = pyro_conf_write; 227 pba.pba_pc->intr_map = pyro_intr_map; 228 229 free(busranges, M_DEVBUF); 230 231 #ifdef DDB 232 db_register_xir(pyro_xir, sc); 233 #endif 234 235 config_found(&sc->sc_dv, &pba, pyro_print); 236 } 237 238 void 239 pyro_init_iommu(struct pyro_softc *sc, struct pyro_pbm *pbm) 240 { 241 struct iommu_state *is = &pbm->pp_is; 242 int tsbsize = 7; 243 u_int32_t iobase = -1; 244 char *name; 245 246 is->is_bustag = sc->sc_bust; 247 248 if (bus_space_subregion(is->is_bustag, sc->sc_csrh, 249 0x40000, 0x100, &is->is_iommu)) { 250 panic("pyro: unable to create iommu handle"); 251 } 252 253 is->is_sb[0] = &pbm->pp_sb; 254 is->is_sb[0]->sb_bustag = is->is_bustag; 255 256 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 257 if (name == NULL) 258 panic("couldn't malloc iommu name"); 259 snprintf(name, 32, "%s dvma", sc->sc_dv.dv_xname); 260 261 /* On Oberon, we need to flush the cache. */ 262 if (sc->sc_oberon) 263 is->is_flags |= IOMMU_FLUSH_CACHE; 264 265 iommu_init(name, is, tsbsize, iobase); 266 } 267 268 int 269 pyro_print(void *aux, const char *p) 270 { 271 if (p == NULL) 272 return (UNCONF); 273 return (QUIET); 274 } 275 276 int 277 pyro_conf_size(pci_chipset_tag_t pc, pcitag_t tag) 278 { 279 return PCIE_CONFIG_SPACE_SIZE; 280 } 281 282 pcireg_t 283 pyro_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 284 { 285 return (bus_space_read_4(pc->bustag, pc->bushandle, 286 (PCITAG_OFFSET(tag) << 4) + reg)); 287 } 288 289 void 290 pyro_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 291 { 292 bus_space_write_4(pc->bustag, pc->bushandle, 293 (PCITAG_OFFSET(tag) << 4) + reg, data); 294 } 295 296 /* 297 * Bus-specific interrupt mapping 298 */ 299 int 300 pyro_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 301 { 302 struct pyro_pbm *pp = pa->pa_pc->cookie; 303 struct pyro_softc *sc = pp->pp_sc; 304 u_int dev; 305 306 if (*ihp != (pci_intr_handle_t)-1) { 307 *ihp |= sc->sc_ign; 308 return (0); 309 } 310 311 /* 312 * We didn't find a PROM mapping for this interrupt. Try to 313 * construct one ourselves based on the swizzled interrupt pin 314 * and the interrupt mapping for PCI slots documented in the 315 * UltraSPARC-IIi User's Manual. 316 */ 317 318 if (pa->pa_intrpin == 0) 319 return (-1); 320 321 /* 322 * This deserves some documentation. Should anyone 323 * have anything official looking, please speak up. 324 */ 325 dev = pa->pa_device - 1; 326 327 *ihp = (pa->pa_intrpin - 1) & INTMAP_PCIINT; 328 *ihp |= (dev << 2) & INTMAP_PCISLOT; 329 *ihp |= sc->sc_ign; 330 331 return (0); 332 } 333 334 bus_space_tag_t 335 pyro_alloc_mem_tag(struct pyro_pbm *pp) 336 { 337 return (_pyro_alloc_bus_tag(pp, "mem", 338 0x02, /* 32-bit mem space (where's the #define???) */ 339 ASI_PRIMARY, ASI_PRIMARY_LITTLE)); 340 } 341 342 bus_space_tag_t 343 pyro_alloc_io_tag(struct pyro_pbm *pp) 344 { 345 return (_pyro_alloc_bus_tag(pp, "io", 346 0x01, /* IO space (where's the #define???) */ 347 ASI_PHYS_NON_CACHED_LITTLE, ASI_PHYS_NON_CACHED)); 348 } 349 350 bus_space_tag_t 351 pyro_alloc_config_tag(struct pyro_pbm *pp) 352 { 353 return (_pyro_alloc_bus_tag(pp, "cfg", 354 0x00, /* Config space (where's the #define???) */ 355 ASI_PHYS_NON_CACHED_LITTLE, ASI_PHYS_NON_CACHED)); 356 } 357 358 bus_space_tag_t 359 _pyro_alloc_bus_tag(struct pyro_pbm *pbm, const char *name, int ss, 360 int asi, int sasi) 361 { 362 struct pyro_softc *sc = pbm->pp_sc; 363 struct sparc_bus_space_tag *bt; 364 365 bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO); 366 if (bt == NULL) 367 panic("pyro: could not allocate bus tag"); 368 369 snprintf(bt->name, sizeof(bt->name), "%s-pbm_%s(%d/%2.2x)", 370 sc->sc_dv.dv_xname, name, ss, asi); 371 372 bt->cookie = pbm; 373 bt->parent = sc->sc_bust; 374 bt->default_type = ss; 375 bt->asi = asi; 376 bt->sasi = sasi; 377 bt->sparc_bus_map = _pyro_bus_map; 378 bt->sparc_bus_mmap = _pyro_bus_mmap; 379 bt->sparc_intr_establish = _pyro_intr_establish; 380 return (bt); 381 } 382 383 bus_dma_tag_t 384 pyro_alloc_dma_tag(struct pyro_pbm *pbm) 385 { 386 struct pyro_softc *sc = pbm->pp_sc; 387 bus_dma_tag_t dt, pdt = sc->sc_dmat; 388 389 dt = malloc(sizeof(*dt), M_DEVBUF, M_NOWAIT | M_ZERO); 390 if (dt == NULL) 391 panic("pyro: could not alloc dma tag"); 392 393 dt->_cookie = pbm; 394 dt->_parent = pdt; 395 dt->_dmamap_create = pyro_dmamap_create; 396 dt->_dmamap_destroy = iommu_dvmamap_destroy; 397 dt->_dmamap_load = iommu_dvmamap_load; 398 dt->_dmamap_load_raw = iommu_dvmamap_load_raw; 399 dt->_dmamap_unload = iommu_dvmamap_unload; 400 dt->_dmamap_sync = iommu_dvmamap_sync; 401 dt->_dmamem_alloc = iommu_dvmamem_alloc; 402 dt->_dmamem_free = iommu_dvmamem_free; 403 return (dt); 404 } 405 406 pci_chipset_tag_t 407 pyro_alloc_chipset(struct pyro_pbm *pbm, int node, pci_chipset_tag_t pc) 408 { 409 pci_chipset_tag_t npc; 410 411 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 412 if (npc == NULL) 413 panic("pyro: could not allocate pci_chipset_tag_t"); 414 memcpy(npc, pc, sizeof *pc); 415 npc->cookie = pbm; 416 npc->rootnode = node; 417 return (npc); 418 } 419 420 int 421 pyro_dmamap_create(bus_dma_tag_t t, bus_dma_tag_t t0, bus_size_t size, 422 int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, 423 bus_dmamap_t *dmamp) 424 { 425 struct pyro_pbm *pp = t->_cookie; 426 427 return (iommu_dvmamap_create(t, t0, &pp->pp_sb, size, nsegments, 428 maxsegsz, boundary, flags, dmamp)); 429 } 430 431 int 432 _pyro_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset, 433 bus_size_t size, int flags, bus_space_handle_t *hp) 434 { 435 struct pyro_pbm *pbm = t->cookie; 436 int i, ss; 437 438 DPRINTF(PDB_BUSMAP, ("_pyro_bus_map: type %d off %qx sz %qx flags %d", 439 t->default_type, 440 (unsigned long long)offset, 441 (unsigned long long)size, 442 flags)); 443 444 ss = t->default_type; 445 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 446 447 if (t->parent == 0 || t->parent->sparc_bus_map == 0) { 448 printf("\n_pyro_bus_map: invalid parent"); 449 return (EINVAL); 450 } 451 452 if (flags & BUS_SPACE_MAP_PROMADDRESS) { 453 return ((*t->parent->sparc_bus_map) 454 (t, t0, offset, size, flags, hp)); 455 } 456 457 for (i = 0; i < pbm->pp_nrange; i++) { 458 bus_addr_t paddr; 459 460 if (((pbm->pp_range[i].cspace >> 24) & 0x03) != ss) 461 continue; 462 463 paddr = pbm->pp_range[i].phys_lo + offset; 464 paddr |= ((bus_addr_t)pbm->pp_range[i].phys_hi) << 32; 465 return ((*t->parent->sparc_bus_map) 466 (t, t0, paddr, size, flags, hp)); 467 } 468 469 return (EINVAL); 470 } 471 472 paddr_t 473 _pyro_bus_mmap(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t paddr, 474 off_t off, int prot, int flags) 475 { 476 bus_addr_t offset = paddr; 477 struct pyro_pbm *pbm = t->cookie; 478 int i, ss; 479 480 ss = t->default_type; 481 482 DPRINTF(PDB_BUSMAP, ("_pyro_bus_mmap: prot %d flags %d pa %qx\n", 483 prot, flags, (unsigned long long)paddr)); 484 485 if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) { 486 printf("\n_pyro_bus_mmap: invalid parent"); 487 return (-1); 488 } 489 490 for (i = 0; i < pbm->pp_nrange; i++) { 491 bus_addr_t paddr; 492 493 if (((pbm->pp_range[i].cspace >> 24) & 0x03) != ss) 494 continue; 495 496 paddr = pbm->pp_range[i].phys_lo + offset; 497 paddr |= ((bus_addr_t)pbm->pp_range[i].phys_hi<<32); 498 return ((*t->parent->sparc_bus_mmap) 499 (t, t0, paddr, off, prot, flags)); 500 } 501 502 return (-1); 503 } 504 505 void * 506 _pyro_intr_establish(bus_space_tag_t t, bus_space_tag_t t0, int ihandle, 507 int level, int flags, int (*handler)(void *), void *arg, const char *what) 508 { 509 struct pyro_pbm *pbm = t->cookie; 510 struct pyro_softc *sc = pbm->pp_sc; 511 struct intrhand *ih = NULL; 512 volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL; 513 int ino; 514 515 ino = INTINO(ihandle); 516 517 if (level == IPL_NONE) 518 level = INTLEV(ihandle); 519 if (level == IPL_NONE) { 520 printf(": no IPL, setting IPL 2.\n"); 521 level = 2; 522 } 523 524 if ((flags & BUS_INTR_ESTABLISH_SOFTINTR) == 0) { 525 u_int64_t *imap, *iclr; 526 527 imap = bus_space_vaddr(sc->sc_bust, sc->sc_csrh) + 0x1000; 528 iclr = bus_space_vaddr(sc->sc_bust, sc->sc_csrh) + 0x1400; 529 intrmapptr = &imap[ino]; 530 intrclrptr = &iclr[ino]; 531 ino |= INTVEC(ihandle); 532 } 533 534 ih = bus_intr_allocate(t0, handler, arg, ino, level, intrmapptr, 535 intrclrptr, what); 536 if (ih == NULL) 537 return (NULL); 538 539 intr_establish(ih->ih_pil, ih); 540 541 if (intrmapptr != NULL) { 542 u_int64_t intrmap; 543 544 intrmap = *intrmapptr; 545 intrmap &= ~FIRE_INTRMAP_INT_CNTRL_NUM_MASK; 546 intrmap |= FIRE_INTRMAP_INT_CNTRL_NUM0; 547 if (sc->sc_oberon) { 548 intrmap &= ~OBERON_INTRMAP_T_DESTID_MASK; 549 intrmap |= CPU_JUPITERID << 550 OBERON_INTRMAP_T_DESTID_SHIFT; 551 } else { 552 intrmap &= ~FIRE_INTRMAP_T_JPID_MASK; 553 intrmap |= CPU_UPAID << FIRE_INTRMAP_T_JPID_SHIFT; 554 } 555 intrmap |= INTMAP_V; 556 *intrmapptr = intrmap; 557 intrmap = *intrmapptr; 558 ih->ih_number |= intrmap & INTMAP_INR; 559 } 560 561 return (ih); 562 } 563 564 #ifdef DDB 565 void 566 pyro_xir(void *arg, int cpu) 567 { 568 struct pyro_softc *sc = arg; 569 570 bus_space_write_8(sc->sc_bust, sc->sc_xbch, FIRE_RESET_GEN, 571 FIRE_RESET_GEN_XIR); 572 } 573 #endif 574 575 const struct cfattach pyro_ca = { 576 sizeof(struct pyro_softc), pyro_match, pyro_attach 577 }; 578 579 struct cfdriver pyro_cd = { 580 NULL, "pyro", DV_DULL 581 }; 582
Indexes created Tue Sep 23 02:09:52 GMT 2025