sbus.c revision 1.63
1 /* $NetBSD: sbus.c,v 1.63 2003/10/11 20:53:14 petrov Exp $ */ 2 3 /* 4 * Copyright (c) 1999-2002 Eduardo Horvath 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 32 /* 33 * Sbus stuff. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: sbus.c,v 1.63 2003/10/11 20:53:14 petrov Exp $"); 38 39 #include "opt_ddb.h" 40 41 #include <sys/param.h> 42 #include <sys/extent.h> 43 #include <sys/malloc.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/reboot.h> 47 48 #include <machine/bus.h> 49 #include <machine/openfirm.h> 50 51 #include <sparc64/sparc64/cache.h> 52 #include <sparc64/dev/iommureg.h> 53 #include <sparc64/dev/iommuvar.h> 54 #include <sparc64/dev/sbusreg.h> 55 #include <dev/sbus/sbusvar.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <machine/autoconf.h> 60 #include <machine/cpu.h> 61 #include <machine/sparc64.h> 62 63 #ifdef DEBUG 64 #define SDB_DVMA 0x1 65 #define SDB_INTR 0x2 66 int sbus_debug = 0; 67 #define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0) 68 #else 69 #define DPRINTF(l, s) 70 #endif 71 72 void sbusreset __P((int)); 73 74 static bus_space_tag_t sbus_alloc_bustag __P((struct sbus_softc *)); 75 static bus_dma_tag_t sbus_alloc_dmatag __P((struct sbus_softc *)); 76 static int sbus_get_intr __P((struct sbus_softc *, int, 77 struct openprom_intr **, int *, int)); 78 static int sbus_overtemp __P((void *)); 79 static int _sbus_bus_map __P(( 80 bus_space_tag_t, 81 bus_addr_t, /*offset*/ 82 bus_size_t, /*size*/ 83 int, /*flags*/ 84 vaddr_t, /* XXX unused -- compat w/sparc */ 85 bus_space_handle_t *)); 86 static void *sbus_intr_establish __P(( 87 bus_space_tag_t, 88 int, /*Sbus interrupt level*/ 89 int, /*`device class' priority*/ 90 int (*) __P((void *)), /*handler*/ 91 void *, /*handler arg*/ 92 void (*) __P((void)))); /*optional fast trap*/ 93 94 95 /* autoconfiguration driver */ 96 int sbus_match __P((struct device *, struct cfdata *, void *)); 97 void sbus_attach __P((struct device *, struct device *, void *)); 98 99 100 CFATTACH_DECL(sbus, sizeof(struct sbus_softc), 101 sbus_match, sbus_attach, NULL, NULL); 102 103 extern struct cfdriver sbus_cd; 104 105 /* 106 * DVMA routines 107 */ 108 int sbus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 109 bus_size_t, struct proc *, int)); 110 void sbus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 111 int sbus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 112 bus_dma_segment_t *, int, bus_size_t, int)); 113 void sbus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 114 bus_size_t, int)); 115 int sbus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size, 116 bus_size_t alignment, bus_size_t boundary, 117 bus_dma_segment_t *segs, int nsegs, int *rsegs, 118 int flags)); 119 void sbus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 120 int nsegs)); 121 int sbus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 122 int nsegs, size_t size, caddr_t *kvap, int flags)); 123 void sbus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva, 124 size_t size)); 125 126 /* 127 * Child devices receive the Sbus interrupt level in their attach 128 * arguments. We translate these to CPU IPLs using the following 129 * tables. Note: obio bus interrupt levels are identical to the 130 * processor IPL. 131 * 132 * The second set of tables is used when the Sbus interrupt level 133 * cannot be had from the PROM as an `interrupt' property. We then 134 * fall back on the `intr' property which contains the CPU IPL. 135 */ 136 137 /* 138 * This value is or'ed into the attach args' interrupt level cookie 139 * if the interrupt level comes from an `intr' property, i.e. it is 140 * not an Sbus interrupt level. 141 */ 142 #define SBUS_INTR_COMPAT 0x80000000 143 144 145 /* 146 * Print the location of some sbus-attached device (called just 147 * before attaching that device). If `sbus' is not NULL, the 148 * device was found but not configured; print the sbus as well. 149 * Return UNCONF (config_find ignores this if the device was configured). 150 */ 151 int 152 sbus_print(args, busname) 153 void *args; 154 const char *busname; 155 { 156 struct sbus_attach_args *sa = args; 157 int i; 158 159 if (busname) 160 aprint_normal("%s at %s", sa->sa_name, busname); 161 aprint_normal(" slot %ld offset 0x%lx", (long)sa->sa_slot, 162 (u_long)sa->sa_offset); 163 for (i = 0; i < sa->sa_nintr; i++) { 164 struct openprom_intr *sbi = &sa->sa_intr[i]; 165 166 aprint_normal(" vector %lx ipl %ld", 167 (u_long)sbi->oi_vec, 168 (long)INTLEV(sbi->oi_pri)); 169 } 170 return (UNCONF); 171 } 172 173 int 174 sbus_match(parent, cf, aux) 175 struct device *parent; 176 struct cfdata *cf; 177 void *aux; 178 { 179 struct mainbus_attach_args *ma = aux; 180 181 return (strcmp(cf->cf_name, ma->ma_name) == 0); 182 } 183 184 /* 185 * Attach an Sbus. 186 */ 187 void 188 sbus_attach(parent, self, aux) 189 struct device *parent; 190 struct device *self; 191 void *aux; 192 { 193 struct sbus_softc *sc = (struct sbus_softc *)self; 194 struct mainbus_attach_args *ma = aux; 195 struct intrhand *ih; 196 int ipl; 197 char *name; 198 int node = ma->ma_node; 199 int node0, error; 200 bus_space_tag_t sbt; 201 struct sbus_attach_args sa; 202 203 sc->sc_bustag = ma->ma_bustag; 204 sc->sc_dmatag = ma->ma_dmatag; 205 sc->sc_ign = ma->ma_interrupts[0] & INTMAP_IGN; 206 207 /* XXXX Use sysio PROM mappings for interrupt vector regs. */ 208 sparc_promaddr_to_handle(sc->sc_bustag, ma->ma_address[0], &sc->sc_bh); 209 sc->sc_sysio = (struct sysioreg *)bus_space_vaddr(sc->sc_bustag, 210 sc->sc_bh); 211 212 #ifdef _LP64 213 /* 214 * 32-bit kernels use virtual addresses for bus space operations 215 * so we may as well use the prom VA. 216 * 217 * 64-bit kernels use physical addresses for bus space operations 218 * so mapping this in again will reduce TLB thrashing. 219 */ 220 if (bus_space_map(sc->sc_bustag, ma->ma_reg[0].ur_paddr, 221 ma->ma_reg[0].ur_len, 0, &sc->sc_bh) != 0) { 222 printf("%s: cannot map registers\n", self->dv_xname); 223 return; 224 } 225 #endif 226 227 /* 228 * Record clock frequency for synchronous SCSI. 229 * IS THIS THE CORRECT DEFAULT?? 230 */ 231 sc->sc_clockfreq = PROM_getpropint(node, "clock-frequency", 232 25*1000*1000); 233 printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq)); 234 235 sbt = sbus_alloc_bustag(sc); 236 sc->sc_dmatag = sbus_alloc_dmatag(sc); 237 238 /* 239 * Get the SBus burst transfer size if burst transfers are supported 240 */ 241 sc->sc_burst = PROM_getpropint(node, "burst-sizes", 0); 242 243 /* 244 * Collect address translations from the OBP. 245 */ 246 error = PROM_getprop(node, "ranges", sizeof(struct openprom_range), 247 &sc->sc_nrange, &sc->sc_range); 248 if (error) 249 panic("%s: error getting ranges property", sc->sc_dev.dv_xname); 250 251 /* initialize the IOMMU */ 252 253 /* punch in our copies */ 254 sc->sc_is.is_bustag = sc->sc_bustag; 255 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 256 (vaddr_t)&((struct sysioreg *)NULL)->sys_iommu, 257 sizeof (struct iommureg), &sc->sc_is.is_iommu); 258 259 /* initialize our strbuf_ctl */ 260 sc->sc_is.is_sb[0] = &sc->sc_sb; 261 sc->sc_sb.sb_is = &sc->sc_is; 262 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 263 (vaddr_t)&((struct sysioreg *)NULL)->sys_strbuf, 264 sizeof (struct iommu_strbuf), &sc->sc_sb.sb_sb); 265 /* Point sb_flush to our flush buffer. */ 266 sc->sc_sb.sb_flush = &sc->sc_flush; 267 268 /* give us a nice name.. */ 269 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 270 if (name == 0) 271 panic("couldn't malloc iommu name"); 272 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 273 274 iommu_init(name, &sc->sc_is, 0, -1); 275 276 /* Enable the over temp intr */ 277 ih = (struct intrhand *) 278 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 279 ih->ih_map = &sc->sc_sysio->therm_int_map; 280 ih->ih_clr = NULL; /* &sc->sc_sysio->therm_clr_int; */ 281 ih->ih_fun = sbus_overtemp; 282 ipl = 1; 283 ih->ih_pil = (1<<ipl); 284 ih->ih_number = INTVEC(*(ih->ih_map)); 285 intr_establish(ipl, ih); 286 *(ih->ih_map) |= INTMAP_V; 287 288 /* 289 * Note: the stupid SBUS IOMMU ignores the high bits of an address, so a 290 * NULL DMA pointer will be translated by the first page of the IOTSB. 291 * To avoid bugs we'll alloc and ignore the first entry in the IOTSB. 292 */ 293 { 294 u_long dummy; 295 296 if (extent_alloc_subregion(sc->sc_is.is_dvmamap, 297 sc->sc_is.is_dvmabase, sc->sc_is.is_dvmabase + PAGE_SIZE, 298 PAGE_SIZE, PAGE_SIZE, 0, EX_NOWAIT|EX_BOUNDZERO, 299 (u_long *)&dummy) != 0) 300 panic("sbus iommu: can't toss first dvma page"); 301 } 302 303 /* 304 * Loop through ROM children, fixing any relative addresses 305 * and then configuring each device. 306 * `specials' is an array of device names that are treated 307 * specially: 308 */ 309 node0 = OF_child(node); 310 for (node = node0; node; node = OF_peer(node)) { 311 char *name = PROM_getpropstring(node, "name"); 312 313 if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag, 314 node, &sa) != 0) { 315 printf("sbus_attach: %s: incomplete\n", name); 316 continue; 317 } 318 (void) config_found(&sc->sc_dev, (void *)&sa, sbus_print); 319 sbus_destroy_attach_args(&sa); 320 } 321 } 322 323 int 324 sbus_setup_attach_args(sc, bustag, dmatag, node, sa) 325 struct sbus_softc *sc; 326 bus_space_tag_t bustag; 327 bus_dma_tag_t dmatag; 328 int node; 329 struct sbus_attach_args *sa; 330 { 331 /*struct openprom_addr sbusreg;*/ 332 /*int base;*/ 333 int error; 334 int n; 335 336 bzero(sa, sizeof(struct sbus_attach_args)); 337 error = PROM_getprop(node, "name", 1, &n, &sa->sa_name); 338 if (error != 0) 339 return (error); 340 sa->sa_name[n] = '\0'; 341 342 sa->sa_bustag = bustag; 343 sa->sa_dmatag = dmatag; 344 sa->sa_node = node; 345 sa->sa_frequency = sc->sc_clockfreq; 346 347 error = PROM_getprop(node, "reg", sizeof(struct openprom_addr), 348 &sa->sa_nreg, &sa->sa_reg); 349 if (error != 0) { 350 char buf[32]; 351 if (error != ENOENT || 352 !node_has_property(node, "device_type") || 353 strcmp(PROM_getpropstringA(node, "device_type", buf), 354 "hierarchical") != 0) 355 return (error); 356 } 357 for (n = 0; n < sa->sa_nreg; n++) { 358 /* Convert to relative addressing, if necessary */ 359 u_int32_t base = sa->sa_reg[n].oa_base; 360 if (SBUS_ABS(base)) { 361 sa->sa_reg[n].oa_space = SBUS_ABS_TO_SLOT(base); 362 sa->sa_reg[n].oa_base = SBUS_ABS_TO_OFFSET(base); 363 } 364 } 365 366 if ((error = sbus_get_intr(sc, node, &sa->sa_intr, &sa->sa_nintr, 367 sa->sa_slot)) != 0) 368 return (error); 369 370 error = PROM_getprop(node, "address", sizeof(u_int32_t), 371 &sa->sa_npromvaddrs, &sa->sa_promvaddrs); 372 if (error != 0 && error != ENOENT) 373 return (error); 374 375 return (0); 376 } 377 378 void 379 sbus_destroy_attach_args(sa) 380 struct sbus_attach_args *sa; 381 { 382 if (sa->sa_name != NULL) 383 free(sa->sa_name, M_DEVBUF); 384 385 if (sa->sa_nreg != 0) 386 free(sa->sa_reg, M_DEVBUF); 387 388 if (sa->sa_intr) 389 free(sa->sa_intr, M_DEVBUF); 390 391 if (sa->sa_promvaddrs) 392 free((void *)sa->sa_promvaddrs, M_DEVBUF); 393 394 bzero(sa, sizeof(struct sbus_attach_args)); /*DEBUG*/ 395 } 396 397 398 int 399 _sbus_bus_map(t, addr, size, flags, v, hp) 400 bus_space_tag_t t; 401 bus_addr_t addr; 402 bus_size_t size; 403 int flags; 404 vaddr_t v; 405 bus_space_handle_t *hp; 406 { 407 struct sbus_softc *sc = t->cookie; 408 int64_t slot = BUS_ADDR_IOSPACE(addr); 409 int64_t offset = BUS_ADDR_PADDR(addr); 410 int i; 411 412 for (i = 0; i < sc->sc_nrange; i++) { 413 bus_addr_t paddr; 414 415 if (sc->sc_range[i].or_child_space != slot) 416 continue; 417 418 /* We've found the connection to the parent bus */ 419 paddr = sc->sc_range[i].or_parent_base + offset; 420 paddr |= ((bus_addr_t)sc->sc_range[i].or_parent_space<<32); 421 DPRINTF(SDB_DVMA, 422 ("\n_sbus_bus_map: mapping paddr slot %lx offset %lx poffset %lx paddr %lx\n", 423 (long)slot, (long)offset, 424 (long)sc->sc_range[i].or_parent_base, 425 (long)paddr)); 426 return (bus_space_map(sc->sc_bustag, paddr, size, flags, hp)); 427 } 428 429 return (EINVAL); 430 } 431 432 433 bus_addr_t 434 sbus_bus_addr(t, btype, offset) 435 bus_space_tag_t t; 436 u_int btype; 437 u_int offset; 438 { 439 bus_addr_t baddr; 440 int slot = btype; 441 struct sbus_softc *sc = t->cookie; 442 int i; 443 444 for (i = 0; i < sc->sc_nrange; i++) { 445 if (sc->sc_range[i].or_child_space != slot) 446 continue; 447 448 baddr = sc->sc_range[i].or_parent_base + offset; 449 baddr |= ((bus_addr_t)sc->sc_range[i].or_parent_space<<32); 450 } 451 452 return (baddr); 453 } 454 455 456 /* 457 * Each attached device calls sbus_establish after it initializes 458 * its sbusdev portion. 459 */ 460 void 461 sbus_establish(sd, dev) 462 register struct sbusdev *sd; 463 register struct device *dev; 464 { 465 register struct sbus_softc *sc; 466 register struct device *curdev; 467 468 /* 469 * We have to look for the sbus by name, since it is not necessarily 470 * our immediate parent (i.e. sun4m /iommu/sbus/espdma/esp) 471 * We don't just use the device structure of the above-attached 472 * sbus, since we might (in the future) support multiple sbus's. 473 */ 474 for (curdev = dev->dv_parent; ; curdev = curdev->dv_parent) { 475 if (!curdev || !curdev->dv_xname) 476 panic("sbus_establish: can't find sbus parent for %s", 477 sd->sd_dev->dv_xname 478 ? sd->sd_dev->dv_xname 479 : "<unknown>" ); 480 481 if (strncmp(curdev->dv_xname, "sbus", 4) == 0) 482 break; 483 } 484 sc = (struct sbus_softc *) curdev; 485 486 sd->sd_dev = dev; 487 sd->sd_bchain = sc->sc_sbdev; 488 sc->sc_sbdev = sd; 489 } 490 491 /* 492 * Reset the given sbus. 493 */ 494 void 495 sbusreset(sbus) 496 int sbus; 497 { 498 register struct sbusdev *sd; 499 struct sbus_softc *sc = sbus_cd.cd_devs[sbus]; 500 struct device *dev; 501 502 printf("reset %s:", sc->sc_dev.dv_xname); 503 for (sd = sc->sc_sbdev; sd != NULL; sd = sd->sd_bchain) { 504 if (sd->sd_reset) { 505 dev = sd->sd_dev; 506 (*sd->sd_reset)(dev); 507 printf(" %s", dev->dv_xname); 508 } 509 } 510 /* Reload iommu regs */ 511 iommu_reset(&sc->sc_is); 512 } 513 514 /* 515 * Handle an overtemp situation. 516 * 517 * SPARCs have temperature sensors which generate interrupts 518 * if the machine's temperature exceeds a certain threshold. 519 * This handles the interrupt and powers off the machine. 520 * The same needs to be done to PCI controller drivers. 521 */ 522 int 523 sbus_overtemp(arg) 524 void *arg; 525 { 526 /* Should try a clean shutdown first */ 527 printf("DANGER: OVER TEMPERATURE detected\nShutting down...\n"); 528 delay(20); 529 cpu_reboot(RB_POWERDOWN|RB_HALT, NULL); 530 } 531 532 /* 533 * Get interrupt attributes for an Sbus device. 534 */ 535 int 536 sbus_get_intr(sc, node, ipp, np, slot) 537 struct sbus_softc *sc; 538 int node; 539 struct openprom_intr **ipp; 540 int *np; 541 int slot; 542 { 543 int *ipl; 544 int n, i; 545 char buf[32]; 546 547 /* 548 * The `interrupts' property contains the Sbus interrupt level. 549 */ 550 ipl = NULL; 551 if (PROM_getprop(node, "interrupts", sizeof(int), np, &ipl) == 0) { 552 struct openprom_intr *ip; 553 int pri; 554 555 /* Default to interrupt level 2 -- otherwise unused */ 556 pri = INTLEVENCODE(2); 557 558 /* Change format to an `struct sbus_intr' array */ 559 ip = malloc(*np * sizeof(struct openprom_intr), M_DEVBUF, 560 M_NOWAIT); 561 if (ip == NULL) 562 return (ENOMEM); 563 564 /* 565 * Now things get ugly. We need to take this value which is 566 * the interrupt vector number and encode the IPL into it 567 * somehow. Luckily, the interrupt vector has lots of free 568 * space and we can easily stuff the IPL in there for a while. 569 */ 570 PROM_getpropstringA(node, "device_type", buf); 571 if (!buf[0]) 572 PROM_getpropstringA(node, "name", buf); 573 574 for (i = 0; intrmap[i].in_class; i++) 575 if (strcmp(intrmap[i].in_class, buf) == 0) { 576 pri = INTLEVENCODE(intrmap[i].in_lev); 577 break; 578 } 579 580 /* 581 * Sbus card devices need the slot number encoded into 582 * the vector as this is generally not done. 583 */ 584 if ((ipl[0] & INTMAP_OBIO) == 0) 585 pri |= slot << 3; 586 587 for (n = 0; n < *np; n++) { 588 /* 589 * We encode vector and priority into sbi_pri so we 590 * can pass them as a unit. This will go away if 591 * sbus_establish ever takes an sbus_intr instead 592 * of an integer level. 593 * Stuff the real vector in sbi_vec. 594 */ 595 596 ip[n].oi_pri = pri|ipl[n]; 597 ip[n].oi_vec = ipl[n]; 598 } 599 free(ipl, M_DEVBUF); 600 *ipp = ip; 601 } 602 603 return (0); 604 } 605 606 607 /* 608 * Install an interrupt handler for an Sbus device. 609 */ 610 void * 611 sbus_intr_establish(t, pri, level, handler, arg, fastvec) 612 bus_space_tag_t t; 613 int pri; 614 int level; 615 int (*handler) __P((void *)); 616 void *arg; 617 void (*fastvec) __P((void)); /* ignored */ 618 { 619 struct sbus_softc *sc = t->cookie; 620 struct intrhand *ih; 621 int ipl; 622 long vec = pri; 623 624 ih = (struct intrhand *) 625 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 626 if (ih == NULL) 627 return (NULL); 628 629 if ((vec & SBUS_INTR_COMPAT) != 0) 630 ipl = vec & ~SBUS_INTR_COMPAT; 631 else { 632 /* Decode and remove IPL */ 633 ipl = INTLEV(vec); 634 vec = INTVEC(vec); 635 DPRINTF(SDB_INTR, 636 ("\nsbus: intr[%ld]%lx: %lx\nHunting for IRQ...\n", 637 (long)ipl, (long)vec, (u_long)intrlev[vec])); 638 if ((vec & INTMAP_OBIO) == 0) { 639 /* We're in an SBUS slot */ 640 /* Register the map and clear intr registers */ 641 642 int slot = INTSLOT(pri); 643 644 ih->ih_map = &(&sc->sc_sysio->sbus_slot0_int)[slot]; 645 ih->ih_clr = &sc->sc_sysio->sbus0_clr_int[vec]; 646 #ifdef DEBUG 647 if (sbus_debug & SDB_INTR) { 648 int64_t intrmap = *ih->ih_map; 649 650 printf("SBUS %lx IRQ as %llx in slot %d\n", 651 (long)vec, (long long)intrmap, slot); 652 printf("\tmap addr %p clr addr %p\n", 653 ih->ih_map, ih->ih_clr); 654 } 655 #endif 656 /* Enable the interrupt */ 657 vec |= INTMAP_V | sc->sc_ign | 658 (CPU_UPAID << INTMAP_TID_SHIFT); 659 *(ih->ih_map) = vec; 660 } else { 661 int64_t *intrptr = &sc->sc_sysio->scsi_int_map; 662 int64_t intrmap = 0; 663 int i; 664 665 /* Insert IGN */ 666 vec |= sc->sc_ign; 667 for (i = 0; &intrptr[i] <= 668 (int64_t *)&sc->sc_sysio->reserved_int_map && 669 INTVEC(intrmap = intrptr[i]) != INTVEC(vec); i++) 670 ; 671 if (INTVEC(intrmap) == INTVEC(vec)) { 672 DPRINTF(SDB_INTR, 673 ("OBIO %lx IRQ as %lx in slot %d\n", 674 vec, (long)intrmap, i)); 675 /* Register the map and clear intr registers */ 676 ih->ih_map = &intrptr[i]; 677 intrptr = (int64_t *)&sc->sc_sysio->scsi_clr_int; 678 ih->ih_clr = &intrptr[i]; 679 /* Enable the interrupt */ 680 intrmap |= INTMAP_V; 681 /* XXXX */ 682 *(ih->ih_map) = intrmap; 683 } else 684 panic("IRQ not found!"); 685 } 686 } 687 #ifdef DEBUG 688 if (sbus_debug & SDB_INTR) { long i; for (i = 0; i < 400000000; i++); } 689 #endif 690 691 ih->ih_fun = handler; 692 ih->ih_arg = arg; 693 ih->ih_number = vec; 694 ih->ih_pil = (1<<ipl); 695 intr_establish(ipl, ih); 696 return (ih); 697 } 698 699 static bus_space_tag_t 700 sbus_alloc_bustag(sc) 701 struct sbus_softc *sc; 702 { 703 bus_space_tag_t sbt; 704 705 sbt = (bus_space_tag_t) 706 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 707 if (sbt == NULL) 708 return (NULL); 709 710 bzero(sbt, sizeof *sbt); 711 sbt->cookie = sc; 712 sbt->parent = sc->sc_bustag; 713 sbt->type = SBUS_BUS_SPACE; 714 sbt->sparc_bus_map = _sbus_bus_map; 715 sbt->sparc_bus_mmap = sc->sc_bustag->sparc_bus_mmap; 716 sbt->sparc_intr_establish = sbus_intr_establish; 717 return (sbt); 718 } 719 720 721 static bus_dma_tag_t 722 sbus_alloc_dmatag(sc) 723 struct sbus_softc *sc; 724 { 725 bus_dma_tag_t sdt, psdt = sc->sc_dmatag; 726 727 sdt = (bus_dma_tag_t) 728 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 729 if (sdt == NULL) 730 /* Panic? */ 731 return (psdt); 732 733 sdt->_cookie = sc; 734 sdt->_parent = psdt; 735 #define PCOPY(x) sdt->x = psdt->x 736 PCOPY(_dmamap_create); 737 PCOPY(_dmamap_destroy); 738 sdt->_dmamap_load = sbus_dmamap_load; 739 PCOPY(_dmamap_load_mbuf); 740 PCOPY(_dmamap_load_uio); 741 sdt->_dmamap_load_raw = sbus_dmamap_load_raw; 742 sdt->_dmamap_unload = sbus_dmamap_unload; 743 sdt->_dmamap_sync = sbus_dmamap_sync; 744 sdt->_dmamem_alloc = sbus_dmamem_alloc; 745 sdt->_dmamem_free = sbus_dmamem_free; 746 sdt->_dmamem_map = sbus_dmamem_map; 747 sdt->_dmamem_unmap = sbus_dmamem_unmap; 748 PCOPY(_dmamem_mmap); 749 #undef PCOPY 750 sc->sc_dmatag = sdt; 751 return (sdt); 752 } 753 754 int 755 sbus_dmamap_load(tag, map, buf, buflen, p, flags) 756 bus_dma_tag_t tag; 757 bus_dmamap_t map; 758 void *buf; 759 bus_size_t buflen; 760 struct proc *p; 761 int flags; 762 { 763 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 764 765 return (iommu_dvmamap_load(tag, &sc->sc_sb, map, buf, buflen, p, flags)); 766 } 767 768 int 769 sbus_dmamap_load_raw(tag, map, segs, nsegs, size, flags) 770 bus_dma_tag_t tag; 771 bus_dmamap_t map; 772 bus_dma_segment_t *segs; 773 int nsegs; 774 bus_size_t size; 775 int flags; 776 { 777 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 778 779 return (iommu_dvmamap_load_raw(tag, &sc->sc_sb, map, segs, nsegs, flags, size)); 780 } 781 782 void 783 sbus_dmamap_unload(tag, map) 784 bus_dma_tag_t tag; 785 bus_dmamap_t map; 786 { 787 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 788 789 iommu_dvmamap_unload(tag, &sc->sc_sb, map); 790 } 791 792 void 793 sbus_dmamap_sync(tag, map, offset, len, ops) 794 bus_dma_tag_t tag; 795 bus_dmamap_t map; 796 bus_addr_t offset; 797 bus_size_t len; 798 int ops; 799 { 800 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 801 802 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 803 /* Flush the CPU then the IOMMU */ 804 bus_dmamap_sync(tag->_parent, map, offset, len, ops); 805 iommu_dvmamap_sync(tag, &sc->sc_sb, map, offset, len, ops); 806 } 807 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 808 /* Flush the IOMMU then the CPU */ 809 iommu_dvmamap_sync(tag, &sc->sc_sb, map, offset, len, ops); 810 bus_dmamap_sync(tag->_parent, map, offset, len, ops); 811 } 812 } 813 814 int 815 sbus_dmamem_alloc(tag, size, alignment, boundary, segs, nsegs, rsegs, flags) 816 bus_dma_tag_t tag; 817 bus_size_t size; 818 bus_size_t alignment; 819 bus_size_t boundary; 820 bus_dma_segment_t *segs; 821 int nsegs; 822 int *rsegs; 823 int flags; 824 { 825 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 826 827 return (iommu_dvmamem_alloc(tag, &sc->sc_sb, size, alignment, boundary, 828 segs, nsegs, rsegs, flags)); 829 } 830 831 void 832 sbus_dmamem_free(tag, segs, nsegs) 833 bus_dma_tag_t tag; 834 bus_dma_segment_t *segs; 835 int nsegs; 836 { 837 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 838 839 iommu_dvmamem_free(tag, &sc->sc_sb, segs, nsegs); 840 } 841 842 int 843 sbus_dmamem_map(tag, segs, nsegs, size, kvap, flags) 844 bus_dma_tag_t tag; 845 bus_dma_segment_t *segs; 846 int nsegs; 847 size_t size; 848 caddr_t *kvap; 849 int flags; 850 { 851 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 852 853 return (iommu_dvmamem_map(tag, &sc->sc_sb, segs, nsegs, size, kvap, flags)); 854 } 855 856 void 857 sbus_dmamem_unmap(tag, kva, size) 858 bus_dma_tag_t tag; 859 caddr_t kva; 860 size_t size; 861 { 862 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 863 864 iommu_dvmamem_unmap(tag, &sc->sc_sb, kva, size); 865 } 866
Indexes created Thu Oct 02 14:10:14 GMT 2025