sbus.c revision 1.68
1 /* $NetBSD: sbus.c,v 1.68 2004/03/21 12:50:14 martin Exp $ */ 2 3 /* 4 * Copyright (c) 1999-2002 Eduardo Horvath 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 32 /* 33 * Sbus stuff. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: sbus.c,v 1.68 2004/03/21 12:50:14 martin Exp $"); 38 39 #include "opt_ddb.h" 40 41 #include <sys/param.h> 42 #include <sys/extent.h> 43 #include <sys/malloc.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/reboot.h> 47 48 #include <machine/bus.h> 49 #include <machine/openfirm.h> 50 51 #include <sparc64/sparc64/cache.h> 52 #include <sparc64/dev/iommureg.h> 53 #include <sparc64/dev/iommuvar.h> 54 #include <sparc64/dev/sbusreg.h> 55 #include <dev/sbus/sbusvar.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <machine/autoconf.h> 60 #include <machine/cpu.h> 61 #include <machine/sparc64.h> 62 63 #ifdef DEBUG 64 #define SDB_DVMA 0x1 65 #define SDB_INTR 0x2 66 int sbus_debug = 0; 67 #define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0) 68 #else 69 #define DPRINTF(l, s) 70 #endif 71 72 void sbusreset __P((int)); 73 74 static bus_space_tag_t sbus_alloc_bustag __P((struct sbus_softc *)); 75 static bus_dma_tag_t sbus_alloc_dmatag __P((struct sbus_softc *)); 76 static int sbus_get_intr __P((struct sbus_softc *, int, 77 struct openprom_intr **, int *, int)); 78 static int sbus_overtemp __P((void *)); 79 static int _sbus_bus_map __P(( 80 bus_space_tag_t, 81 bus_addr_t, /*offset*/ 82 bus_size_t, /*size*/ 83 int, /*flags*/ 84 vaddr_t, /* XXX unused -- compat w/sparc */ 85 bus_space_handle_t *)); 86 static void *sbus_intr_establish __P(( 87 bus_space_tag_t, 88 int, /*Sbus interrupt level*/ 89 int, /*`device class' priority*/ 90 int (*) __P((void *)), /*handler*/ 91 void *, /*handler arg*/ 92 void (*) __P((void)))); /*optional fast trap*/ 93 94 95 /* autoconfiguration driver */ 96 int sbus_match __P((struct device *, struct cfdata *, void *)); 97 void sbus_attach __P((struct device *, struct device *, void *)); 98 99 100 CFATTACH_DECL(sbus, sizeof(struct sbus_softc), 101 sbus_match, sbus_attach, NULL, NULL); 102 103 extern struct cfdriver sbus_cd; 104 105 /* 106 * DVMA routines 107 */ 108 int sbus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 109 bus_size_t, struct proc *, int)); 110 void sbus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 111 int sbus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 112 bus_dma_segment_t *, int, bus_size_t, int)); 113 void sbus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 114 bus_size_t, int)); 115 int sbus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size, 116 bus_size_t alignment, bus_size_t boundary, 117 bus_dma_segment_t *segs, int nsegs, int *rsegs, 118 int flags)); 119 void sbus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 120 int nsegs)); 121 int sbus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 122 int nsegs, size_t size, caddr_t *kvap, int flags)); 123 void sbus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva, 124 size_t size)); 125 126 /* 127 * Child devices receive the Sbus interrupt level in their attach 128 * arguments. We translate these to CPU IPLs using the following 129 * tables. Note: obio bus interrupt levels are identical to the 130 * processor IPL. 131 * 132 * The second set of tables is used when the Sbus interrupt level 133 * cannot be had from the PROM as an `interrupt' property. We then 134 * fall back on the `intr' property which contains the CPU IPL. 135 */ 136 137 /* 138 * This value is or'ed into the attach args' interrupt level cookie 139 * if the interrupt level comes from an `intr' property, i.e. it is 140 * not an Sbus interrupt level. 141 */ 142 #define SBUS_INTR_COMPAT 0x80000000 143 144 145 /* 146 * Print the location of some sbus-attached device (called just 147 * before attaching that device). If `sbus' is not NULL, the 148 * device was found but not configured; print the sbus as well. 149 * Return UNCONF (config_find ignores this if the device was configured). 150 */ 151 int 152 sbus_print(args, busname) 153 void *args; 154 const char *busname; 155 { 156 struct sbus_attach_args *sa = args; 157 int i; 158 159 if (busname) 160 aprint_normal("%s at %s", sa->sa_name, busname); 161 aprint_normal(" slot %ld offset 0x%lx", (long)sa->sa_slot, 162 (u_long)sa->sa_offset); 163 for (i = 0; i < sa->sa_nintr; i++) { 164 struct openprom_intr *sbi = &sa->sa_intr[i]; 165 166 aprint_normal(" vector %lx ipl %ld", 167 (u_long)sbi->oi_vec, 168 (long)INTLEV(sbi->oi_pri)); 169 } 170 return (UNCONF); 171 } 172 173 int 174 sbus_match(parent, cf, aux) 175 struct device *parent; 176 struct cfdata *cf; 177 void *aux; 178 { 179 struct mainbus_attach_args *ma = aux; 180 181 return (strcmp(cf->cf_name, ma->ma_name) == 0); 182 } 183 184 /* 185 * Attach an Sbus. 186 */ 187 void 188 sbus_attach(parent, self, aux) 189 struct device *parent; 190 struct device *self; 191 void *aux; 192 { 193 struct sbus_softc *sc = (struct sbus_softc *)self; 194 struct mainbus_attach_args *ma = aux; 195 struct intrhand *ih; 196 int ipl; 197 char *name; 198 int node = ma->ma_node; 199 int node0, error; 200 bus_space_tag_t sbt; 201 struct sbus_attach_args sa; 202 203 sc->sc_bustag = ma->ma_bustag; 204 sc->sc_dmatag = ma->ma_dmatag; 205 sc->sc_ign = ma->ma_interrupts[0] & INTMAP_IGN; 206 207 /* XXXX Use sysio PROM mappings for interrupt vector regs. */ 208 sparc_promaddr_to_handle(sc->sc_bustag, ma->ma_address[0], &sc->sc_bh); 209 sc->sc_sysio = (struct sysioreg *)bus_space_vaddr(sc->sc_bustag, 210 sc->sc_bh); 211 212 #ifdef _LP64 213 /* 214 * 32-bit kernels use virtual addresses for bus space operations 215 * so we may as well use the prom VA. 216 * 217 * 64-bit kernels use physical addresses for bus space operations 218 * so mapping this in again will reduce TLB thrashing. 219 */ 220 if (bus_space_map(sc->sc_bustag, ma->ma_reg[0].ur_paddr, 221 ma->ma_reg[0].ur_len, 0, &sc->sc_bh) != 0) { 222 printf("%s: cannot map registers\n", self->dv_xname); 223 return; 224 } 225 #endif 226 227 /* 228 * Record clock frequency for synchronous SCSI. 229 * IS THIS THE CORRECT DEFAULT?? 230 */ 231 sc->sc_clockfreq = prom_getpropint(node, "clock-frequency", 232 25*1000*1000); 233 printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq)); 234 235 sbt = sbus_alloc_bustag(sc); 236 sc->sc_dmatag = sbus_alloc_dmatag(sc); 237 238 /* 239 * Get the SBus burst transfer size if burst transfers are supported 240 */ 241 sc->sc_burst = prom_getpropint(node, "burst-sizes", 0); 242 243 /* 244 * Collect address translations from the OBP. 245 */ 246 error = prom_getprop(node, "ranges", sizeof(struct openprom_range), 247 &sc->sc_nrange, &sc->sc_range); 248 if (error) 249 panic("%s: error getting ranges property", sc->sc_dev.dv_xname); 250 251 /* initialize the IOMMU */ 252 253 /* punch in our copies */ 254 sc->sc_is.is_bustag = sc->sc_bustag; 255 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 256 (vaddr_t)&((struct sysioreg *)NULL)->sys_iommu, 257 sizeof (struct iommureg), &sc->sc_is.is_iommu); 258 259 /* initialize our strbuf_ctl */ 260 sc->sc_is.is_sb[0] = &sc->sc_sb; 261 sc->sc_sb.sb_is = &sc->sc_is; 262 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 263 (vaddr_t)&((struct sysioreg *)NULL)->sys_strbuf, 264 sizeof (struct iommu_strbuf), &sc->sc_sb.sb_sb); 265 /* Point sb_flush to our flush buffer. */ 266 sc->sc_sb.sb_flush = &sc->sc_flush; 267 268 /* give us a nice name.. */ 269 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 270 if (name == 0) 271 panic("couldn't malloc iommu name"); 272 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 273 274 iommu_init(name, &sc->sc_is, 0, -1); 275 276 /* Enable the over temp intr */ 277 ih = (struct intrhand *) 278 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 279 ih->ih_map = &sc->sc_sysio->therm_int_map; 280 ih->ih_clr = NULL; /* &sc->sc_sysio->therm_clr_int; */ 281 ih->ih_fun = sbus_overtemp; 282 ipl = 1; 283 ih->ih_pil = (1<<ipl); 284 ih->ih_number = INTVEC(*(ih->ih_map)); 285 intr_establish(ipl, ih); 286 *(ih->ih_map) |= INTMAP_V; 287 288 /* 289 * Note: the stupid SBUS IOMMU ignores the high bits of an address, so a 290 * NULL DMA pointer will be translated by the first page of the IOTSB. 291 * To avoid bugs we'll alloc and ignore the first entry in the IOTSB. 292 */ 293 { 294 u_long dummy; 295 296 if (extent_alloc_subregion(sc->sc_is.is_dvmamap, 297 sc->sc_is.is_dvmabase, sc->sc_is.is_dvmabase + PAGE_SIZE, 298 PAGE_SIZE, PAGE_SIZE, 0, EX_NOWAIT|EX_BOUNDZERO, 299 (u_long *)&dummy) != 0) 300 panic("sbus iommu: can't toss first dvma page"); 301 } 302 303 /* 304 * Loop through ROM children, fixing any relative addresses 305 * and then configuring each device. 306 * `specials' is an array of device names that are treated 307 * specially: 308 */ 309 node0 = OF_child(node); 310 for (node = node0; node; node = OF_peer(node)) { 311 char *name = prom_getpropstring(node, "name"); 312 313 if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag, 314 node, &sa) != 0) { 315 printf("sbus_attach: %s: incomplete\n", name); 316 continue; 317 } 318 (void) config_found(&sc->sc_dev, (void *)&sa, sbus_print); 319 sbus_destroy_attach_args(&sa); 320 } 321 } 322 323 int 324 sbus_setup_attach_args(sc, bustag, dmatag, node, sa) 325 struct sbus_softc *sc; 326 bus_space_tag_t bustag; 327 bus_dma_tag_t dmatag; 328 int node; 329 struct sbus_attach_args *sa; 330 { 331 /*struct openprom_addr sbusreg;*/ 332 /*int base;*/ 333 int error; 334 int n; 335 336 memset(sa, 0, sizeof(struct sbus_attach_args)); 337 n = 0; 338 error = prom_getprop(node, "name", 1, &n, &sa->sa_name); 339 if (error != 0) 340 return (error); 341 sa->sa_name[n] = '\0'; 342 343 sa->sa_bustag = bustag; 344 sa->sa_dmatag = dmatag; 345 sa->sa_node = node; 346 sa->sa_frequency = sc->sc_clockfreq; 347 348 error = prom_getprop(node, "reg", sizeof(struct openprom_addr), 349 &sa->sa_nreg, &sa->sa_reg); 350 if (error != 0) { 351 char buf[32]; 352 if (error != ENOENT || 353 !node_has_property(node, "device_type") || 354 strcmp(prom_getpropstringA(node, "device_type", buf, sizeof buf), 355 "hierarchical") != 0) 356 return (error); 357 } 358 for (n = 0; n < sa->sa_nreg; n++) { 359 /* Convert to relative addressing, if necessary */ 360 u_int32_t base = sa->sa_reg[n].oa_base; 361 if (SBUS_ABS(base)) { 362 sa->sa_reg[n].oa_space = SBUS_ABS_TO_SLOT(base); 363 sa->sa_reg[n].oa_base = SBUS_ABS_TO_OFFSET(base); 364 } 365 } 366 367 if ((error = sbus_get_intr(sc, node, &sa->sa_intr, &sa->sa_nintr, 368 sa->sa_slot)) != 0) 369 return (error); 370 371 error = prom_getprop(node, "address", sizeof(u_int32_t), 372 &sa->sa_npromvaddrs, &sa->sa_promvaddrs); 373 if (error != 0 && error != ENOENT) 374 return (error); 375 376 return (0); 377 } 378 379 void 380 sbus_destroy_attach_args(sa) 381 struct sbus_attach_args *sa; 382 { 383 if (sa->sa_name != NULL) 384 free(sa->sa_name, M_DEVBUF); 385 386 if (sa->sa_nreg != 0) 387 free(sa->sa_reg, M_DEVBUF); 388 389 if (sa->sa_intr) 390 free(sa->sa_intr, M_DEVBUF); 391 392 if (sa->sa_promvaddrs) 393 free((void *)sa->sa_promvaddrs, M_DEVBUF); 394 395 memset(sa, 0, sizeof(struct sbus_attach_args)); /*DEBUG*/ 396 } 397 398 399 int 400 _sbus_bus_map(t, addr, size, flags, v, hp) 401 bus_space_tag_t t; 402 bus_addr_t addr; 403 bus_size_t size; 404 int flags; 405 vaddr_t v; 406 bus_space_handle_t *hp; 407 { 408 struct sbus_softc *sc = t->cookie; 409 int64_t slot = BUS_ADDR_IOSPACE(addr); 410 int64_t offset = BUS_ADDR_PADDR(addr); 411 int i; 412 413 for (i = 0; i < sc->sc_nrange; i++) { 414 bus_addr_t paddr; 415 416 if (sc->sc_range[i].or_child_space != slot) 417 continue; 418 419 /* We've found the connection to the parent bus */ 420 paddr = sc->sc_range[i].or_parent_base + offset; 421 paddr |= ((bus_addr_t)sc->sc_range[i].or_parent_space<<32); 422 DPRINTF(SDB_DVMA, 423 ("\n_sbus_bus_map: mapping paddr slot %lx offset %lx poffset %lx paddr %lx\n", 424 (long)slot, (long)offset, 425 (long)sc->sc_range[i].or_parent_base, 426 (long)paddr)); 427 return (bus_space_map(sc->sc_bustag, paddr, size, flags, hp)); 428 } 429 430 return (EINVAL); 431 } 432 433 434 bus_addr_t 435 sbus_bus_addr(t, btype, offset) 436 bus_space_tag_t t; 437 u_int btype; 438 u_int offset; 439 { 440 bus_addr_t baddr = 0; 441 int slot = btype; 442 struct sbus_softc *sc = t->cookie; 443 int i; 444 445 for (i = 0; i < sc->sc_nrange; i++) { 446 if (sc->sc_range[i].or_child_space != slot) 447 continue; 448 449 baddr = sc->sc_range[i].or_parent_base + offset; 450 baddr |= ((bus_addr_t)sc->sc_range[i].or_parent_space<<32); 451 } 452 453 return (baddr); 454 } 455 456 457 /* 458 * Each attached device calls sbus_establish after it initializes 459 * its sbusdev portion. 460 */ 461 void 462 sbus_establish(sd, dev) 463 register struct sbusdev *sd; 464 register struct device *dev; 465 { 466 register struct sbus_softc *sc; 467 register struct device *curdev; 468 469 /* 470 * We have to look for the sbus by name, since it is not necessarily 471 * our immediate parent (i.e. sun4m /iommu/sbus/espdma/esp) 472 * We don't just use the device structure of the above-attached 473 * sbus, since we might (in the future) support multiple sbus's. 474 */ 475 for (curdev = dev->dv_parent; ; curdev = curdev->dv_parent) { 476 if (!curdev || !curdev->dv_xname) 477 panic("sbus_establish: can't find sbus parent for %s", 478 sd->sd_dev->dv_xname 479 ? sd->sd_dev->dv_xname 480 : "<unknown>" ); 481 482 if (strncmp(curdev->dv_xname, "sbus", 4) == 0) 483 break; 484 } 485 sc = (struct sbus_softc *) curdev; 486 487 sd->sd_dev = dev; 488 sd->sd_bchain = sc->sc_sbdev; 489 sc->sc_sbdev = sd; 490 } 491 492 /* 493 * Reset the given sbus. 494 */ 495 void 496 sbusreset(sbus) 497 int sbus; 498 { 499 register struct sbusdev *sd; 500 struct sbus_softc *sc = sbus_cd.cd_devs[sbus]; 501 struct device *dev; 502 503 printf("reset %s:", sc->sc_dev.dv_xname); 504 for (sd = sc->sc_sbdev; sd != NULL; sd = sd->sd_bchain) { 505 if (sd->sd_reset) { 506 dev = sd->sd_dev; 507 (*sd->sd_reset)(dev); 508 printf(" %s", dev->dv_xname); 509 } 510 } 511 /* Reload iommu regs */ 512 iommu_reset(&sc->sc_is); 513 } 514 515 /* 516 * Handle an overtemp situation. 517 * 518 * SPARCs have temperature sensors which generate interrupts 519 * if the machine's temperature exceeds a certain threshold. 520 * This handles the interrupt and powers off the machine. 521 * The same needs to be done to PCI controller drivers. 522 */ 523 int 524 sbus_overtemp(arg) 525 void *arg; 526 { 527 /* Should try a clean shutdown first */ 528 printf("DANGER: OVER TEMPERATURE detected\nShutting down...\n"); 529 delay(20); 530 cpu_reboot(RB_POWERDOWN|RB_HALT, NULL); 531 } 532 533 /* 534 * Get interrupt attributes for an Sbus device. 535 */ 536 int 537 sbus_get_intr(sc, node, ipp, np, slot) 538 struct sbus_softc *sc; 539 int node; 540 struct openprom_intr **ipp; 541 int *np; 542 int slot; 543 { 544 int *ipl; 545 int n, i; 546 char buf[32]; 547 548 /* 549 * The `interrupts' property contains the Sbus interrupt level. 550 */ 551 ipl = NULL; 552 if (prom_getprop(node, "interrupts", sizeof(int), np, &ipl) == 0) { 553 struct openprom_intr *ip; 554 int pri; 555 556 /* Default to interrupt level 2 -- otherwise unused */ 557 pri = INTLEVENCODE(2); 558 559 /* Change format to an `struct sbus_intr' array */ 560 ip = malloc(*np * sizeof(struct openprom_intr), M_DEVBUF, 561 M_NOWAIT); 562 if (ip == NULL) 563 return (ENOMEM); 564 565 /* 566 * Now things get ugly. We need to take this value which is 567 * the interrupt vector number and encode the IPL into it 568 * somehow. Luckily, the interrupt vector has lots of free 569 * space and we can easily stuff the IPL in there for a while. 570 */ 571 prom_getpropstringA(node, "device_type", buf, sizeof buf); 572 if (buf[0] == '\0') 573 prom_getpropstringA(node, "name", buf, sizeof buf); 574 575 for (i = 0; intrmap[i].in_class; i++) 576 if (strcmp(intrmap[i].in_class, buf) == 0) { 577 pri = INTLEVENCODE(intrmap[i].in_lev); 578 break; 579 } 580 581 /* 582 * Sbus card devices need the slot number encoded into 583 * the vector as this is generally not done. 584 */ 585 if ((ipl[0] & INTMAP_OBIO) == 0) 586 pri |= slot << 3; 587 588 for (n = 0; n < *np; n++) { 589 /* 590 * We encode vector and priority into sbi_pri so we 591 * can pass them as a unit. This will go away if 592 * sbus_establish ever takes an sbus_intr instead 593 * of an integer level. 594 * Stuff the real vector in sbi_vec. 595 */ 596 597 ip[n].oi_pri = pri|ipl[n]; 598 ip[n].oi_vec = ipl[n]; 599 } 600 free(ipl, M_DEVBUF); 601 *ipp = ip; 602 } 603 604 return (0); 605 } 606 607 608 /* 609 * Install an interrupt handler for an Sbus device. 610 */ 611 void * 612 sbus_intr_establish(t, pri, level, handler, arg, fastvec) 613 bus_space_tag_t t; 614 int pri; 615 int level; 616 int (*handler) __P((void *)); 617 void *arg; 618 void (*fastvec) __P((void)); /* ignored */ 619 { 620 struct sbus_softc *sc = t->cookie; 621 struct intrhand *ih; 622 int ipl; 623 long vec = pri; 624 625 ih = (struct intrhand *) 626 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 627 if (ih == NULL) 628 return (NULL); 629 630 if ((vec & SBUS_INTR_COMPAT) != 0) 631 ipl = vec & ~SBUS_INTR_COMPAT; 632 else { 633 /* Decode and remove IPL */ 634 ipl = INTLEV(vec); 635 vec = INTVEC(vec); 636 DPRINTF(SDB_INTR, 637 ("\nsbus: intr[%ld]%lx: %lx\nHunting for IRQ...\n", 638 (long)ipl, (long)vec, (u_long)intrlev[vec])); 639 if ((vec & INTMAP_OBIO) == 0) { 640 /* We're in an SBUS slot */ 641 /* Register the map and clear intr registers */ 642 643 int slot = INTSLOT(pri); 644 645 ih->ih_map = &(&sc->sc_sysio->sbus_slot0_int)[slot]; 646 ih->ih_clr = &sc->sc_sysio->sbus0_clr_int[vec]; 647 #ifdef DEBUG 648 if (sbus_debug & SDB_INTR) { 649 int64_t intrmap = *ih->ih_map; 650 651 printf("SBUS %lx IRQ as %llx in slot %d\n", 652 (long)vec, (long long)intrmap, slot); 653 printf("\tmap addr %p clr addr %p\n", 654 ih->ih_map, ih->ih_clr); 655 } 656 #endif 657 /* Enable the interrupt */ 658 vec |= INTMAP_V | sc->sc_ign | 659 (CPU_UPAID << INTMAP_TID_SHIFT); 660 *(ih->ih_map) = vec; 661 } else { 662 int64_t *intrptr = &sc->sc_sysio->scsi_int_map; 663 int64_t intrmap = 0; 664 int i; 665 666 /* Insert IGN */ 667 vec |= sc->sc_ign; 668 for (i = 0; &intrptr[i] <= 669 (int64_t *)&sc->sc_sysio->reserved_int_map && 670 INTVEC(intrmap = intrptr[i]) != INTVEC(vec); i++) 671 ; 672 if (INTVEC(intrmap) == INTVEC(vec)) { 673 DPRINTF(SDB_INTR, 674 ("OBIO %lx IRQ as %lx in slot %d\n", 675 vec, (long)intrmap, i)); 676 /* Register the map and clear intr registers */ 677 ih->ih_map = &intrptr[i]; 678 intrptr = (int64_t *)&sc->sc_sysio->scsi_clr_int; 679 ih->ih_clr = &intrptr[i]; 680 /* Enable the interrupt */ 681 intrmap |= INTMAP_V; 682 /* XXXX */ 683 *(ih->ih_map) = intrmap; 684 } else 685 panic("IRQ not found!"); 686 } 687 } 688 #ifdef DEBUG 689 if (sbus_debug & SDB_INTR) { long i; for (i = 0; i < 400000000; i++); } 690 #endif 691 692 ih->ih_fun = handler; 693 ih->ih_arg = arg; 694 ih->ih_number = vec; 695 ih->ih_pil = (1<<ipl); 696 intr_establish(ipl, ih); 697 return (ih); 698 } 699 700 static bus_space_tag_t 701 sbus_alloc_bustag(sc) 702 struct sbus_softc *sc; 703 { 704 bus_space_tag_t sbt; 705 706 sbt = (bus_space_tag_t) 707 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 708 if (sbt == NULL) 709 return (NULL); 710 711 memset(sbt, 0, sizeof *sbt); 712 sbt->cookie = sc; 713 sbt->parent = sc->sc_bustag; 714 sbt->type = SBUS_BUS_SPACE; 715 sbt->sparc_bus_map = _sbus_bus_map; 716 sbt->sparc_bus_mmap = sc->sc_bustag->sparc_bus_mmap; 717 sbt->sparc_intr_establish = sbus_intr_establish; 718 return (sbt); 719 } 720 721 722 static bus_dma_tag_t 723 sbus_alloc_dmatag(sc) 724 struct sbus_softc *sc; 725 { 726 bus_dma_tag_t sdt, psdt = sc->sc_dmatag; 727 728 sdt = (bus_dma_tag_t) 729 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 730 if (sdt == NULL) 731 /* Panic? */ 732 return (psdt); 733 734 sdt->_cookie = sc; 735 sdt->_parent = psdt; 736 #define PCOPY(x) sdt->x = psdt->x 737 PCOPY(_dmamap_create); 738 PCOPY(_dmamap_destroy); 739 sdt->_dmamap_load = sbus_dmamap_load; 740 PCOPY(_dmamap_load_mbuf); 741 PCOPY(_dmamap_load_uio); 742 sdt->_dmamap_load_raw = sbus_dmamap_load_raw; 743 sdt->_dmamap_unload = sbus_dmamap_unload; 744 sdt->_dmamap_sync = sbus_dmamap_sync; 745 sdt->_dmamem_alloc = sbus_dmamem_alloc; 746 sdt->_dmamem_free = sbus_dmamem_free; 747 sdt->_dmamem_map = sbus_dmamem_map; 748 sdt->_dmamem_unmap = sbus_dmamem_unmap; 749 PCOPY(_dmamem_mmap); 750 #undef PCOPY 751 sc->sc_dmatag = sdt; 752 return (sdt); 753 } 754 755 int 756 sbus_dmamap_load(tag, map, buf, buflen, p, flags) 757 bus_dma_tag_t tag; 758 bus_dmamap_t map; 759 void *buf; 760 bus_size_t buflen; 761 struct proc *p; 762 int flags; 763 { 764 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 765 766 return (iommu_dvmamap_load(tag, &sc->sc_sb, map, buf, buflen, p, flags)); 767 } 768 769 int 770 sbus_dmamap_load_raw(tag, map, segs, nsegs, size, flags) 771 bus_dma_tag_t tag; 772 bus_dmamap_t map; 773 bus_dma_segment_t *segs; 774 int nsegs; 775 bus_size_t size; 776 int flags; 777 { 778 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 779 780 return (iommu_dvmamap_load_raw(tag, &sc->sc_sb, map, segs, nsegs, flags, size)); 781 } 782 783 void 784 sbus_dmamap_unload(tag, map) 785 bus_dma_tag_t tag; 786 bus_dmamap_t map; 787 { 788 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 789 790 iommu_dvmamap_unload(tag, &sc->sc_sb, map); 791 } 792 793 void 794 sbus_dmamap_sync(tag, map, offset, len, ops) 795 bus_dma_tag_t tag; 796 bus_dmamap_t map; 797 bus_addr_t offset; 798 bus_size_t len; 799 int ops; 800 { 801 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 802 803 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 804 /* Flush the CPU then the IOMMU */ 805 bus_dmamap_sync(tag->_parent, map, offset, len, ops); 806 iommu_dvmamap_sync(tag, &sc->sc_sb, map, offset, len, ops); 807 } 808 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 809 /* Flush the IOMMU then the CPU */ 810 iommu_dvmamap_sync(tag, &sc->sc_sb, map, offset, len, ops); 811 bus_dmamap_sync(tag->_parent, map, offset, len, ops); 812 } 813 } 814 815 int 816 sbus_dmamem_alloc(tag, size, alignment, boundary, segs, nsegs, rsegs, flags) 817 bus_dma_tag_t tag; 818 bus_size_t size; 819 bus_size_t alignment; 820 bus_size_t boundary; 821 bus_dma_segment_t *segs; 822 int nsegs; 823 int *rsegs; 824 int flags; 825 { 826 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 827 828 return (iommu_dvmamem_alloc(tag, &sc->sc_sb, size, alignment, boundary, 829 segs, nsegs, rsegs, flags)); 830 } 831 832 void 833 sbus_dmamem_free(tag, segs, nsegs) 834 bus_dma_tag_t tag; 835 bus_dma_segment_t *segs; 836 int nsegs; 837 { 838 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 839 840 iommu_dvmamem_free(tag, &sc->sc_sb, segs, nsegs); 841 } 842 843 int 844 sbus_dmamem_map(tag, segs, nsegs, size, kvap, flags) 845 bus_dma_tag_t tag; 846 bus_dma_segment_t *segs; 847 int nsegs; 848 size_t size; 849 caddr_t *kvap; 850 int flags; 851 { 852 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 853 854 return (iommu_dvmamem_map(tag, &sc->sc_sb, segs, nsegs, size, kvap, flags)); 855 } 856 857 void 858 sbus_dmamem_unmap(tag, kva, size) 859 bus_dma_tag_t tag; 860 caddr_t kva; 861 size_t size; 862 { 863 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 864 865 iommu_dvmamem_unmap(tag, &sc->sc_sb, kva, size); 866 } 867
Indexes created Thu Oct 02 14:10:14 GMT 2025