Home | History | Annotate | Line # | Download | only in dev
vbus.c revision 1.1
      1  1.1  palle /*	$NetBSD: vbus.c,v 1.1 2016/06/17 21:59:06 palle Exp $	*/
      2  1.1  palle /*	$OpenBSD: vbus.c,v 1.8 2015/09/27 11:29:20 kettenis Exp $	*/
      3  1.1  palle /*
      4  1.1  palle  * Copyright (c) 2008 Mark Kettenis
      5  1.1  palle  *
      6  1.1  palle  * Permission to use, copy, modify, and distribute this software for any
      7  1.1  palle  * purpose with or without fee is hereby granted, provided that the above
      8  1.1  palle  * copyright notice and this permission notice appear in all copies.
      9  1.1  palle  *
     10  1.1  palle  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     11  1.1  palle  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     12  1.1  palle  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     13  1.1  palle  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     14  1.1  palle  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     15  1.1  palle  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     16  1.1  palle  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     17  1.1  palle  */
     18  1.1  palle 
     19  1.1  palle #include <sys/param.h>
     20  1.1  palle #include <sys/device.h>
     21  1.1  palle #include <sys/malloc.h>
     22  1.1  palle #include <sys/systm.h>
     23  1.1  palle 
     24  1.1  palle #include <machine/autoconf.h>
     25  1.1  palle #include <machine/hypervisor.h>
     26  1.1  palle #include <machine/openfirm.h>
     27  1.1  palle 
     28  1.1  palle #include <sparc64/dev/vbusvar.h>
     29  1.1  palle 
     30  1.1  palle #include <sparc64/dev/iommureg.h>
     31  1.1  palle 
     32  1.1  palle #include <dev/clock_subr.h>
     33  1.1  palle extern todr_chip_handle_t todr_handle;
     34  1.1  palle 
     35  1.1  palle #ifdef DEBUG
     36  1.1  palle #define VBUS_INTR             0x01
     37  1.1  palle int vbus_debug = 0x00|VBUS_INTR;
     38  1.1  palle #define DPRINTF(l, s)   do { if (vbus_debug & l) printf s; } while (0)
     39  1.1  palle #else
     40  1.1  palle #define DPRINTF(l, s)
     41  1.1  palle #endif
     42  1.1  palle 
     43  1.1  palle struct vbus_softc {
     44  1.1  palle 	device_t		sc_dv;
     45  1.1  palle 	bus_space_tag_t		sc_bustag;
     46  1.1  palle 	bus_dma_tag_t		sc_dmatag;
     47  1.1  palle };
     48  1.1  palle int	vbus_cmp_cells(int *, int *, int *, int);
     49  1.1  palle int	vbus_match(device_t, cfdata_t, void *);
     50  1.1  palle void	vbus_attach(device_t, device_t, void *);
     51  1.1  palle int	vbus_print(void *, const char *);
     52  1.1  palle 
     53  1.1  palle CFATTACH_DECL_NEW(vbus, sizeof(struct vbus_softc),
     54  1.1  palle     vbus_match, vbus_attach, NULL, NULL);
     55  1.1  palle 
     56  1.1  palle void *vbus_intr_establish(bus_space_tag_t, int, int,
     57  1.1  palle     int (*)(void *), void *, void (*)(void));
     58  1.1  palle void	vbus_intr_ack(struct intrhand *);
     59  1.1  palle bus_space_tag_t vbus_alloc_bus_tag(struct vbus_softc *, bus_space_tag_t);
     60  1.1  palle 
     61  1.1  palle int
     62  1.1  palle vbus_match(device_t parent, cfdata_t match, void *aux)
     63  1.1  palle {
     64  1.1  palle 	struct mainbus_attach_args *ma = aux;
     65  1.1  palle 
     66  1.1  palle 	if (strcmp(ma->ma_name, "virtual-devices") == 0)
     67  1.1  palle 		return (1);
     68  1.1  palle 
     69  1.1  palle 	return (0);
     70  1.1  palle }
     71  1.1  palle 
     72  1.1  palle void
     73  1.1  palle vbus_attach(device_t parent, device_t self, void *aux)
     74  1.1  palle {
     75  1.1  palle 	struct vbus_softc *sc = (struct vbus_softc *)self;
     76  1.1  palle 	struct mainbus_attach_args *ma = aux;
     77  1.1  palle 	int node;
     78  1.1  palle 
     79  1.1  palle 	sc->sc_bustag = vbus_alloc_bus_tag(sc, ma->ma_bustag);
     80  1.1  palle 	sc->sc_dmatag = ma->ma_dmatag;
     81  1.1  palle 	printf("\n");
     82  1.1  palle 
     83  1.1  palle 	for (node = OF_child(ma->ma_node); node; node = OF_peer(node)) {
     84  1.1  palle 		struct vbus_attach_args va;
     85  1.1  palle 		char buf[32];
     86  1.1  palle 
     87  1.1  palle 		bzero(&va, sizeof(va));
     88  1.1  palle 		va.va_node = node;
     89  1.1  palle 		if (OF_getprop(node, "name", buf, sizeof(buf)) <= 0)
     90  1.1  palle 			continue;
     91  1.1  palle 		va.va_name = buf;
     92  1.1  palle 		va.va_bustag = sc->sc_bustag;
     93  1.1  palle 		va.va_dmatag = sc->sc_dmatag;
     94  1.1  palle 		prom_getprop(node, "reg", sizeof(*va.va_reg),
     95  1.1  palle 			     &va.va_nreg, (void **)&va.va_reg);
     96  1.1  palle 		prom_getprop(node, "interrupts", sizeof(*va.va_intr),
     97  1.1  palle 			     &va.va_nintr, (void **)&va.va_intr);
     98  1.1  palle 		config_found(self, &va, vbus_print);
     99  1.1  palle 	}
    100  1.1  palle 
    101  1.1  palle 	struct vbus_attach_args va;
    102  1.1  palle 	bzero(&va, sizeof(va));
    103  1.1  palle 	va.va_name = "rtc";
    104  1.1  palle 	config_found(self, &va, vbus_print);
    105  1.1  palle 
    106  1.1  palle }
    107  1.1  palle 
    108  1.1  palle int
    109  1.1  palle vbus_print(void *aux, const char *name)
    110  1.1  palle {
    111  1.1  palle 	struct vbus_attach_args *va = aux;
    112  1.1  palle 
    113  1.1  palle 	if (name)
    114  1.1  palle 		printf("\"%s\" at %s", va->va_name, name);
    115  1.1  palle 	return (UNCONF);
    116  1.1  palle }
    117  1.1  palle 
    118  1.1  palle /*
    119  1.1  palle  * Compare a sequence of cells with a mask, return 1 if they match and
    120  1.1  palle  * 0 if they don't.
    121  1.1  palle  */
    122  1.1  palle int
    123  1.1  palle vbus_cmp_cells(int *cell1, int *cell2, int *mask, int ncells)
    124  1.1  palle {
    125  1.1  palle 	int i;
    126  1.1  palle 
    127  1.1  palle 	for (i = 0; i < ncells; i++) {
    128  1.1  palle 		if (((cell1[i] ^ cell2[i]) & mask[i]) != 0)
    129  1.1  palle 			return (0);
    130  1.1  palle 	}
    131  1.1  palle 	return (1);
    132  1.1  palle }
    133  1.1  palle 
    134  1.1  palle int
    135  1.1  palle vbus_intr_map(int node, int ino, uint64_t *sysino)
    136  1.1  palle {
    137  1.1  palle 	int *imap = NULL, nimap;
    138  1.1  palle 	int *reg = NULL, nreg;
    139  1.1  palle 	int *imap_mask;
    140  1.1  palle 	int parent;
    141  1.1  palle 	int address_cells, interrupt_cells;
    142  1.1  palle 	uint64_t devhandle;
    143  1.1  palle 	uint64_t devino;
    144  1.1  palle 	int len;
    145  1.1  palle 	int err;
    146  1.1  palle 
    147  1.1  palle 	DPRINTF(VBUS_INTR, ("vbus_intr_map(): ino 0x%x\n", ino));
    148  1.1  palle 
    149  1.1  palle 	parent = OF_parent(node);
    150  1.1  palle 
    151  1.1  palle 	address_cells = prom_getpropint(parent, "#address-cells", 2);
    152  1.1  palle 	interrupt_cells = prom_getpropint(parent, "#interrupt-cells", 1);
    153  1.1  palle 	KASSERT(interrupt_cells == 1);
    154  1.1  palle 
    155  1.1  palle 	len = OF_getproplen(parent, "interrupt-map-mask");
    156  1.1  palle 	if (len < (address_cells + interrupt_cells) * sizeof(int))
    157  1.1  palle 		return (-1);
    158  1.1  palle 	imap_mask = malloc(len, M_DEVBUF, M_NOWAIT);
    159  1.1  palle 	if (imap_mask == NULL)
    160  1.1  palle 		return (-1);
    161  1.1  palle 	if (OF_getprop(parent, "interrupt-map-mask", imap_mask, len) != len)
    162  1.1  palle 		return (-1);
    163  1.1  palle 
    164  1.1  palle 	if (prom_getprop(parent, "interrupt-map", sizeof(int), &nimap, (void **)&imap))
    165  1.1  palle 	  panic("vbus: can't get interrupt-map");
    166  1.1  palle 
    167  1.1  palle 	if (prom_getprop(node, "reg", sizeof(*reg), &nreg, (void **)&reg))
    168  1.1  palle 		  panic("vbus: can't get reg");
    169  1.1  palle 	if (nreg < address_cells)
    170  1.1  palle 		return (-1);
    171  1.1  palle 
    172  1.1  palle 	while (nimap >= address_cells + interrupt_cells + 2) {
    173  1.1  palle 		if (vbus_cmp_cells(imap, reg, imap_mask, address_cells) &&
    174  1.1  palle 		    vbus_cmp_cells(&imap[address_cells], &ino,
    175  1.1  palle 		    &imap_mask[address_cells], interrupt_cells)) {
    176  1.1  palle 			node = imap[address_cells + interrupt_cells];
    177  1.1  palle 			devino = imap[address_cells + interrupt_cells + 1];
    178  1.1  palle 
    179  1.1  palle 			free(reg, M_DEVBUF);
    180  1.1  palle 			reg = NULL;
    181  1.1  palle 
    182  1.1  palle 			if (prom_getprop(node, "reg", sizeof(*reg), &nreg, (void **)&reg))
    183  1.1  palle 			  panic("vbus: can't get reg");
    184  1.1  palle 
    185  1.1  palle 			devhandle = reg[0] & 0x0fffffff;
    186  1.1  palle 
    187  1.1  palle 			err = hv_intr_devino_to_sysino(devhandle, devino, sysino);
    188  1.1  palle 			if (err != H_EOK)
    189  1.1  palle 			  return (-1);
    190  1.1  palle 
    191  1.1  palle 			KASSERT(*sysino == INTVEC(*sysino));
    192  1.1  palle 			return (0);
    193  1.1  palle 		}
    194  1.1  palle 		imap += address_cells + interrupt_cells + 2;
    195  1.1  palle 		nimap -= address_cells + interrupt_cells + 2;
    196  1.1  palle 	}
    197  1.1  palle 
    198  1.1  palle 	return (-1);
    199  1.1  palle }
    200  1.1  palle 
    201  1.1  palle void *
    202  1.1  palle vbus_intr_establish(bus_space_tag_t t, int ihandle, int level,
    203  1.1  palle 	int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
    204  1.1  palle {
    205  1.1  palle 	uint64_t sysino = INTVEC(ihandle);
    206  1.1  palle 	struct intrhand *ih;
    207  1.1  palle 	int ino;
    208  1.1  palle 	int err;
    209  1.1  palle 
    210  1.1  palle 	DPRINTF(VBUS_INTR, ("vbus_intr_establish()\n"));
    211  1.1  palle 
    212  1.1  palle 	ino = INTINO(ihandle);
    213  1.1  palle 
    214  1.1  palle 	ih = intrhand_alloc();
    215  1.1  palle 
    216  1.1  palle 	ih->ih_ivec = ihandle;
    217  1.1  palle 	ih->ih_fun = handler;
    218  1.1  palle 	ih->ih_arg = arg;
    219  1.1  palle 	ih->ih_pil = level;
    220  1.1  palle 	ih->ih_number = ino;
    221  1.1  palle 	ih->ih_pending = 0;
    222  1.1  palle 
    223  1.1  palle 	intr_establish(ih->ih_pil, level != IPL_VM, ih);
    224  1.1  palle 	ih->ih_ack = vbus_intr_ack;
    225  1.1  palle 
    226  1.1  palle 	err = hv_intr_settarget(sysino, cpus->ci_cpuid);
    227  1.1  palle 	if (err != H_EOK) {
    228  1.1  palle 		printf("hv_intr_settarget(%lu, %u) failed - err = %d\n",
    229  1.1  palle 		       (long unsigned int)sysino, cpus->ci_cpuid, err);
    230  1.1  palle 		return (NULL);
    231  1.1  palle 	}
    232  1.1  palle 
    233  1.1  palle 	/* Clear pending interrupts. */
    234  1.1  palle 	err = hv_intr_setstate(sysino, INTR_IDLE);
    235  1.1  palle 	if (err != H_EOK) {
    236  1.1  palle 	  printf("hv_intr_setstate(%lu, INTR_IDLE) failed - err = %d\n",
    237  1.1  palle 		 (long unsigned int)sysino, err);
    238  1.1  palle 	  return (NULL);
    239  1.1  palle 	}
    240  1.1  palle 
    241  1.1  palle 	err = hv_intr_setenabled(sysino, INTR_ENABLED);
    242  1.1  palle 	if (err != H_EOK) {
    243  1.1  palle 	  printf("hv_intr_setenabled(%lu) failed - err = %d\n",
    244  1.1  palle 		 (long unsigned int)sysino, err);
    245  1.1  palle 	  return (NULL);
    246  1.1  palle 	}
    247  1.1  palle 
    248  1.1  palle 	return (ih);
    249  1.1  palle }
    250  1.1  palle 
    251  1.1  palle void
    252  1.1  palle vbus_intr_ack(struct intrhand *ih)
    253  1.1  palle {
    254  1.1  palle 	DPRINTF(VBUS_INTR, ("vbus_intr_ack()\n"));
    255  1.1  palle 	hv_intr_setstate(ih->ih_number, INTR_IDLE);
    256  1.1  palle }
    257  1.1  palle 
    258  1.1  palle bus_space_tag_t
    259  1.1  palle vbus_alloc_bus_tag(struct vbus_softc *sc, bus_space_tag_t parent)
    260  1.1  palle {
    261  1.1  palle 	struct sparc_bus_space_tag *bt;
    262  1.1  palle 
    263  1.1  palle 	bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO);
    264  1.1  palle 	if (bt == NULL)
    265  1.1  palle 		panic("could not allocate vbus bus tag");
    266  1.1  palle 
    267  1.1  palle 	bt->cookie = sc;
    268  1.1  palle 	bt->parent = parent;
    269  1.1  palle 	bt->sparc_bus_map = parent->sparc_bus_map;
    270  1.1  palle 	bt->sparc_intr_establish = vbus_intr_establish;
    271  1.1  palle 
    272  1.1  palle 	return (bt);
    273  1.1  palle }
    274