vbus.c revision 1.7 1 1.7 thorpej /* $NetBSD: vbus.c,v 1.7 2021/05/10 23:53:44 thorpej Exp $ */
2 1.1 palle /* $OpenBSD: vbus.c,v 1.8 2015/09/27 11:29:20 kettenis Exp $ */
3 1.1 palle /*
4 1.1 palle * Copyright (c) 2008 Mark Kettenis
5 1.1 palle *
6 1.1 palle * Permission to use, copy, modify, and distribute this software for any
7 1.1 palle * purpose with or without fee is hereby granted, provided that the above
8 1.1 palle * copyright notice and this permission notice appear in all copies.
9 1.1 palle *
10 1.1 palle * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 1.1 palle * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 1.1 palle * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 1.1 palle * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 1.1 palle * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 1.1 palle * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 1.1 palle * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 1.1 palle */
18 1.1 palle
19 1.1 palle #include <sys/param.h>
20 1.1 palle #include <sys/device.h>
21 1.1 palle #include <sys/malloc.h>
22 1.5 thorpej #include <sys/kmem.h>
23 1.1 palle #include <sys/systm.h>
24 1.1 palle
25 1.1 palle #include <machine/autoconf.h>
26 1.1 palle #include <machine/hypervisor.h>
27 1.1 palle #include <machine/openfirm.h>
28 1.1 palle
29 1.1 palle #include <sparc64/dev/vbusvar.h>
30 1.1 palle
31 1.1 palle #include <sparc64/dev/iommureg.h>
32 1.1 palle
33 1.1 palle #include <dev/clock_subr.h>
34 1.1 palle extern todr_chip_handle_t todr_handle;
35 1.1 palle
36 1.1 palle #ifdef DEBUG
37 1.1 palle #define VBUS_INTR 0x01
38 1.1 palle int vbus_debug = 0x00|VBUS_INTR;
39 1.1 palle #define DPRINTF(l, s) do { if (vbus_debug & l) printf s; } while (0)
40 1.1 palle #else
41 1.1 palle #define DPRINTF(l, s)
42 1.1 palle #endif
43 1.1 palle
44 1.1 palle struct vbus_softc {
45 1.1 palle device_t sc_dv;
46 1.1 palle bus_space_tag_t sc_bustag;
47 1.1 palle bus_dma_tag_t sc_dmatag;
48 1.1 palle };
49 1.1 palle int vbus_cmp_cells(int *, int *, int *, int);
50 1.1 palle int vbus_match(device_t, cfdata_t, void *);
51 1.1 palle void vbus_attach(device_t, device_t, void *);
52 1.1 palle int vbus_print(void *, const char *);
53 1.1 palle
54 1.1 palle CFATTACH_DECL_NEW(vbus, sizeof(struct vbus_softc),
55 1.1 palle vbus_match, vbus_attach, NULL, NULL);
56 1.1 palle
57 1.1 palle void *vbus_intr_establish(bus_space_tag_t, int, int,
58 1.1 palle int (*)(void *), void *, void (*)(void));
59 1.1 palle void vbus_intr_ack(struct intrhand *);
60 1.1 palle bus_space_tag_t vbus_alloc_bus_tag(struct vbus_softc *, bus_space_tag_t);
61 1.1 palle
62 1.1 palle int
63 1.1 palle vbus_match(device_t parent, cfdata_t match, void *aux)
64 1.1 palle {
65 1.1 palle struct mainbus_attach_args *ma = aux;
66 1.1 palle
67 1.1 palle if (strcmp(ma->ma_name, "virtual-devices") == 0)
68 1.1 palle return (1);
69 1.1 palle
70 1.1 palle return (0);
71 1.1 palle }
72 1.1 palle
73 1.1 palle void
74 1.1 palle vbus_attach(device_t parent, device_t self, void *aux)
75 1.1 palle {
76 1.2 palle struct vbus_softc *sc = device_private(self);
77 1.1 palle struct mainbus_attach_args *ma = aux;
78 1.1 palle int node;
79 1.1 palle
80 1.1 palle sc->sc_bustag = vbus_alloc_bus_tag(sc, ma->ma_bustag);
81 1.1 palle sc->sc_dmatag = ma->ma_dmatag;
82 1.1 palle printf("\n");
83 1.1 palle
84 1.1 palle for (node = OF_child(ma->ma_node); node; node = OF_peer(node)) {
85 1.1 palle struct vbus_attach_args va;
86 1.1 palle char buf[32];
87 1.1 palle
88 1.1 palle bzero(&va, sizeof(va));
89 1.1 palle va.va_node = node;
90 1.1 palle if (OF_getprop(node, "name", buf, sizeof(buf)) <= 0)
91 1.1 palle continue;
92 1.1 palle va.va_name = buf;
93 1.1 palle va.va_bustag = sc->sc_bustag;
94 1.1 palle va.va_dmatag = sc->sc_dmatag;
95 1.1 palle prom_getprop(node, "reg", sizeof(*va.va_reg),
96 1.1 palle &va.va_nreg, (void **)&va.va_reg);
97 1.1 palle prom_getprop(node, "interrupts", sizeof(*va.va_intr),
98 1.1 palle &va.va_nintr, (void **)&va.va_intr);
99 1.7 thorpej config_found(self, &va, vbus_print,
100 1.7 thorpej CFARG_DEVHANDLE, prom_node_to_devhandle(va.va_node),
101 1.7 thorpej CFARG_EOL);
102 1.1 palle }
103 1.1 palle
104 1.1 palle struct vbus_attach_args va;
105 1.1 palle bzero(&va, sizeof(va));
106 1.1 palle va.va_name = "rtc";
107 1.6 thorpej config_found(self, &va, vbus_print, CFARG_EOL);
108 1.1 palle
109 1.1 palle }
110 1.1 palle
111 1.1 palle int
112 1.1 palle vbus_print(void *aux, const char *name)
113 1.1 palle {
114 1.1 palle struct vbus_attach_args *va = aux;
115 1.1 palle
116 1.1 palle if (name)
117 1.1 palle printf("\"%s\" at %s", va->va_name, name);
118 1.1 palle return (UNCONF);
119 1.1 palle }
120 1.1 palle
121 1.1 palle /*
122 1.1 palle * Compare a sequence of cells with a mask, return 1 if they match and
123 1.1 palle * 0 if they don't.
124 1.1 palle */
125 1.1 palle int
126 1.1 palle vbus_cmp_cells(int *cell1, int *cell2, int *mask, int ncells)
127 1.1 palle {
128 1.1 palle int i;
129 1.1 palle
130 1.1 palle for (i = 0; i < ncells; i++) {
131 1.1 palle if (((cell1[i] ^ cell2[i]) & mask[i]) != 0)
132 1.1 palle return (0);
133 1.1 palle }
134 1.1 palle return (1);
135 1.1 palle }
136 1.1 palle
137 1.1 palle int
138 1.1 palle vbus_intr_map(int node, int ino, uint64_t *sysino)
139 1.1 palle {
140 1.1 palle int *imap = NULL, nimap;
141 1.1 palle int *reg = NULL, nreg;
142 1.1 palle int *imap_mask;
143 1.1 palle int parent;
144 1.1 palle int address_cells, interrupt_cells;
145 1.1 palle uint64_t devhandle;
146 1.1 palle uint64_t devino;
147 1.1 palle int len;
148 1.1 palle int err;
149 1.1 palle
150 1.1 palle DPRINTF(VBUS_INTR, ("vbus_intr_map(): ino 0x%x\n", ino));
151 1.1 palle
152 1.1 palle parent = OF_parent(node);
153 1.1 palle
154 1.1 palle address_cells = prom_getpropint(parent, "#address-cells", 2);
155 1.1 palle interrupt_cells = prom_getpropint(parent, "#interrupt-cells", 1);
156 1.1 palle KASSERT(interrupt_cells == 1);
157 1.1 palle
158 1.1 palle len = OF_getproplen(parent, "interrupt-map-mask");
159 1.1 palle if (len < (address_cells + interrupt_cells) * sizeof(int))
160 1.1 palle return (-1);
161 1.4 chs imap_mask = malloc(len, M_DEVBUF, M_WAITOK);
162 1.1 palle if (OF_getprop(parent, "interrupt-map-mask", imap_mask, len) != len)
163 1.3 palle goto out;
164 1.1 palle
165 1.1 palle if (prom_getprop(parent, "interrupt-map", sizeof(int), &nimap, (void **)&imap))
166 1.3 palle panic("vbus: can't get interrupt-map");
167 1.1 palle
168 1.1 palle if (prom_getprop(node, "reg", sizeof(*reg), &nreg, (void **)®))
169 1.3 palle panic("vbus: can't get reg");
170 1.1 palle if (nreg < address_cells)
171 1.3 palle goto out;
172 1.1 palle
173 1.1 palle while (nimap >= address_cells + interrupt_cells + 2) {
174 1.1 palle if (vbus_cmp_cells(imap, reg, imap_mask, address_cells) &&
175 1.1 palle vbus_cmp_cells(&imap[address_cells], &ino,
176 1.1 palle &imap_mask[address_cells], interrupt_cells)) {
177 1.1 palle node = imap[address_cells + interrupt_cells];
178 1.1 palle devino = imap[address_cells + interrupt_cells + 1];
179 1.1 palle
180 1.1 palle free(reg, M_DEVBUF);
181 1.1 palle reg = NULL;
182 1.1 palle
183 1.1 palle if (prom_getprop(node, "reg", sizeof(*reg), &nreg, (void **)®))
184 1.3 palle panic("vbus: can't get reg");
185 1.1 palle
186 1.1 palle devhandle = reg[0] & 0x0fffffff;
187 1.1 palle
188 1.1 palle err = hv_intr_devino_to_sysino(devhandle, devino, sysino);
189 1.1 palle if (err != H_EOK)
190 1.3 palle goto out;
191 1.1 palle
192 1.1 palle KASSERT(*sysino == INTVEC(*sysino));
193 1.3 palle free(imap_mask, M_DEVBUF);
194 1.1 palle return (0);
195 1.1 palle }
196 1.1 palle imap += address_cells + interrupt_cells + 2;
197 1.1 palle nimap -= address_cells + interrupt_cells + 2;
198 1.1 palle }
199 1.1 palle
200 1.3 palle out:
201 1.3 palle free(imap_mask, M_DEVBUF);
202 1.1 palle return (-1);
203 1.1 palle }
204 1.1 palle
205 1.1 palle void *
206 1.1 palle vbus_intr_establish(bus_space_tag_t t, int ihandle, int level,
207 1.1 palle int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
208 1.1 palle {
209 1.1 palle uint64_t sysino = INTVEC(ihandle);
210 1.1 palle struct intrhand *ih;
211 1.1 palle int ino;
212 1.1 palle int err;
213 1.1 palle
214 1.1 palle DPRINTF(VBUS_INTR, ("vbus_intr_establish()\n"));
215 1.1 palle
216 1.1 palle ino = INTINO(ihandle);
217 1.1 palle
218 1.1 palle ih = intrhand_alloc();
219 1.1 palle
220 1.1 palle ih->ih_ivec = ihandle;
221 1.1 palle ih->ih_fun = handler;
222 1.1 palle ih->ih_arg = arg;
223 1.1 palle ih->ih_pil = level;
224 1.1 palle ih->ih_number = ino;
225 1.1 palle ih->ih_pending = 0;
226 1.1 palle
227 1.1 palle intr_establish(ih->ih_pil, level != IPL_VM, ih);
228 1.1 palle ih->ih_ack = vbus_intr_ack;
229 1.1 palle
230 1.1 palle err = hv_intr_settarget(sysino, cpus->ci_cpuid);
231 1.1 palle if (err != H_EOK) {
232 1.1 palle printf("hv_intr_settarget(%lu, %u) failed - err = %d\n",
233 1.1 palle (long unsigned int)sysino, cpus->ci_cpuid, err);
234 1.1 palle return (NULL);
235 1.1 palle }
236 1.1 palle
237 1.1 palle /* Clear pending interrupts. */
238 1.1 palle err = hv_intr_setstate(sysino, INTR_IDLE);
239 1.1 palle if (err != H_EOK) {
240 1.1 palle printf("hv_intr_setstate(%lu, INTR_IDLE) failed - err = %d\n",
241 1.1 palle (long unsigned int)sysino, err);
242 1.1 palle return (NULL);
243 1.1 palle }
244 1.1 palle
245 1.1 palle err = hv_intr_setenabled(sysino, INTR_ENABLED);
246 1.1 palle if (err != H_EOK) {
247 1.1 palle printf("hv_intr_setenabled(%lu) failed - err = %d\n",
248 1.1 palle (long unsigned int)sysino, err);
249 1.1 palle return (NULL);
250 1.1 palle }
251 1.1 palle
252 1.1 palle return (ih);
253 1.1 palle }
254 1.1 palle
255 1.1 palle void
256 1.1 palle vbus_intr_ack(struct intrhand *ih)
257 1.1 palle {
258 1.1 palle DPRINTF(VBUS_INTR, ("vbus_intr_ack()\n"));
259 1.1 palle hv_intr_setstate(ih->ih_number, INTR_IDLE);
260 1.1 palle }
261 1.1 palle
262 1.1 palle bus_space_tag_t
263 1.1 palle vbus_alloc_bus_tag(struct vbus_softc *sc, bus_space_tag_t parent)
264 1.1 palle {
265 1.1 palle struct sparc_bus_space_tag *bt;
266 1.1 palle
267 1.5 thorpej bt = kmem_zalloc(sizeof(*bt), KM_SLEEP);
268 1.1 palle bt->cookie = sc;
269 1.1 palle bt->parent = parent;
270 1.1 palle bt->sparc_bus_map = parent->sparc_bus_map;
271 1.1 palle bt->sparc_intr_establish = vbus_intr_establish;
272 1.1 palle
273 1.1 palle return (bt);
274 1.1 palle }
275