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      1  1.1  palle /*	$NetBSD: vpcivar.h,v 1.1 2015/02/12 04:48:37 palle Exp $	*/
      2  1.1  palle 
      3  1.1  palle /*
      4  1.1  palle  * Copyright (c) 2015 Palle Lyckegaard
      5  1.1  palle  * All rights reserved.
      6  1.1  palle  *
      7  1.1  palle  * Redistribution and use in source and binary forms, with or without
      8  1.1  palle  * modification, are permitted provided that the following conditions
      9  1.1  palle  * are met:
     10  1.1  palle  * 1. Redistributions of source code must retain the above copyright
     11  1.1  palle  *    notice, this list of conditions and the following disclaimer.
     12  1.1  palle  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  palle  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  palle  *    documentation and/or other materials provided with the distribution.
     15  1.1  palle  *
     16  1.1  palle  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  1.1  palle  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     18  1.1  palle  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     19  1.1  palle  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     20  1.1  palle  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     21  1.1  palle  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     22  1.1  palle  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  1.1  palle  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     24  1.1  palle  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     25  1.1  palle  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  1.1  palle  * POSSIBILITY OF SUCH DAMAGE.
     27  1.1  palle  */
     28  1.1  palle 
     29  1.1  palle struct vpci_range {
     30  1.1  palle 	u_int32_t	cspace;
     31  1.1  palle 	u_int32_t	child_hi;
     32  1.1  palle 	u_int32_t	child_lo;
     33  1.1  palle 	u_int32_t	phys_hi;
     34  1.1  palle 	u_int32_t	phys_lo;
     35  1.1  palle 	u_int32_t	size_hi;
     36  1.1  palle 	u_int32_t	size_lo;
     37  1.1  palle };
     38  1.1  palle 
     39  1.1  palle struct vpci_pbm {
     40  1.1  palle 	struct vpci_softc *vp_sc;
     41  1.1  palle 	uint64_t vp_devhandle;
     42  1.1  palle 
     43  1.1  palle 	struct vpci_range *vp_range;
     44  1.1  palle 	pci_chipset_tag_t vp_pc;
     45  1.1  palle 	int vp_nrange;
     46  1.1  palle 
     47  1.1  palle 	bus_space_tag_t		vp_memt;
     48  1.1  palle 	bus_space_tag_t		vp_iot;
     49  1.1  palle 	bus_space_tag_t		vp_cfgt;
     50  1.1  palle 	bus_space_handle_t	vp_cfgh;
     51  1.1  palle 	bus_dma_tag_t		vp_dmat;
     52  1.1  palle 	int			vp_flags;
     53  1.1  palle 	int			vp_bus_a;
     54  1.1  palle 	struct iommu_state	vp_is;
     55  1.1  palle 	struct strbuf_ctl	vp_sb;
     56  1.1  palle };
     57  1.1  palle 
     58  1.1  palle struct vpci_softc {
     59  1.1  palle 	device_t sc_dev;
     60  1.1  palle 	int sc_node;
     61  1.1  palle 	int sc_ign;
     62  1.1  palle 	bus_dma_tag_t sc_dmat;
     63  1.1  palle 	bus_space_tag_t sc_bustag;
     64  1.1  palle #if 0
     65  1.1  palle FIXME
     66  1.1  palle 	bus_addr_t sc_csr, sc_xbc;
     67  1.1  palle 	bus_space_handle_t sc_csrh, sc_xbch;
     68  1.1  palle #else
     69  1.1  palle 	bus_addr_t sc_csr;
     70  1.1  palle 	bus_space_handle_t sc_csrh;
     71  1.1  palle #endif
     72  1.1  palle #if 0
     73  1.1  palle FiXME
     74  1.1  palle 	int sc_oberon;
     75  1.1  palle #endif
     76  1.1  palle };
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