zs.c revision 1.77 1 /* $NetBSD: zs.c,v 1.77 2021/08/07 16:19:05 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Gordon W. Ross.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Zilog Z8530 Dual UART driver (machine-dependent part)
34 *
35 * Runs two serial lines per chip using slave drivers.
36 * Plain tty/async lines use the zs_async slave.
37 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
38 */
39
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.77 2021/08/07 16:19:05 thorpej Exp $");
42
43 #include "opt_ddb.h"
44 #include "opt_kgdb.h"
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/conf.h>
49 #include <sys/device.h>
50 #include <sys/file.h>
51 #include <sys/ioctl.h>
52 #include <sys/kernel.h>
53 #include <sys/proc.h>
54 #include <sys/tty.h>
55 #include <sys/time.h>
56 #include <sys/syslog.h>
57 #include <sys/intr.h>
58
59 #include <machine/autoconf.h>
60 #include <machine/openfirm.h>
61 #include <machine/cpu.h>
62 #include <machine/eeprom.h>
63 #include <machine/psl.h>
64 #include <machine/z8530var.h>
65
66 #include <dev/cons.h>
67 #include <dev/ic/z8530reg.h>
68 #include <dev/sun/kbd_ms_ttyvar.h>
69 #include <ddb/db_output.h>
70
71 #include <dev/sbus/sbusvar.h>
72 #include <sparc64/dev/fhcvar.h>
73 #include <sparc64/dev/cons.h>
74
75 #include "ioconf.h"
76 #include "kbd.h" /* NKBD */
77 #include "ms.h" /* NMS */
78 #include "zs.h" /* NZS */
79
80 /* Make life easier for the initialized arrays here. */
81 #if NZS < 3
82 #undef NZS
83 #define NZS 3
84 #endif
85
86 /*
87 * Some warts needed by z8530tty.c -
88 * The default parity REALLY needs to be the same as the PROM uses,
89 * or you can not see messages done with printf during boot-up...
90 */
91 int zs_def_cflag = (CREAD | CS8 | HUPCL);
92
93 /*
94 * The Sun provides a 4.9152 MHz clock to the ZS chips.
95 */
96 #define PCLK (9600 * 512) /* PCLK pin input clock rate */
97
98 #define ZS_DELAY()
99
100 /* The layout of this is hardware-dependent (padding, order). */
101 struct zschan {
102 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
103 uint8_t zc_xxx0;
104 volatile uint8_t zc_data; /* data */
105 uint8_t zc_xxx1;
106 };
107 struct zsdevice {
108 /* Yes, they are backwards. */
109 struct zschan zs_chan_b;
110 struct zschan zs_chan_a;
111 };
112
113 /* ZS channel used as the console device (if any) */
114 void *zs_conschan_get, *zs_conschan_put;
115
116 /* Saved PROM mappings */
117 static struct zsdevice *zsaddr[NZS];
118
119 static uint8_t zs_init_reg[16] = {
120 0, /* 0: CMD (reset, etc.) */
121 0, /* 1: No interrupts yet. */
122 0, /* 2: IVECT */
123 ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
124 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
125 ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
126 0, /* 6: TXSYNC/SYNCLO */
127 0, /* 7: RXSYNC/SYNCHI */
128 0, /* 8: alias for data port */
129 ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
130 0, /*10: Misc. TX/RX control bits */
131 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
132 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
133 0, /*13: BAUDHI (default=9600) */
134 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
135 ZSWR15_BREAK_IE,
136 };
137
138 /* Console ops */
139 static int zscngetc(dev_t);
140 static void zscnputc(dev_t, int);
141 static void zscnpollc(dev_t, int);
142
143 struct consdev zs_consdev = {
144 .cn_getc = zscngetc,
145 .cn_putc = zscnputc,
146 .cn_pollc = zscnpollc,
147 };
148
149
150 /****************************************************************
151 * Autoconfig
152 ****************************************************************/
153
154 /* Definition of the driver for autoconfig. */
155 static int zs_match_sbus(device_t, cfdata_t, void *);
156 static void zs_attach_sbus(device_t, device_t, void *);
157
158 static int zs_match_fhc(device_t, cfdata_t, void *);
159 static void zs_attach_fhc(device_t, device_t, void *);
160
161 static void zs_attach(struct zsc_softc *, struct zsdevice *, int);
162 static int zs_print(void *, const char *);
163
164 CFATTACH_DECL_NEW(zs, sizeof(struct zsc_softc),
165 zs_match_sbus, zs_attach_sbus, NULL, NULL);
166
167 CFATTACH_DECL_NEW(zs_fhc, sizeof(struct zsc_softc),
168 zs_match_fhc, zs_attach_fhc, NULL, NULL);
169
170 /* Interrupt handlers. */
171 int zscheckintr(void *);
172 static int zshard(void *);
173 static void zssoft(void *);
174
175 static int zs_get_speed(struct zs_chanstate *);
176
177 /* Console device support */
178 static int zs_console_flags(int, int, int);
179
180 /* Power management hooks */
181 int zs_enable(struct zs_chanstate *);
182 void zs_disable(struct zs_chanstate *);
183
184 /* from dev/ic/z8530tty.c */
185 struct tty *zstty_get_tty_from_dev(device_t);
186
187 /*
188 * Is the zs chip present?
189 */
190 static int
191 zs_match_sbus(device_t parent, cfdata_t cf, void *aux)
192 {
193 struct sbus_attach_args *sa = aux;
194
195 if (strcmp(cf->cf_name, sa->sa_name) != 0)
196 return (0);
197
198 return (1);
199 }
200
201 static int
202 zs_match_fhc(device_t parent, cfdata_t cf, void *aux)
203 {
204 struct fhc_attach_args *fa = aux;
205
206 if (strcmp(cf->cf_name, fa->fa_name) != 0)
207 return (0);
208
209 return (1);
210 }
211
212 static void
213 zs_attach_sbus(device_t parent, device_t self, void *aux)
214 {
215 struct zsc_softc *zsc = device_private(self);
216 struct sbus_attach_args *sa = aux;
217 bus_space_handle_t bh;
218 int zs_unit;
219
220 zsc->zsc_dev = self;
221 zs_unit = device_unit(self);
222
223 if (sa->sa_nintr == 0) {
224 aprint_error(": no interrupt lines\n");
225 return;
226 }
227
228 /* Use the mapping setup by the Sun PROM if possible. */
229 if (zsaddr[zs_unit] == NULL) {
230 /* Only map registers once. */
231 if (sa->sa_npromvaddrs) {
232 /*
233 * We're converting from a 32-bit pointer to a 64-bit
234 * pointer. Since the 32-bit entity is negative, but
235 * the kernel is still mapped into the lower 4GB
236 * range, this needs to be zero-extended.
237 *
238 * XXXXX If we map the kernel and devices into the
239 * high 4GB range, this needs to be changed to
240 * sign-extend the address.
241 */
242 sparc_promaddr_to_handle(sa->sa_bustag,
243 sa->sa_promvaddrs[0], &bh);
244
245 } else {
246
247 if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
248 sa->sa_offset,
249 sa->sa_size,
250 BUS_SPACE_MAP_LINEAR,
251 &bh) != 0) {
252 aprint_error(": cannot map registers\n");
253 return;
254 }
255 }
256 zsaddr[zs_unit] = bus_space_vaddr(sa->sa_bustag, bh);
257 }
258 zsc->zsc_bustag = sa->sa_bustag;
259 zsc->zsc_dmatag = sa->sa_dmatag;
260 zsc->zsc_promunit = prom_getpropint(sa->sa_node, "slave", -2);
261 zsc->zsc_node = sa->sa_node;
262 aprint_normal("\n");
263 zs_attach(zsc, zsaddr[zs_unit], sa->sa_pri);
264 }
265
266 static void
267 zs_attach_fhc(device_t parent, device_t self, void *aux)
268 {
269 struct zsc_softc *zsc = device_private(self);
270 struct fhc_attach_args *fa = aux;
271 bus_space_handle_t bh;
272 int zs_unit;
273
274 zsc->zsc_dev = self;
275 zs_unit = device_unit(self);
276
277 if (fa->fa_nreg < 1 && fa->fa_npromvaddrs < 1) {
278 printf(": no registers\n");
279 return;
280 }
281
282 if (fa->fa_nintr == 0) {
283 aprint_error(": no interrupt lines\n");
284 return;
285 }
286
287 /* Use the mapping setup by the Sun PROM if possible. */
288 if (zsaddr[zs_unit] == NULL) {
289 /* Only map registers once. */
290 if (fa->fa_npromvaddrs) {
291 /*
292 * We're converting from a 32-bit pointer to a 64-bit
293 * pointer. Since the 32-bit entity is negative, but
294 * the kernel is still mapped into the lower 4GB
295 * range, this needs to be zero-extended.
296 *
297 * XXXXX If we map the kernel and devices into the
298 * high 4GB range, this needs to be changed to
299 * sign-extend the address.
300 */
301 sparc_promaddr_to_handle(fa->fa_bustag,
302 fa->fa_promvaddrs[0], &bh);
303
304 } else {
305
306 if (fhc_bus_map(fa->fa_bustag,
307 fa->fa_reg[0].fbr_slot,
308 fa->fa_reg[0].fbr_offset,
309 fa->fa_reg[0].fbr_size,
310 BUS_SPACE_MAP_LINEAR,
311 &bh) != 0) {
312 aprint_error(": cannot map registers\n");
313 return;
314 }
315 }
316 zsaddr[zs_unit] = bus_space_vaddr(fa->fa_bustag, bh);
317 }
318 zsc->zsc_bustag = fa->fa_bustag;
319 zsc->zsc_dmatag = NULL;
320 zsc->zsc_promunit = prom_getpropint(fa->fa_node, "slave", -2);
321 zsc->zsc_node = fa->fa_node;
322 aprint_normal("\n");
323 zs_attach(zsc, zsaddr[zs_unit], fa->fa_intr[0]);
324 }
325
326 /*
327 * Attach a found zs.
328 *
329 * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
330 * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
331 */
332 static void
333 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
334 {
335 struct zsc_attach_args zsc_args;
336 struct zs_chanstate *cs;
337 int channel;
338
339 if (zsd == NULL) {
340 aprint_error(": configuration incomplete\n");
341 return;
342 }
343
344 /*
345 * Initialize software state for each channel.
346 */
347 for (channel = 0; channel < 2; channel++) {
348 struct zschan *zc;
349 device_t child;
350
351 zsc_args.channel = channel;
352 cs = &zsc->zsc_cs_store[channel];
353 zsc->zsc_cs[channel] = cs;
354
355 zs_lock_init(cs);
356 cs->cs_channel = channel;
357 cs->cs_private = NULL;
358 cs->cs_ops = &zsops_null;
359 cs->cs_brg_clk = PCLK / 16;
360
361 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
362
363 zsc_args.consdev = NULL;
364 zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
365 zsc->zsc_node,
366 channel);
367
368 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
369 zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
370 zsc_args.consdev = &zs_consdev;
371 }
372
373 if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
374 zs_conschan_get = zc;
375 }
376 if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
377 zs_conschan_put = zc;
378 }
379
380 /* Children need to set cn_dev, etc */
381 cs->cs_reg_csr = &zc->zc_csr;
382 cs->cs_reg_data = &zc->zc_data;
383
384 memcpy(cs->cs_creg, zs_init_reg, 16);
385 memcpy(cs->cs_preg, zs_init_reg, 16);
386
387 /* XXX: Consult PROM properties for this?! */
388 cs->cs_defspeed = zs_get_speed(cs);
389 cs->cs_defcflag = zs_def_cflag;
390
391 /* Make these correspond to cs_defcflag (-crtscts) */
392 cs->cs_rr0_dcd = ZSRR0_DCD;
393 cs->cs_rr0_cts = 0;
394 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
395 cs->cs_wr5_rts = 0;
396
397 /*
398 * Clear the master interrupt enable.
399 * The INTENA is common to both channels,
400 * so just do it on the A channel.
401 */
402 if (channel == 0) {
403 zs_write_reg(cs, 9, 0);
404 }
405
406 /*
407 * Look for a child driver for this channel.
408 * The child attach will setup the hardware.
409 */
410 child = config_found(zsc->zsc_dev, (void *)&zsc_args,
411 zs_print, CFARGS_NONE);
412 if (child == NULL) {
413 /* No sub-driver. Just reset it. */
414 uint8_t reset = (channel == 0) ?
415 ZSWR9_A_RESET : ZSWR9_B_RESET;
416 zs_lock_chan(cs);
417 zs_write_reg(cs, 9, reset);
418 zs_unlock_chan(cs);
419 }
420 #if (NKBD > 0) || (NMS > 0)
421 /*
422 * If this was a zstty it has a keyboard
423 * property on it we need to attach the
424 * sunkbd and sunms line disciplines.
425 */
426 if (child
427 && (device_is_a(child, "zstty"))
428 && (prom_getproplen(zsc->zsc_node, "keyboard") == 0)) {
429 struct kbd_ms_tty_attach_args kma;
430 struct tty *tp;
431
432 kma.kmta_tp = tp = zstty_get_tty_from_dev(child);
433 kma.kmta_dev = tp->t_dev;
434 kma.kmta_consdev = zsc_args.consdev;
435
436 /* Attach 'em if we got 'em. */
437 #if (NKBD > 0)
438 if (channel == 0) {
439 kma.kmta_name = "keyboard";
440 config_found(child, (void *)&kma, NULL,
441 CFARGS_NONE);
442 }
443 #endif
444 #if (NMS > 0)
445 if (channel == 1) {
446 kma.kmta_name = "mouse";
447 config_found(child, (void *)&kma, NULL,
448 CFARGS_NONE);
449 }
450 #endif
451 }
452 #endif
453 }
454
455 /*
456 * Now safe to install interrupt handlers. Note the arguments
457 * to the interrupt handlers aren't used. Note, we only do this
458 * once since both SCCs interrupt at the same level and vector.
459 */
460 bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, zshard, zsc);
461 if (!(zsc->zsc_softintr = softint_establish(SOFTINT_SERIAL, zssoft, zsc)))
462 panic("zsattach: could not establish soft interrupt");
463
464 evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
465 device_xname(zsc->zsc_dev), "intr");
466
467
468 /*
469 * Set the master interrupt enable and interrupt vector.
470 * (common to both channels, do it on A)
471 */
472 cs = zsc->zsc_cs[0];
473 zs_lock_chan(cs);
474 /* interrupt vector */
475 zs_write_reg(cs, 2, zs_init_reg[2]);
476 /* master interrupt control (enable) */
477 zs_write_reg(cs, 9, zs_init_reg[9]);
478 zs_unlock_chan(cs);
479 }
480
481 static int
482 zs_print(void *aux, const char *name)
483 {
484 struct zsc_attach_args *args = aux;
485
486 if (name != NULL)
487 aprint_normal("%s: ", name);
488
489 if (args->channel != -1)
490 aprint_normal(" channel %d", args->channel);
491
492 return (UNCONF);
493 }
494
495 static int
496 zshard(void *arg)
497 {
498 struct zsc_softc *zsc = arg;
499 int rr3, rval;
500
501 rval = 0;
502 while ((rr3 = zsc_intr_hard(zsc))) {
503 /* Count up the interrupts. */
504 rval |= rr3;
505 zsc->zsc_intrcnt.ev_count++;
506 }
507 if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
508 (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
509 zsc->zsc_softintr) {
510 softint_schedule(zsc->zsc_softintr);
511 }
512 return (rval);
513 }
514
515 int
516 zscheckintr(void *arg)
517 {
518 struct zsc_softc *zsc;
519 int unit, rval;
520
521 rval = 0;
522 for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
523
524 zsc = device_lookup_private(&zs_cd, unit);
525 if (zsc == NULL)
526 continue;
527 rval = (zshard((void *)zsc) || rval);
528 }
529 return (rval);
530 }
531
532
533 /*
534 * We need this only for TTY_DEBUG purposes.
535 */
536 static void
537 zssoft(void *arg)
538 {
539 struct zsc_softc *zsc = arg;
540
541 #if 0 /* not yet */
542 /* Make sure we call the tty layer with tty_lock held. */
543 mutex_spin_enter(&tty_lock);
544 #endif
545 (void)zsc_intr_soft(zsc);
546 #ifdef TTY_DEBUG
547 {
548 struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
549 struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
550 if (zst0->zst_overflows || zst1->zst_overflows ) {
551 struct trapframe *frame = (struct trapframe *)arg;
552
553 printf("zs silo overflow from %p\n",
554 (long)frame->tf_pc);
555 }
556 }
557 #endif
558 #if 0 /* not yet */
559 mutex_spin_exit(&tty_lock);
560 #endif
561 }
562
563
564 /*
565 * Compute the current baud rate given a ZS channel.
566 */
567 static int
568 zs_get_speed(struct zs_chanstate *cs)
569 {
570 int tconst;
571
572 tconst = zs_read_reg(cs, 12);
573 tconst |= zs_read_reg(cs, 13) << 8;
574 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
575 }
576
577 /*
578 * MD functions for setting the baud rate and control modes.
579 */
580 int
581 zs_set_speed(struct zs_chanstate *cs, int bps /* bits per second */)
582 {
583 int tconst, real_bps;
584
585 if (bps == 0)
586 return (0);
587
588 #ifdef DIAGNOSTIC
589 if (cs->cs_brg_clk == 0)
590 panic("zs_set_speed");
591 #endif
592
593 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
594 if (tconst < 0)
595 return (EINVAL);
596
597 /* Convert back to make sure we can do it. */
598 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
599
600 /* XXX - Allow some tolerance here? */
601 if (real_bps != bps)
602 return (EINVAL);
603
604 cs->cs_preg[12] = tconst;
605 cs->cs_preg[13] = tconst >> 8;
606
607 /* Caller will stuff the pending registers. */
608 return (0);
609 }
610
611 int
612 zs_set_modes(struct zs_chanstate *cs, int cflag)
613 {
614
615 /*
616 * Output hardware flow control on the chip is horrendous:
617 * if carrier detect drops, the receiver is disabled, and if
618 * CTS drops, the transmitter is stoped IN MID CHARACTER!
619 * Therefore, NEVER set the HFC bit, and instead use the
620 * status interrupt to detect CTS changes.
621 */
622 zs_lock_chan(cs);
623 cs->cs_rr0_pps = 0;
624 if ((cflag & (CLOCAL | MDMBUF)) != 0) {
625 cs->cs_rr0_dcd = 0;
626 if ((cflag & MDMBUF) == 0)
627 cs->cs_rr0_pps = ZSRR0_DCD;
628 } else
629 cs->cs_rr0_dcd = ZSRR0_DCD;
630 if ((cflag & CRTSCTS) != 0) {
631 cs->cs_wr5_dtr = ZSWR5_DTR;
632 cs->cs_wr5_rts = ZSWR5_RTS;
633 cs->cs_rr0_cts = ZSRR0_CTS;
634 } else if ((cflag & CDTRCTS) != 0) {
635 cs->cs_wr5_dtr = 0;
636 cs->cs_wr5_rts = ZSWR5_DTR;
637 cs->cs_rr0_cts = ZSRR0_CTS;
638 } else if ((cflag & MDMBUF) != 0) {
639 cs->cs_wr5_dtr = 0;
640 cs->cs_wr5_rts = ZSWR5_DTR;
641 cs->cs_rr0_cts = ZSRR0_DCD;
642 } else {
643 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
644 cs->cs_wr5_rts = 0;
645 cs->cs_rr0_cts = 0;
646 }
647 zs_unlock_chan(cs);
648
649 /* Caller will stuff the pending registers. */
650 return (0);
651 }
652
653
654 /*
655 * Read or write the chip with suitable delays.
656 */
657
658 u_char
659 zs_read_reg(struct zs_chanstate *cs, u_char reg)
660 {
661 u_char val;
662
663 *cs->cs_reg_csr = reg;
664 ZS_DELAY();
665 val = *cs->cs_reg_csr;
666 ZS_DELAY();
667 return (val);
668 }
669
670 void
671 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
672 {
673 *cs->cs_reg_csr = reg;
674 ZS_DELAY();
675 *cs->cs_reg_csr = val;
676 ZS_DELAY();
677 }
678
679 u_char
680 zs_read_csr(struct zs_chanstate *cs)
681 {
682 u_char val;
683
684 val = *cs->cs_reg_csr;
685 ZS_DELAY();
686 return (val);
687 }
688
689 void
690 zs_write_csr(struct zs_chanstate *cs, u_char val)
691 {
692 *cs->cs_reg_csr = val;
693 ZS_DELAY();
694 }
695
696 u_char
697 zs_read_data(struct zs_chanstate *cs)
698 {
699 u_char val;
700
701 val = *cs->cs_reg_data;
702 ZS_DELAY();
703 return (val);
704 }
705
706 void
707 zs_write_data(struct zs_chanstate *cs, u_char val)
708 {
709 *cs->cs_reg_data = val;
710 ZS_DELAY();
711 }
712
713 /****************************************************************
714 * Console support functions (Sun specific!)
715 * Note: this code is allowed to know about the layout of
716 * the chip registers, and uses that to keep things simple.
717 * XXX - I think I like the mvme167 code better. -gwr
718 ****************************************************************/
719
720 extern void Debugger(void);
721
722 /*
723 * Handle user request to enter kernel debugger.
724 */
725 void
726 zs_abort(struct zs_chanstate *cs)
727 {
728 volatile struct zschan *zc = zs_conschan_get;
729 int rr0;
730
731 /* Wait for end of break to avoid PROM abort. */
732 /* XXX - Limit the wait? */
733 do {
734 rr0 = zc->zc_csr;
735 ZS_DELAY();
736 } while (rr0 & ZSRR0_BREAK);
737
738 #if defined(KGDB)
739 zskgdb(cs);
740 #elif defined(DDB)
741 {
742 extern int db_active;
743
744 if (!db_active)
745 Debugger();
746 else
747 /* Debugger is probably hozed */
748 callrom();
749 }
750 #else
751 printf("stopping on keyboard abort\n");
752 callrom();
753 #endif
754 }
755
756
757 /*
758 * Polled input char.
759 */
760 int
761 zs_getc(void *arg)
762 {
763 volatile struct zschan *zc = arg;
764 int s, c, rr0;
765
766 s = splhigh();
767 /* Wait for a character to arrive. */
768 do {
769 rr0 = zc->zc_csr;
770 ZS_DELAY();
771 } while ((rr0 & ZSRR0_RX_READY) == 0);
772
773 c = zc->zc_data;
774 ZS_DELAY();
775 splx(s);
776
777 /*
778 * This is used by the kd driver to read scan codes,
779 * so don't translate '\r' ==> '\n' here...
780 */
781 return (c);
782 }
783
784 /*
785 * Polled output char.
786 */
787 void
788 zs_putc(void *arg, int c)
789 {
790 volatile struct zschan *zc = arg;
791 int s, rr0;
792
793 s = splhigh();
794
795 /* Wait for transmitter to become ready. */
796 do {
797 rr0 = zc->zc_csr;
798 ZS_DELAY();
799 } while ((rr0 & ZSRR0_TX_READY) == 0);
800
801 /*
802 * Send the next character.
803 * Now you'd think that this could be followed by a ZS_DELAY()
804 * just like all the other chip accesses, but it turns out that
805 * the `transmit-ready' interrupt isn't de-asserted until
806 * some period of time after the register write completes
807 * (more than a couple instructions). So to avoid stray
808 * interrupts we put in the 2us delay regardless of CPU model.
809 */
810 zc->zc_data = c;
811 delay(2);
812
813 splx(s);
814 }
815
816 /*****************************************************************/
817
818
819
820
821 /*
822 * Polled console input putchar.
823 */
824 static int
825 zscngetc(dev_t dev)
826 {
827 return (zs_getc(zs_conschan_get));
828 }
829
830 /*
831 * Polled console output putchar.
832 */
833 static void
834 zscnputc(dev_t dev, int c)
835 {
836 zs_putc(zs_conschan_put, c);
837 }
838
839 int swallow_zsintrs;
840
841 static void
842 zscnpollc(dev_t dev, int on)
843 {
844 /*
845 * Need to tell zs driver to acknowledge all interrupts or we get
846 * annoying spurious interrupt messages. This is because mucking
847 * with spl() levels during polling does not prevent interrupts from
848 * being generated.
849 */
850
851 if (on) swallow_zsintrs++;
852 else swallow_zsintrs--;
853 }
854
855 int
856 zs_console_flags(int promunit, int node, int channel)
857 {
858 int cookie, flags = 0;
859 char buf[255];
860
861 /*
862 * We'll just do the OBP grovelling down here since that's
863 * the only type of firmware we support.
864 */
865
866 /* Default to channel 0 if there are no explicit prom args */
867 cookie = 0;
868 if (node == prom_instance_to_package(prom_stdin())) {
869 if (prom_getoption("input-device", buf, sizeof buf) == 0 &&
870 strcmp("ttyb", buf) == 0)
871 cookie = 1;
872
873 if (channel == cookie)
874 flags |= ZS_HWFLAG_CONSOLE_INPUT;
875 }
876
877 if (node == prom_instance_to_package(prom_stdout())) {
878 if (prom_getoption("output-device", buf, sizeof buf) == 0 &&
879 strcmp("ttyb", buf) == 0)
880 cookie = 1;
881
882 if (channel == cookie)
883 flags |= ZS_HWFLAG_CONSOLE_OUTPUT;
884 }
885
886 return (flags);
887 }
888
889