cpu.h revision 1.13 1 1.13 eeh /* $NetBSD: cpu.h,v 1.13 1999/10/11 01:57:44 eeh Exp $ */
2 1.1 eeh
3 1.1 eeh /*
4 1.1 eeh * Copyright (c) 1992, 1993
5 1.1 eeh * The Regents of the University of California. All rights reserved.
6 1.1 eeh *
7 1.1 eeh * This software was developed by the Computer Systems Engineering group
8 1.1 eeh * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 1.1 eeh * contributed to Berkeley.
10 1.1 eeh *
11 1.1 eeh * All advertising materials mentioning features or use of this software
12 1.1 eeh * must display the following acknowledgement:
13 1.1 eeh * This product includes software developed by the University of
14 1.1 eeh * California, Lawrence Berkeley Laboratory.
15 1.1 eeh *
16 1.1 eeh * Redistribution and use in source and binary forms, with or without
17 1.1 eeh * modification, are permitted provided that the following conditions
18 1.1 eeh * are met:
19 1.1 eeh * 1. Redistributions of source code must retain the above copyright
20 1.1 eeh * notice, this list of conditions and the following disclaimer.
21 1.1 eeh * 2. Redistributions in binary form must reproduce the above copyright
22 1.1 eeh * notice, this list of conditions and the following disclaimer in the
23 1.1 eeh * documentation and/or other materials provided with the distribution.
24 1.1 eeh * 3. All advertising materials mentioning features or use of this software
25 1.1 eeh * must display the following acknowledgement:
26 1.1 eeh * This product includes software developed by the University of
27 1.1 eeh * California, Berkeley and its contributors.
28 1.1 eeh * 4. Neither the name of the University nor the names of its contributors
29 1.1 eeh * may be used to endorse or promote products derived from this software
30 1.1 eeh * without specific prior written permission.
31 1.1 eeh *
32 1.1 eeh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 1.1 eeh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 1.1 eeh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 1.1 eeh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 1.1 eeh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 1.1 eeh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 1.1 eeh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 1.1 eeh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 1.1 eeh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 1.1 eeh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 1.1 eeh * SUCH DAMAGE.
43 1.1 eeh *
44 1.1 eeh * @(#)cpu.h 8.4 (Berkeley) 1/5/94
45 1.1 eeh */
46 1.1 eeh
47 1.1 eeh #ifndef _CPU_H_
48 1.1 eeh #define _CPU_H_
49 1.1 eeh
50 1.1 eeh /*
51 1.1 eeh * CTL_MACHDEP definitions.
52 1.1 eeh */
53 1.13 eeh #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */
54 1.13 eeh #define CPU_MAXID 2 /* number of valid machdep ids */
55 1.1 eeh
56 1.13 eeh #define CTL_MACHDEP_NAMES { \
57 1.13 eeh { 0, 0 }, \
58 1.13 eeh { "booted_kernel", CTLTYPE_STRING }, \
59 1.1 eeh }
60 1.1 eeh
61 1.1 eeh #ifdef _KERNEL
62 1.1 eeh /*
63 1.1 eeh * Exported definitions unique to SPARC cpu support.
64 1.1 eeh */
65 1.1 eeh
66 1.1 eeh #include <machine/psl.h>
67 1.1 eeh #include <machine/reg.h>
68 1.6 mrg #include <machine/intr.h>
69 1.1 eeh #include <sparc64/sparc64/intreg.h>
70 1.1 eeh
71 1.1 eeh /*
72 1.1 eeh * definitions of cpu-dependent requirements
73 1.1 eeh * referenced in generic code
74 1.1 eeh */
75 1.1 eeh #define cpu_swapin(p) /* nothing */
76 1.1 eeh #define cpu_swapout(p) /* nothing */
77 1.1 eeh #define cpu_wait(p) /* nothing */
78 1.12 thorpej #define cpu_number() 0
79 1.1 eeh
80 1.1 eeh /*
81 1.1 eeh * Arguments to hardclock, softclock and gatherstats encapsulate the
82 1.1 eeh * previous machine state in an opaque clockframe. The ipl is here
83 1.1 eeh * as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
84 1.1 eeh * Note that CLKF_INTR is valid only if CLKF_USERMODE is false.
85 1.1 eeh */
86 1.1 eeh extern int eintstack[];
87 1.1 eeh struct clockframe {
88 1.1 eeh struct trapframe t;
89 1.1 eeh };
90 1.1 eeh
91 1.1 eeh #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0)
92 1.1 eeh #define CLKF_BASEPRI(framep) (((framep)->t.tf_oldpil) == 0)
93 1.1 eeh #define CLKF_PC(framep) ((framep)->t.tf_pc)
94 1.1 eeh #define CLKF_INTR(framep) (((framep)->t.tf_kstack < (u_int)eintstack)&&((framep)->t.tf_kstack > (u_int)KERNBASE))
95 1.1 eeh
96 1.1 eeh /*
97 1.1 eeh * Software interrupt request `register'.
98 1.1 eeh */
99 1.1 eeh union sir {
100 1.1 eeh int sir_any;
101 1.1 eeh char sir_which[4];
102 1.1 eeh } sir;
103 1.1 eeh
104 1.1 eeh #define SIR_NET 0
105 1.1 eeh #define SIR_CLOCK 1
106 1.1 eeh
107 1.1 eeh #define setsoftint() ienab_bis(IE_L1)
108 1.1 eeh #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint())
109 1.1 eeh #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint())
110 1.1 eeh
111 1.1 eeh int want_ast;
112 1.1 eeh
113 1.1 eeh /*
114 1.1 eeh * Preempt the current process if in interrupt from user mode,
115 1.1 eeh * or after the current trap/syscall if in system mode.
116 1.1 eeh */
117 1.1 eeh int want_resched; /* resched() was called */
118 1.1 eeh #define need_resched() (want_resched = 1, want_ast = 1)
119 1.1 eeh
120 1.1 eeh /*
121 1.1 eeh * Give a profiling tick to the current process when the user profiling
122 1.1 eeh * buffer pages are invalid. On the sparc, request an ast to send us
123 1.1 eeh * through trap(), marking the proc as needing a profiling tick.
124 1.1 eeh */
125 1.1 eeh #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1)
126 1.1 eeh
127 1.1 eeh /*
128 1.1 eeh * Notify the current process (p) that it has a signal pending,
129 1.1 eeh * process as soon as possible.
130 1.1 eeh */
131 1.1 eeh #define signotify(p) (want_ast = 1)
132 1.1 eeh
133 1.1 eeh /*
134 1.1 eeh * Only one process may own the FPU state.
135 1.1 eeh *
136 1.1 eeh * XXX this must be per-cpu (eventually)
137 1.1 eeh */
138 1.1 eeh struct proc *fpproc; /* FPU owner */
139 1.1 eeh int foundfpu; /* true => we have an FPU */
140 1.1 eeh
141 1.1 eeh /*
142 1.1 eeh * Interrupt handler chains. Interrupt handlers should return 0 for
143 1.1 eeh * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a
144 1.1 eeh * handler into the list. The handler is called with its (single)
145 1.1 eeh * argument, or with a pointer to a clockframe if ih_arg is NULL.
146 1.1 eeh */
147 1.1 eeh struct intrhand {
148 1.1 eeh int (*ih_fun) __P((void *));
149 1.1 eeh void *ih_arg;
150 1.1 eeh short ih_number; /* interrupt number the H/W provides */
151 1.1 eeh short ih_pil; /* interrupt priority */
152 1.1 eeh struct intrhand *ih_next;
153 1.1 eeh u_int64_t *ih_map; /* Interrupt map register */
154 1.1 eeh u_int64_t *ih_clr; /* clear interrupt register */
155 1.1 eeh };
156 1.1 eeh extern struct intrhand *intrhand[15];
157 1.1 eeh extern struct intrhand *intrlev[MAXINTNUM];
158 1.1 eeh
159 1.1 eeh void intr_establish __P((int level, struct intrhand *));
160 1.1 eeh
161 1.1 eeh /* disksubr.c */
162 1.1 eeh struct dkbad;
163 1.1 eeh int isbad __P((struct dkbad *bt, int, int, int));
164 1.1 eeh /* machdep.c */
165 1.1 eeh int ldcontrolb __P((caddr_t));
166 1.1 eeh void dumpconf __P((void));
167 1.1 eeh caddr_t reserve_dumppages __P((caddr_t));
168 1.1 eeh /* clock.c */
169 1.1 eeh struct timeval;
170 1.7 eeh int tickintr __P((void *)); /* level 10 (tick) interrupt code */
171 1.1 eeh int clockintr __P((void *));/* level 10 (clock) interrupt code */
172 1.1 eeh int statintr __P((void *)); /* level 14 (statclock) interrupt code */
173 1.1 eeh /* locore.s */
174 1.1 eeh struct fpstate;
175 1.1 eeh void savefpstate __P((struct fpstate *));
176 1.1 eeh void loadfpstate __P((struct fpstate *));
177 1.9 eeh int probeget __P((paddr_t, int, int));
178 1.9 eeh int probeset __P((paddr_t, int, int, u_int64_t));
179 1.1 eeh #if 0
180 1.1 eeh void write_all_windows __P((void));
181 1.1 eeh void write_user_windows __P((void));
182 1.1 eeh #else
183 1.1 eeh #define write_all_windows() __asm __volatile("flushw" : : )
184 1.1 eeh #define write_user_windows() __asm __volatile("flushw" : : )
185 1.1 eeh #endif
186 1.1 eeh void proc_trampoline __P((void));
187 1.1 eeh struct pcb;
188 1.1 eeh void snapshot __P((struct pcb *));
189 1.1 eeh struct frame *getfp __P((void));
190 1.1 eeh int xldcontrolb __P((caddr_t, struct pcb *));
191 1.1 eeh void copywords __P((const void *, void *, size_t));
192 1.1 eeh void qcopy __P((const void *, void *, size_t));
193 1.1 eeh void qzero __P((void *, size_t));
194 1.5 mrg void switchtoctx __P((int));
195 1.1 eeh /* locore2.c */
196 1.1 eeh void remrq __P((struct proc *));
197 1.1 eeh /* trap.c */
198 1.1 eeh void kill_user_windows __P((struct proc *));
199 1.1 eeh int rwindow_save __P((struct proc *));
200 1.4 thorpej void child_return __P((void *));
201 1.1 eeh /* amd7930intr.s */
202 1.1 eeh void amd7930_trap __P((void));
203 1.1 eeh /* cons.c */
204 1.1 eeh int cnrom __P((void));
205 1.1 eeh /* zs.c */
206 1.1 eeh void zsconsole __P((struct tty *, int, int, void (**)(struct tty *, int)));
207 1.1 eeh #ifdef KGDB
208 1.1 eeh void zs_kgdb_init __P((void));
209 1.1 eeh #endif
210 1.1 eeh /* fb.c */
211 1.1 eeh void fb_unblank __P((void));
212 1.1 eeh /* kgdb_stub.c */
213 1.1 eeh #ifdef KGDB
214 1.1 eeh void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *));
215 1.1 eeh void kgdb_connect __P((int));
216 1.1 eeh void kgdb_panic __P((void));
217 1.1 eeh #endif
218 1.5 mrg /* emul.c */
219 1.5 mrg int fixalign __P((struct proc *, struct trapframe *));
220 1.5 mrg int emulinstr __P((vaddr_t, struct trapframe *));
221 1.1 eeh
222 1.1 eeh /*
223 1.1 eeh *
224 1.1 eeh * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits
225 1.1 eeh * of the trap vector table. The next eight bits are supplied by the
226 1.1 eeh * hardware when the trap occurs, and the bottom four bits are always
227 1.1 eeh * zero (so that we can shove up to 16 bytes of executable code---exactly
228 1.1 eeh * four instructions---into each trap vector).
229 1.1 eeh *
230 1.1 eeh * The hardware allocates half the trap vectors to hardware and half to
231 1.1 eeh * software.
232 1.1 eeh *
233 1.1 eeh * Traps have priorities assigned (lower number => higher priority).
234 1.1 eeh */
235 1.1 eeh
236 1.1 eeh struct trapvec {
237 1.1 eeh int tv_instr[8]; /* the eight instructions */
238 1.1 eeh };
239 1.1 eeh extern struct trapvec *trapbase; /* the 256 vectors */
240 1.1 eeh
241 1.1 eeh extern void wzero __P((void *, u_int));
242 1.1 eeh extern void wcopy __P((const void *, void *, u_int));
243 1.1 eeh
244 1.1 eeh #endif /* _KERNEL */
245 1.1 eeh #endif /* _CPU_H_ */
246