cpu.h revision 1.54.6.2 1 /* $NetBSD: cpu.h,v 1.54.6.2 2006/12/29 20:27:42 ad Exp $ */
2
3 /*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 * All advertising materials mentioning features or use of this software
12 * must display the following acknowledgement:
13 * This product includes software developed by the University of
14 * California, Lawrence Berkeley Laboratory.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
41 */
42
43 #ifndef _CPU_H_
44 #define _CPU_H_
45
46 /*
47 * CTL_MACHDEP definitions.
48 */
49 #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */
50 #define CPU_BOOTED_DEVICE 2 /* string: device booted from */
51 #define CPU_BOOT_ARGS 3 /* string: args booted with */
52 #define CPU_ARCH 4 /* integer: cpu architecture version */
53 #define CPU_MAXID 5 /* number of valid machdep ids */
54
55 #define CTL_MACHDEP_NAMES { \
56 { 0, 0 }, \
57 { "booted_kernel", CTLTYPE_STRING }, \
58 { "booted_device", CTLTYPE_STRING }, \
59 { "boot_args", CTLTYPE_STRING }, \
60 { "cpu_arch", CTLTYPE_INT }, \
61 }
62
63 #ifdef _KERNEL
64 /*
65 * Exported definitions unique to SPARC cpu support.
66 */
67
68 #if defined(_KERNEL_OPT)
69 #include "opt_multiprocessor.h"
70 #include "opt_lockdebug.h"
71 #endif
72
73 #include <machine/psl.h>
74 #include <machine/reg.h>
75 #include <machine/intr.h>
76 #include <machine/cpuset.h>
77 #include <sparc64/sparc64/intreg.h>
78
79 #include <sys/cpu_data.h>
80 /*
81 * The cpu_info structure is part of a 64KB structure mapped both the kernel
82 * pmap and a single locked TTE a CPUINFO_VA for that particular processor.
83 * Each processor's cpu_info is accessible at CPUINFO_VA only for that
84 * processor. Other processors can access that through an additional mapping
85 * in the kernel pmap.
86 *
87 * The 64KB page contains:
88 *
89 * cpu_info
90 * interrupt stack (all remaining space)
91 * idle PCB
92 * idle stack (STACKSPACE - sizeof(PCB))
93 * 32KB TSB
94 */
95
96 struct cpu_info {
97
98 /*
99 * SPARC cpu_info structures live at two VAs: one global
100 * VA (so each CPU can access any other CPU's cpu_info)
101 * and an alias VA CPUINFO_VA which is the same on each
102 * CPU and maps to that CPU's cpu_info. Since the alias
103 * CPUINFO_VA is how we locate our cpu_info, we have to
104 * self-reference the global VA so that we can return it
105 * in the curcpu() macro.
106 */
107 struct cpu_info * volatile ci_self;
108
109 /* Most important fields first */
110 struct lwp *ci_curlwp;
111 struct pcb *ci_cpcb;
112 struct cpu_info *ci_next;
113
114 struct lwp *ci_fplwp;
115
116 void *ci_eintstack;
117 struct pcb *ci_idle_u;
118
119 /* Spinning up the CPU */
120 void (*ci_spinup)(void);
121 void *ci_initstack;
122 paddr_t ci_paddr;
123
124 int ci_number;
125 int ci_upaid;
126 int ci_cpuid;
127
128 /* CPU PROM information. */
129 u_int ci_node;
130
131 int ci_flags;
132 int ci_want_ast;
133 int ci_want_resched;
134
135 struct cpu_data ci_data; /* MI per-cpu data */
136
137 volatile void *ci_ddb_regs; /* DDB regs */
138 };
139
140 #define CPUF_PRIMARY 1
141
142 /*
143 * CPU boot arguments. Used by secondary CPUs at the bootstrap time.
144 */
145 struct cpu_bootargs {
146 u_int cb_node; /* PROM CPU node */
147 volatile int cb_flags;
148
149 vaddr_t cb_ktext;
150 paddr_t cb_ktextp;
151 vaddr_t cb_ektext;
152
153 vaddr_t cb_kdata;
154 paddr_t cb_kdatap;
155 vaddr_t cb_ekdata;
156
157 paddr_t cb_cpuinfo;
158
159 void *cb_initstack;
160 };
161
162 extern struct cpu_bootargs *cpu_args;
163
164 extern int sparc_ncpus;
165 extern struct cpu_info *cpus;
166
167 #define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self)
168 #define cpu_number() (curcpu()->ci_number)
169 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
170
171 #define CPU_INFO_ITERATOR int
172 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpus; ci != NULL; \
173 ci = ci->ci_next
174
175 #define curlwp curcpu()->ci_curlwp
176 #define fplwp curcpu()->ci_fplwp
177 #define curpcb curcpu()->ci_cpcb
178
179 #define want_ast curcpu()->ci_want_ast
180 #define want_resched curcpu()->ci_want_resched
181
182 /*
183 * definitions of cpu-dependent requirements
184 * referenced in generic code
185 */
186 #define cpu_swapin(p) /* nothing */
187 #define cpu_swapout(p) /* nothing */
188 #define cpu_wait(p) /* nothing */
189 void cpu_proc_fork(struct proc *, struct proc *);
190
191 #if defined(MULTIPROCESSOR)
192 extern vaddr_t cpu_spinup_trampoline;
193
194 extern char *mp_tramp_code;
195 extern u_long mp_tramp_code_len;
196 extern u_long mp_tramp_tlb_slots;
197 extern u_long mp_tramp_func;
198 extern u_long mp_tramp_ci;
199
200 void cpu_hatch(void);
201 void cpu_boot_secondary_processors(void);
202
203 /*
204 * Call a function on other cpus:
205 * multicast - send to everyone in the cpuset_t
206 * broadcast - send to to all cpus but ourselves
207 * send - send to just this cpu
208 */
209 typedef void (* ipifunc_t)(void *);
210
211 void sparc64_multicast_ipi (cpuset_t, ipifunc_t);
212 void sparc64_broadcast_ipi (ipifunc_t);
213 void sparc64_send_ipi (int, ipifunc_t);
214 #endif
215
216 extern uint64_t cpu_clockrate[];
217
218 /*
219 * Arguments to hardclock, softclock and gatherstats encapsulate the
220 * previous machine state in an opaque clockframe. The ipl is here
221 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
222 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false.
223 */
224 extern int intstack[];
225 extern int eintstack[];
226 struct clockframe {
227 struct trapframe64 t;
228 };
229
230 #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0)
231 /*
232 * XXX Disable CLKF_BASEPRI() for now. If we use a counter-timer for
233 * the clock, the interrupt remains blocked until the interrupt handler
234 * returns and we write to the clear interrupt register. If we use
235 * %tick for the clock, we could get multiple interrupts, but the
236 * currently enabled INTR_INTERLOCK will prevent the interrupt from being
237 * posted twice anyway.
238 *
239 * Switching to %tick for all machines and disabling INTR_INTERLOCK
240 * in locore.s would allow us to take advantage of CLKF_BASEPRI().
241 */
242 #if 0
243 #define CLKF_BASEPRI(framep) (((framep)->t.tf_oldpil) == 0)
244 #else
245 #define CLKF_BASEPRI(framep) (0)
246 #endif
247 #define CLKF_PC(framep) ((framep)->t.tf_pc)
248 /* Since some files in sys/kern do not know BIAS, I'm using 0x7ff here */
249 #define CLKF_INTR(framep) \
250 ((!CLKF_USERMODE(framep))&& \
251 (((framep)->t.tf_out[6] & 1 ) ? \
252 (((vaddr_t)(framep)->t.tf_out[6] < \
253 (vaddr_t)EINTSTACK-0x7ff) && \
254 ((vaddr_t)(framep)->t.tf_out[6] > \
255 (vaddr_t)INTSTACK-0x7ff)) : \
256 (((vaddr_t)(framep)->t.tf_out[6] < \
257 (vaddr_t)EINTSTACK) && \
258 ((vaddr_t)(framep)->t.tf_out[6] > \
259 (vaddr_t)INTSTACK))))
260
261
262 extern struct intrhand soft01intr, soft01net, soft01clock;
263
264 void setsoftint(void);
265 void setsoftnet(void);
266
267 /*
268 * Preempt the current process if in interrupt from user mode,
269 * or after the current trap/syscall if in system mode.
270 */
271 #define cpu_need_resched(ci) (want_resched = 1, want_ast = 1)
272
273 /*
274 * Give a profiling tick to the current process when the user profiling
275 * buffer pages are invalid. On the sparc, request an ast to send us
276 * through trap(), marking the proc as needing a profiling tick.
277 */
278 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, want_ast = 1)
279
280 /*
281 * Notify the current process (l) that it has a signal pending,
282 * process as soon as possible.
283 */
284 #define cpu_signotify(l) (want_ast = 1)
285
286 /*
287 * Interrupt handler chains. Interrupt handlers should return 0 for
288 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a
289 * handler into the list. The handler is called with its (single)
290 * argument, or with a pointer to a clockframe if ih_arg is NULL.
291 */
292 struct intrhand {
293 int (*ih_fun)(void *);
294 void *ih_arg;
295 short ih_number; /* interrupt number */
296 /* the H/W provides */
297 char ih_pil; /* interrupt priority */
298 struct intrhand *ih_next; /* global list */
299 struct intrhand *ih_pending; /* interrupt queued */
300 volatile uint64_t *ih_map; /* Interrupt map reg */
301 volatile uint64_t *ih_clr; /* clear interrupt reg */
302 };
303 extern struct intrhand *intrhand[];
304 extern struct intrhand *intrlev[MAXINTNUM];
305
306 void intr_establish(int level, struct intrhand *);
307
308 /* disksubr.c */
309 struct dkbad;
310 int isbad(struct dkbad *bt, int, int, int);
311 /* machdep.c */
312 caddr_t reserve_dumppages(caddr_t);
313 /* clock.c */
314 struct timeval;
315 int tickintr(void *); /* level 10 (tick) interrupt code */
316 int clockintr(void *); /* level 10 (clock) interrupt code */
317 int statintr(void *); /* level 14 (statclock) interrupt code */
318 /* locore.s */
319 struct fpstate64;
320 void savefpstate(struct fpstate64 *);
321 void loadfpstate(struct fpstate64 *);
322 void clearfpstate(void);
323 uint64_t probeget(paddr_t, int, int);
324 int probeset(paddr_t, int, int, uint64_t);
325
326 #define write_all_windows() __asm volatile("flushw" : : )
327 #define write_user_windows() __asm volatile("flushw" : : )
328
329 void proc_trampoline(void);
330 struct pcb;
331 void snapshot(struct pcb *);
332 struct frame *getfp(void);
333 void switchtoctx(int);
334 /* trap.c */
335 void kill_user_windows(struct lwp *);
336 int rwindow_save(struct lwp *);
337 /* cons.c */
338 int cnrom(void);
339 /* zs.c */
340 void zsconsole(struct tty *, int, int, void (**)(struct tty *, int));
341 /* fb.c */
342 void fb_unblank(void);
343 /* kgdb_stub.c */
344 #ifdef KGDB
345 void kgdb_attach(int (*)(void *), void (*)(void *, int), void *);
346 void kgdb_connect(int);
347 void kgdb_panic(void);
348 #endif
349 /* emul.c */
350 int fixalign(struct lwp *, struct trapframe64 *);
351 int emulinstr(vaddr_t, struct trapframe64 *);
352
353 #endif /* _KERNEL */
354 #endif /* _CPU_H_ */
355