cpu.h revision 1.6
1 /* $NetBSD: cpu.h,v 1.6 1999/05/30 02:37:10 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 45 */ 46 47 #ifndef _CPU_H_ 48 #define _CPU_H_ 49 50 /* 51 * CTL_MACHDEP definitions. 52 */ 53 #define CPU_MAXID 1 /* no valid machdep ids */ 54 55 #define CTL_MACHDEP_NAMES { \ 56 { 0, 0 }, \ 57 } 58 59 #ifdef _KERNEL 60 /* 61 * Exported definitions unique to SPARC cpu support. 62 */ 63 64 #include <machine/psl.h> 65 #include <machine/reg.h> 66 #include <machine/intr.h> 67 #include <sparc64/sparc64/intreg.h> 68 69 /* 70 * definitions of cpu-dependent requirements 71 * referenced in generic code 72 */ 73 #define cpu_swapin(p) /* nothing */ 74 #define cpu_swapout(p) /* nothing */ 75 #define cpu_wait(p) /* nothing */ 76 77 /* 78 * Arguments to hardclock, softclock and gatherstats encapsulate the 79 * previous machine state in an opaque clockframe. The ipl is here 80 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 81 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 82 */ 83 /* 84 * Note: we have to do something to make sure this matches the definition 85 * of trapframe in reg.h. 86 */ 87 #if 0 88 struct clockframe { 89 u_int64_t tstate; /* pstate before interrupt, excluding PSR_ET */ 90 u_int64_t pc; /* pc at interrupt */ 91 u_int64_t npc; /* npc at interrupt */ 92 u_int64_t faultaddr; /* faulting addr -- not used */ 93 u_int64_t oldfp; /* location of prev trapframe */ 94 u_int pil; /* actual interrupt priority level */ 95 u_int oldpil; /* priority before interrupt */ 96 u_int64_t fp; /* %fp at interrupt */ 97 }; 98 typedef const struct clockframe clockframe; 99 extern int eintstack[]; 100 101 #define CLKF_USERMODE(framep) (((framep)->tstate & TSTATE_PRIV) == 0) 102 #define CLKF_BASEPRI(framep) (((framep)->oldpil) == 0) 103 #define CLKF_PC(framep) ((framep)->pc) 104 #define CLKF_INTR(framep) (((framep)->fp < (u_int)eintstack)&&((framep)->fp > (u_int)KERNBASE)) 105 #else 106 extern int eintstack[]; 107 struct clockframe { 108 struct trapframe t; 109 }; 110 111 #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0) 112 #define CLKF_BASEPRI(framep) (((framep)->t.tf_oldpil) == 0) 113 #define CLKF_PC(framep) ((framep)->t.tf_pc) 114 #define CLKF_INTR(framep) (((framep)->t.tf_kstack < (u_int)eintstack)&&((framep)->t.tf_kstack > (u_int)KERNBASE)) 115 #endif 116 117 /* 118 * Software interrupt request `register'. 119 */ 120 union sir { 121 int sir_any; 122 char sir_which[4]; 123 } sir; 124 125 #define SIR_NET 0 126 #define SIR_CLOCK 1 127 128 #define setsoftint() ienab_bis(IE_L1) 129 #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint()) 130 #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint()) 131 132 int want_ast; 133 134 /* 135 * Preempt the current process if in interrupt from user mode, 136 * or after the current trap/syscall if in system mode. 137 */ 138 int want_resched; /* resched() was called */ 139 #define need_resched() (want_resched = 1, want_ast = 1) 140 141 /* 142 * Give a profiling tick to the current process when the user profiling 143 * buffer pages are invalid. On the sparc, request an ast to send us 144 * through trap(), marking the proc as needing a profiling tick. 145 */ 146 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1) 147 148 /* 149 * Notify the current process (p) that it has a signal pending, 150 * process as soon as possible. 151 */ 152 #define signotify(p) (want_ast = 1) 153 154 /* 155 * Only one process may own the FPU state. 156 * 157 * XXX this must be per-cpu (eventually) 158 */ 159 struct proc *fpproc; /* FPU owner */ 160 int foundfpu; /* true => we have an FPU */ 161 162 /* 163 * Interrupt handler chains. Interrupt handlers should return 0 for 164 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 165 * handler into the list. The handler is called with its (single) 166 * argument, or with a pointer to a clockframe if ih_arg is NULL. 167 */ 168 struct intrhand { 169 int (*ih_fun) __P((void *)); 170 void *ih_arg; 171 short ih_number; /* interrupt number the H/W provides */ 172 short ih_pil; /* interrupt priority */ 173 struct intrhand *ih_next; 174 u_int64_t *ih_map; /* Interrupt map register */ 175 u_int64_t *ih_clr; /* clear interrupt register */ 176 }; 177 extern struct intrhand *intrhand[15]; 178 extern struct intrhand *intrlev[MAXINTNUM]; 179 180 void intr_establish __P((int level, struct intrhand *)); 181 182 /* 183 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast'' 184 * interrupt vectors (vectors that are not shared and are handled in the 185 * trap window). Such functions must be written in assembly. 186 * 187 * This should be removed for sun4u. 188 */ 189 void intr_fasttrap __P((int level, void (*vec)(void))); 190 191 /* disksubr.c */ 192 struct dkbad; 193 int isbad __P((struct dkbad *bt, int, int, int)); 194 /* machdep.c */ 195 int ldcontrolb __P((caddr_t)); 196 void dumpconf __P((void)); 197 caddr_t reserve_dumppages __P((caddr_t)); 198 /* clock.c */ 199 struct timeval; 200 void lo_microtime __P((struct timeval *)); 201 int statintr __P((void *)); 202 int clockintr __P((void *));/* level 10 (clock) interrupt code */ 203 int statintr __P((void *)); /* level 14 (statclock) interrupt code */ 204 /* locore.s */ 205 struct fpstate; 206 void savefpstate __P((struct fpstate *)); 207 void loadfpstate __P((struct fpstate *)); 208 int probeget __P((caddr_t, int)); 209 #if 0 210 void write_all_windows __P((void)); 211 void write_user_windows __P((void)); 212 #else 213 #define write_all_windows() __asm __volatile("flushw" : : ) 214 #define write_user_windows() __asm __volatile("flushw" : : ) 215 #endif 216 void proc_trampoline __P((void)); 217 struct pcb; 218 void snapshot __P((struct pcb *)); 219 struct frame *getfp __P((void)); 220 int xldcontrolb __P((caddr_t, struct pcb *)); 221 void copywords __P((const void *, void *, size_t)); 222 void qcopy __P((const void *, void *, size_t)); 223 void qzero __P((void *, size_t)); 224 void switchtoctx __P((int)); 225 /* locore2.c */ 226 void remrq __P((struct proc *)); 227 /* trap.c */ 228 void kill_user_windows __P((struct proc *)); 229 int rwindow_save __P((struct proc *)); 230 void child_return __P((void *)); 231 /* amd7930intr.s */ 232 void amd7930_trap __P((void)); 233 /* cons.c */ 234 int cnrom __P((void)); 235 /* zs.c */ 236 void zsconsole __P((struct tty *, int, int, void (**)(struct tty *, int))); 237 #ifdef KGDB 238 void zs_kgdb_init __P((void)); 239 #endif 240 /* fb.c */ 241 void fb_unblank __P((void)); 242 /* kgdb_stub.c */ 243 #ifdef KGDB 244 void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *)); 245 void kgdb_connect __P((int)); 246 void kgdb_panic __P((void)); 247 #endif 248 /* iommu.c */ 249 void iommu_enter __P((u_int, u_int)); 250 void iommu_remove __P((u_int, u_int)); 251 /* emul.c */ 252 int fixalign __P((struct proc *, struct trapframe *)); 253 int emulinstr __P((vaddr_t, struct trapframe *)); 254 255 /* 256 * 257 * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 258 * of the trap vector table. The next eight bits are supplied by the 259 * hardware when the trap occurs, and the bottom four bits are always 260 * zero (so that we can shove up to 16 bytes of executable code---exactly 261 * four instructions---into each trap vector). 262 * 263 * The hardware allocates half the trap vectors to hardware and half to 264 * software. 265 * 266 * Traps have priorities assigned (lower number => higher priority). 267 */ 268 269 struct trapvec { 270 int tv_instr[8]; /* the eight instructions */ 271 }; 272 extern struct trapvec *trapbase; /* the 256 vectors */ 273 274 extern void wzero __P((void *, u_int)); 275 extern void wcopy __P((const void *, void *, u_int)); 276 277 #endif /* _KERNEL */ 278 #endif /* _CPU_H_ */ 279
Indexes created Thu Sep 25 02:09:54 GMT 2025