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cpu.h revision 1.74
      1 /*	$NetBSD: cpu.h,v 1.74 2008/02/28 11:50:40 martin Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. Neither the name of the University nor the names of its contributors
     25  *    may be used to endorse or promote products derived from this software
     26  *    without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     38  * SUCH DAMAGE.
     39  *
     40  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     41  */
     42 
     43 #ifndef _CPU_H_
     44 #define _CPU_H_
     45 
     46 /*
     47  * CTL_MACHDEP definitions.
     48  */
     49 #define	CPU_BOOTED_KERNEL	1	/* string: booted kernel name */
     50 #define	CPU_BOOTED_DEVICE	2	/* string: device booted from */
     51 #define	CPU_BOOT_ARGS		3	/* string: args booted with */
     52 #define	CPU_ARCH		4	/* integer: cpu architecture version */
     53 #define	CPU_MAXID		5	/* number of valid machdep ids */
     54 
     55 #ifdef _KERNEL
     56 /*
     57  * Exported definitions unique to SPARC cpu support.
     58  */
     59 
     60 #if defined(_KERNEL_OPT)
     61 #include "opt_multiprocessor.h"
     62 #include "opt_lockdebug.h"
     63 #endif
     64 
     65 #include <machine/psl.h>
     66 #include <machine/reg.h>
     67 #include <machine/pte.h>
     68 #include <machine/intr.h>
     69 #include <machine/cpuset.h>
     70 #include <sparc64/sparc64/intreg.h>
     71 
     72 #include <sys/cpu_data.h>
     73 /*
     74  * The cpu_info structure is part of a 64KB structure mapped both the kernel
     75  * pmap and a single locked TTE a CPUINFO_VA for that particular processor.
     76  * Each processor's cpu_info is accessible at CPUINFO_VA only for that
     77  * processor.  Other processors can access that through an additional mapping
     78  * in the kernel pmap.
     79  *
     80  * The 64KB page contains:
     81  *
     82  * cpu_info
     83  * interrupt stack (all remaining space)
     84  * idle PCB
     85  * idle stack (STACKSPACE - sizeof(PCB))
     86  * 32KB TSB
     87  */
     88 
     89 struct cpu_info {
     90 
     91 	/*
     92 	 * SPARC cpu_info structures live at two VAs: one global
     93 	 * VA (so each CPU can access any other CPU's cpu_info)
     94 	 * and an alias VA CPUINFO_VA which is the same on each
     95 	 * CPU and maps to that CPU's cpu_info.  Since the alias
     96 	 * CPUINFO_VA is how we locate our cpu_info, we have to
     97 	 * self-reference the global VA so that we can return it
     98 	 * in the curcpu() macro.
     99 	 */
    100 	struct cpu_info * volatile ci_self;
    101 
    102 	/* Most important fields first */
    103 	struct lwp		*ci_curlwp;
    104 	struct pcb		*ci_cpcb;
    105 	struct cpu_info		*ci_next;
    106 
    107 	struct lwp		*ci_fplwp;
    108 
    109 	void			*ci_eintstack;
    110 
    111 	int			ci_mtx_count;
    112 	int			ci_mtx_oldspl;
    113 
    114 	/* Spinning up the CPU */
    115 	void			(*ci_spinup)(void);
    116 	paddr_t			ci_paddr;
    117 
    118 	int			ci_cpuid;
    119 
    120 	/* CPU PROM information. */
    121 	u_int			ci_node;
    122 
    123 	/* %tick and cpu frequency information */
    124 	u_long			ci_tick_increment;
    125 	uint64_t		ci_cpu_clockrate[2];
    126 
    127 	int			ci_flags;
    128 	int			ci_want_ast;
    129 	int			ci_want_resched;
    130 	int			ci_idepth;
    131 
    132 /*
    133  * A context is simply a small number that differentiates multiple mappings
    134  * of the same address.  Contexts on the spitfire are 13 bits, but could
    135  * be as large as 17 bits.
    136  *
    137  * Each context is either free or attached to a pmap.
    138  *
    139  * The context table is an array of pointers to psegs.  Just dereference
    140  * the right pointer and you get to the pmap segment tables.  These are
    141  * physical addresses, of course.
    142  *
    143  */
    144 	int			ci_pmap_next_ctx;
    145 	paddr_t 		*ci_ctxbusy;
    146 	LIST_HEAD(, pmap) 	ci_pmap_ctxlist;
    147 	int			ci_numctx;
    148 
    149 	/*
    150 	 * The TSBs are per cpu too (since MMU context differs between
    151 	 * cpus). These are just caches for the TLBs.
    152 	 */
    153 	pte_t			*ci_tsb_dmmu;
    154 	pte_t			*ci_tsb_immu;
    155 
    156 	struct cpu_data		ci_data;	/* MI per-cpu data */
    157 
    158 	volatile void		*ci_ddb_regs;	/* DDB regs */
    159 };
    160 
    161 #define CPUF_PRIMARY	1
    162 
    163 /*
    164  * CPU boot arguments. Used by secondary CPUs at the bootstrap time.
    165  */
    166 struct cpu_bootargs {
    167 	u_int	cb_node;	/* PROM CPU node */
    168 	volatile int cb_flags;
    169 
    170 	vaddr_t cb_ktext;
    171 	paddr_t cb_ktextp;
    172 	vaddr_t cb_ektext;
    173 
    174 	vaddr_t cb_kdata;
    175 	paddr_t cb_kdatap;
    176 	vaddr_t cb_ekdata;
    177 
    178 	paddr_t	cb_cpuinfo;
    179 };
    180 
    181 extern struct cpu_bootargs *cpu_args;
    182 
    183 extern int sparc_ncpus;
    184 extern struct cpu_info *cpus;
    185 
    186 #define	curcpu()	(((struct cpu_info *)CPUINFO_VA)->ci_self)
    187 #define	cpu_number()	(curcpu()->ci_index)
    188 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    189 
    190 #define CPU_INFO_ITERATOR		int
    191 #define CPU_INFO_FOREACH(cii, ci)	cii = 0, ci = cpus; ci != NULL; \
    192 					ci = ci->ci_next
    193 
    194 #define curlwp		curcpu()->ci_curlwp
    195 #define fplwp		curcpu()->ci_fplwp
    196 #define curpcb		curcpu()->ci_cpcb
    197 
    198 #define want_ast	curcpu()->ci_want_ast
    199 #define want_resched	curcpu()->ci_want_resched
    200 
    201 /*
    202  * definitions of cpu-dependent requirements
    203  * referenced in generic code
    204  */
    205 #define	cpu_swapin(p)	/* nothing */
    206 #define	cpu_swapout(p)	/* nothing */
    207 #define	cpu_wait(p)	/* nothing */
    208 void cpu_proc_fork(struct proc *, struct proc *);
    209 
    210 /* run on the cpu itself */
    211 void	cpu_pmap_init(struct cpu_info *);
    212 /* run upfront to prepare the cpu_info */
    213 void	cpu_pmap_prepare(struct cpu_info *, bool);
    214 
    215 #if defined(MULTIPROCESSOR)
    216 extern vaddr_t cpu_spinup_trampoline;
    217 
    218 extern  char   *mp_tramp_code;
    219 extern  u_long  mp_tramp_code_len;
    220 extern  u_long  mp_tramp_tlb_slots;
    221 extern  u_long  mp_tramp_func;
    222 extern  u_long  mp_tramp_ci;
    223 
    224 void	cpu_hatch(void);
    225 void	cpu_boot_secondary_processors(void);
    226 
    227 /*
    228  * Call a function on other cpus:
    229  *	multicast - send to everyone in the sparc64_cpuset_t
    230  *	broadcast - send to to all cpus but ourselves
    231  *	send - send to just this cpu
    232  */
    233 typedef void (* ipifunc_t)(void *);
    234 
    235 void	sparc64_multicast_ipi (sparc64_cpuset_t, ipifunc_t, uint64_t);
    236 void	sparc64_broadcast_ipi (ipifunc_t, uint64_t);
    237 void	sparc64_send_ipi (int, ipifunc_t, uint64_t);
    238 #endif
    239 
    240 /*
    241  * Arguments to hardclock, softclock and gatherstats encapsulate the
    242  * previous machine state in an opaque clockframe.  The ipl is here
    243  * as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
    244  * Note that CLKF_INTR is valid only if CLKF_USERMODE is false.
    245  */
    246 struct clockframe {
    247 	struct trapframe64 t;
    248 };
    249 
    250 #define	CLKF_USERMODE(framep)	(((framep)->t.tf_tstate & TSTATE_PRIV) == 0)
    251 #define	CLKF_PC(framep)		((framep)->t.tf_pc)
    252 /* Since some files in sys/kern do not know BIAS, I'm using 0x7ff here */
    253 #define	CLKF_INTR(framep)						\
    254 	((!CLKF_USERMODE(framep))&&					\
    255 		(((framep)->t.tf_out[6] & 1 ) ?				\
    256 			(((vaddr_t)(framep)->t.tf_out[6] <		\
    257 				(vaddr_t)EINTSTACK-0x7ff) &&		\
    258 			((vaddr_t)(framep)->t.tf_out[6] >		\
    259 				(vaddr_t)INTSTACK-0x7ff)) :		\
    260 			(((vaddr_t)(framep)->t.tf_out[6] <		\
    261 				(vaddr_t)EINTSTACK) &&			\
    262 			((vaddr_t)(framep)->t.tf_out[6] >		\
    263 				(vaddr_t)INTSTACK))))
    264 
    265 
    266 extern struct intrhand soft01intr, soft01net, soft01clock;
    267 
    268 void setsoftint(void);
    269 void setsoftnet(void);
    270 
    271 /*
    272  * Give a profiling tick to the current process when the user profiling
    273  * buffer pages are invalid.  On the sparc, request an ast to send us
    274  * through trap(), marking the proc as needing a profiling tick.
    275  */
    276 #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, want_ast = 1)
    277 
    278 /*
    279  * Notify the current process (l) that it has a signal pending,
    280  * process as soon as possible.
    281  */
    282 #define	cpu_signotify(l)	(want_ast = 1)
    283 
    284 /*
    285  * Interrupt handler chains.  Interrupt handlers should return 0 for
    286  * ``not me'' or 1 (``I took care of it'').  intr_establish() inserts a
    287  * handler into the list.  The handler is called with its (single)
    288  * argument, or with a pointer to a clockframe if ih_arg is NULL.
    289  */
    290 struct intrhand {
    291 	int			(*ih_fun)(void *);
    292 	void			*ih_arg;
    293 	/* if we have to take the biglock, we interpose a wrapper
    294 	 * and need to save the original function and arg */
    295 	int			(*ih_realfun)(void *);
    296 	void			*ih_realarg;
    297 	short			ih_number;	/* interrupt number */
    298 						/* the H/W provides */
    299 	char			ih_pil;		/* interrupt priority */
    300 	struct intrhand		*ih_next;	/* global list */
    301 	struct intrhand		*ih_pending;	/* interrupt queued */
    302 	volatile uint64_t	*ih_map;	/* Interrupt map reg */
    303 	volatile uint64_t	*ih_clr;	/* clear interrupt reg */
    304 };
    305 extern struct intrhand *intrhand[];
    306 extern struct intrhand *intrlev[MAXINTNUM];
    307 
    308 void	intr_establish(int level, struct intrhand *);
    309 
    310 /* disksubr.c */
    311 struct dkbad;
    312 int isbad(struct dkbad *bt, int, int, int);
    313 /* machdep.c */
    314 void *	reserve_dumppages(void *);
    315 /* clock.c */
    316 struct timeval;
    317 int	tickintr(void *);	/* level 10 (tick) interrupt code */
    318 int	clockintr(void *);	/* level 10 (clock) interrupt code */
    319 int	statintr(void *);	/* level 14 (statclock) interrupt code */
    320 /* locore.s */
    321 struct fpstate64;
    322 void	savefpstate(struct fpstate64 *);
    323 void	loadfpstate(struct fpstate64 *);
    324 void	clearfpstate(void);
    325 uint64_t	probeget(paddr_t, int, int);
    326 int	probeset(paddr_t, int, int, uint64_t);
    327 
    328 #define	 write_all_windows() __asm volatile("flushw" : : )
    329 #define	 write_user_windows() __asm volatile("flushw" : : )
    330 
    331 void 	lwp_trampoline(void);
    332 struct pcb;
    333 void	snapshot(struct pcb *);
    334 struct frame *getfp(void);
    335 void	switchtoctx(int);
    336 /* trap.c */
    337 void	kill_user_windows(struct lwp *);
    338 int	rwindow_save(struct lwp *);
    339 /* cons.c */
    340 int	cnrom(void);
    341 /* zs.c */
    342 void zsconsole(struct tty *, int, int, void (**)(struct tty *, int));
    343 /* fb.c */
    344 void	fb_unblank(void);
    345 /* kgdb_stub.c */
    346 #ifdef KGDB
    347 void kgdb_attach(int (*)(void *), void (*)(void *, int), void *);
    348 void kgdb_connect(int);
    349 void kgdb_panic(void);
    350 #endif
    351 /* emul.c */
    352 int	fixalign(struct lwp *, struct trapframe64 *);
    353 int	emulinstr(vaddr_t, struct trapframe64 *);
    354 
    355 #endif /* _KERNEL */
    356 #endif /* _CPU_H_ */
    357