cpu.h revision 1.9
1 /* $NetBSD: cpu.h,v 1.9 1999/06/05 21:58:18 eeh Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 45 */ 46 47 #ifndef _CPU_H_ 48 #define _CPU_H_ 49 50 /* 51 * CTL_MACHDEP definitions. 52 */ 53 #define CPU_MAXID 1 /* no valid machdep ids */ 54 55 #define CTL_MACHDEP_NAMES { \ 56 { 0, 0 }, \ 57 } 58 59 #ifdef _KERNEL 60 /* 61 * Exported definitions unique to SPARC cpu support. 62 */ 63 64 #include <machine/psl.h> 65 #include <machine/reg.h> 66 #include <machine/intr.h> 67 #include <sparc64/sparc64/intreg.h> 68 69 /* 70 * definitions of cpu-dependent requirements 71 * referenced in generic code 72 */ 73 #define cpu_swapin(p) /* nothing */ 74 #define cpu_swapout(p) /* nothing */ 75 #define cpu_wait(p) /* nothing */ 76 77 /* 78 * Arguments to hardclock, softclock and gatherstats encapsulate the 79 * previous machine state in an opaque clockframe. The ipl is here 80 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 81 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 82 */ 83 extern int eintstack[]; 84 struct clockframe { 85 struct trapframe t; 86 }; 87 88 #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0) 89 #define CLKF_BASEPRI(framep) (((framep)->t.tf_oldpil) == 0) 90 #define CLKF_PC(framep) ((framep)->t.tf_pc) 91 #define CLKF_INTR(framep) (((framep)->t.tf_kstack < (u_int)eintstack)&&((framep)->t.tf_kstack > (u_int)KERNBASE)) 92 93 /* 94 * Software interrupt request `register'. 95 */ 96 union sir { 97 int sir_any; 98 char sir_which[4]; 99 } sir; 100 101 #define SIR_NET 0 102 #define SIR_CLOCK 1 103 104 #define setsoftint() ienab_bis(IE_L1) 105 #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint()) 106 #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint()) 107 108 int want_ast; 109 110 /* 111 * Preempt the current process if in interrupt from user mode, 112 * or after the current trap/syscall if in system mode. 113 */ 114 int want_resched; /* resched() was called */ 115 #define need_resched() (want_resched = 1, want_ast = 1) 116 117 /* 118 * Give a profiling tick to the current process when the user profiling 119 * buffer pages are invalid. On the sparc, request an ast to send us 120 * through trap(), marking the proc as needing a profiling tick. 121 */ 122 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1) 123 124 /* 125 * Notify the current process (p) that it has a signal pending, 126 * process as soon as possible. 127 */ 128 #define signotify(p) (want_ast = 1) 129 130 /* 131 * Only one process may own the FPU state. 132 * 133 * XXX this must be per-cpu (eventually) 134 */ 135 struct proc *fpproc; /* FPU owner */ 136 int foundfpu; /* true => we have an FPU */ 137 138 /* 139 * Interrupt handler chains. Interrupt handlers should return 0 for 140 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 141 * handler into the list. The handler is called with its (single) 142 * argument, or with a pointer to a clockframe if ih_arg is NULL. 143 */ 144 struct intrhand { 145 int (*ih_fun) __P((void *)); 146 void *ih_arg; 147 short ih_number; /* interrupt number the H/W provides */ 148 short ih_pil; /* interrupt priority */ 149 struct intrhand *ih_next; 150 u_int64_t *ih_map; /* Interrupt map register */ 151 u_int64_t *ih_clr; /* clear interrupt register */ 152 }; 153 extern struct intrhand *intrhand[15]; 154 extern struct intrhand *intrlev[MAXINTNUM]; 155 156 void intr_establish __P((int level, struct intrhand *)); 157 158 /* 159 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast'' 160 * interrupt vectors (vectors that are not shared and are handled in the 161 * trap window). Such functions must be written in assembly. 162 * 163 * This should be removed for sun4u. 164 */ 165 void intr_fasttrap __P((int level, void (*vec)(void))); 166 167 /* disksubr.c */ 168 struct dkbad; 169 int isbad __P((struct dkbad *bt, int, int, int)); 170 /* machdep.c */ 171 int ldcontrolb __P((caddr_t)); 172 void dumpconf __P((void)); 173 caddr_t reserve_dumppages __P((caddr_t)); 174 /* clock.c */ 175 struct timeval; 176 int tickintr __P((void *)); /* level 10 (tick) interrupt code */ 177 int clockintr __P((void *));/* level 10 (clock) interrupt code */ 178 int statintr __P((void *)); /* level 14 (statclock) interrupt code */ 179 /* locore.s */ 180 struct fpstate; 181 void savefpstate __P((struct fpstate *)); 182 void loadfpstate __P((struct fpstate *)); 183 int probeget __P((paddr_t, int, int)); 184 int probeset __P((paddr_t, int, int, u_int64_t)); 185 #if 0 186 void write_all_windows __P((void)); 187 void write_user_windows __P((void)); 188 #else 189 #define write_all_windows() __asm __volatile("flushw" : : ) 190 #define write_user_windows() __asm __volatile("flushw" : : ) 191 #endif 192 void proc_trampoline __P((void)); 193 struct pcb; 194 void snapshot __P((struct pcb *)); 195 struct frame *getfp __P((void)); 196 int xldcontrolb __P((caddr_t, struct pcb *)); 197 void copywords __P((const void *, void *, size_t)); 198 void qcopy __P((const void *, void *, size_t)); 199 void qzero __P((void *, size_t)); 200 void switchtoctx __P((int)); 201 /* locore2.c */ 202 void remrq __P((struct proc *)); 203 /* trap.c */ 204 void kill_user_windows __P((struct proc *)); 205 int rwindow_save __P((struct proc *)); 206 void child_return __P((void *)); 207 /* amd7930intr.s */ 208 void amd7930_trap __P((void)); 209 /* cons.c */ 210 int cnrom __P((void)); 211 /* zs.c */ 212 void zsconsole __P((struct tty *, int, int, void (**)(struct tty *, int))); 213 #ifdef KGDB 214 void zs_kgdb_init __P((void)); 215 #endif 216 /* fb.c */ 217 void fb_unblank __P((void)); 218 /* kgdb_stub.c */ 219 #ifdef KGDB 220 void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *)); 221 void kgdb_connect __P((int)); 222 void kgdb_panic __P((void)); 223 #endif 224 /* iommu.c */ 225 void iommu_enter __P((u_int, u_int)); 226 void iommu_remove __P((u_int, u_int)); 227 /* emul.c */ 228 int fixalign __P((struct proc *, struct trapframe *)); 229 int emulinstr __P((vaddr_t, struct trapframe *)); 230 231 /* 232 * 233 * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 234 * of the trap vector table. The next eight bits are supplied by the 235 * hardware when the trap occurs, and the bottom four bits are always 236 * zero (so that we can shove up to 16 bytes of executable code---exactly 237 * four instructions---into each trap vector). 238 * 239 * The hardware allocates half the trap vectors to hardware and half to 240 * software. 241 * 242 * Traps have priorities assigned (lower number => higher priority). 243 */ 244 245 struct trapvec { 246 int tv_instr[8]; /* the eight instructions */ 247 }; 248 extern struct trapvec *trapbase; /* the 256 vectors */ 249 250 extern void wzero __P((void *, u_int)); 251 extern void wcopy __P((const void *, void *, u_int)); 252 253 #endif /* _KERNEL */ 254 #endif /* _CPU_H_ */ 255
Indexes created Wed Sep 24 15:09:51 GMT 2025