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intr.h revision 1.24 
      1 /*	$NetBSD: intr.h,v 1.24 2008/04/22 17:09:25 nakayama Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Paul Kranenburg.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #ifndef _SPARC64_INTR_H_
     40 #define _SPARC64_INTR_H_
     41 
     42 #if defined(_KERNEL_OPT)
     43 #include "opt_multiprocessor.h"
     44 #endif
     45 
     46 #ifndef _LOCORE
     47 #include <machine/cpuset.h>
     48 #endif
     49 #include <machine/psl.h>
     50 
     51 /* XXX - arbitrary numbers; no interpretation is defined yet */
     52 #define	IPL_NONE	0		/* nothing */
     53 #define	IPL_SOFTCLOCK	1		/* timeouts */
     54 #define	IPL_SOFTBIO	1		/* block I/O */
     55 #define	IPL_SOFTNET	1		/* protocol stack */
     56 #define	IPL_SOFTSERIAL	4		/* serial */
     57 #define	IPL_VM		PIL_VM		/* memory allocation */
     58 #define	IPL_SCHED	PIL_SCHED	/* scheduler */
     59 #define	IPL_HIGH	PIL_HIGH	/* everything */
     60 #define	IPL_HALT	5		/* cpu stop-self */
     61 #define	IPL_PAUSE	13		/* pause cpu */
     62 #define	IPL_FDSOFT	PIL_FDSOFT	/* floppy */
     63 
     64 #ifndef _LOCORE
     65 void fpusave_lwp(struct lwp *, bool);
     66 #endif	/* _LOCORE */
     67 
     68 #if defined(MULTIPROCESSOR)
     69 #ifndef _LOCORE
     70 void	sparc64_ipi_init (void);
     71 int	sparc64_ipi_halt_thiscpu (void *);
     72 int	sparc64_ipi_pause_thiscpu (void *);
     73 void	sparc64_do_pause(void);
     74 void	sparc64_ipi_drop_fpstate (void *);
     75 void	sparc64_ipi_save_fpstate (void *);
     76 void	sparc64_ipi_nop (void *);
     77 void	mp_halt_cpus (void);
     78 void	mp_pause_cpus (void);
     79 void	mp_resume_cpus (void);
     80 int	mp_cpu_is_paused (sparc64_cpuset_t);
     81 void	mp_resume_cpu(int);
     82 #endif	/* _LOCORE */
     83 
     84 #define IPI_EVCNT_TLB_PTE	0
     85 #define IPI_EVCNT_TLB_CTX	1
     86 #define IPI_EVCNT_TLB_ALL	2
     87 #define IPI_EVCNT_FPU_SYNCH	3
     88 #define IPI_EVCNT_FPU_FLUSH	4
     89 #define IPI_EVCNT_NUM		5
     90 #define IPI_EVCNT_NAMES { "TLB pte IPI", "TLB ctx IPI", "TLB all IPI", \
     91 			  "FPU synch IPI", "FPU flush IPI" }
     92 #endif
     93 
     94 #endif /* _SPARC64_INTR_H_ */
     95