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pci_machdep.h revision 1.7
      1  1.7       eeh /* $NetBSD: pci_machdep.h,v 1.7 2001/07/20 00:07:14 eeh Exp $ */
      2  1.1       mrg 
      3  1.1       mrg /*
      4  1.1       mrg  * Copyright (c) 1999 Matthew R. Green
      5  1.1       mrg  * All rights reserved.
      6  1.1       mrg  *
      7  1.1       mrg  * Redistribution and use in source and binary forms, with or without
      8  1.1       mrg  * modification, are permitted provided that the following conditions
      9  1.1       mrg  * are met:
     10  1.1       mrg  * 1. Redistributions of source code must retain the above copyright
     11  1.1       mrg  *    notice, this list of conditions and the following disclaimer.
     12  1.1       mrg  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1       mrg  *    notice, this list of conditions and the following disclaimer in the
     14  1.1       mrg  *    documentation and/or other materials provided with the distribution.
     15  1.1       mrg  * 3. The name of the author may not be used to endorse or promote products
     16  1.1       mrg  *    derived from this software without specific prior written permission.
     17  1.1       mrg  *
     18  1.1       mrg  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  1.1       mrg  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20  1.1       mrg  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  1.1       mrg  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  1.1       mrg  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     23  1.1       mrg  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     24  1.1       mrg  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     25  1.1       mrg  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     26  1.1       mrg  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27  1.1       mrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28  1.1       mrg  * SUCH DAMAGE.
     29  1.1       mrg  */
     30  1.1       mrg 
     31  1.1       mrg #ifndef _MACHINE_PCI_MACHDEP_H_
     32  1.1       mrg #define _MACHINE_PCI_MACHDEP_H_
     33  1.1       mrg 
     34  1.1       mrg /*
     35  1.6       mrg  * We want to contro both device & function probe order.
     36  1.6       mrg  */
     37  1.6       mrg #define		__PCI_BUS_DEVORDER
     38  1.6       mrg #define		__PCI_DEV_FUNCORDER
     39  1.6       mrg 
     40  1.6       mrg /*
     41  1.5  sommerfe  * Forward declarations.
     42  1.5  sommerfe  */
     43  1.5  sommerfe struct pci_attach_args;
     44  1.5  sommerfe 
     45  1.5  sommerfe /*
     46  1.1       mrg  * define some bits used to glue into the common PCI code.
     47  1.1       mrg  */
     48  1.1       mrg 
     49  1.1       mrg typedef struct sparc_pci_chipset *pci_chipset_tag_t;
     50  1.1       mrg typedef u_int pci_intr_handle_t;
     51  1.1       mrg 
     52  1.1       mrg struct sparc_pci_chipset {
     53  1.2       eeh 	void			*cookie;	/* psycho_pbm, but sssh! */
     54  1.7       eeh 	int			rootnode;	/* PCI controller */
     55  1.7       eeh 	int			curnode;	/* Current OFW node */
     56  1.1       mrg };
     57  1.7       eeh 
     58  1.7       eeh /*
     59  1.7       eeh  * The stuuuuuuupid allegedly MI PCI code expects pcitag_t to be a
     60  1.7       eeh  * scalar type.  But we really need to store both the OFW node and
     61  1.7       eeh  * the bus/device/function info in it.  (We'd like to store more,
     62  1.7       eeh  * like all the ofw properties, but we don't need to.)  Luckily,
     63  1.7       eeh  * both are 32-bit values, so we can squeeze them into a u_int64_t
     64  1.7       eeh  * with a little help from some macros.
     65  1.7       eeh  */
     66  1.7       eeh 
     67  1.7       eeh #define	PCITAG_NODE(x)		(int)(((x)>>32)&0xffffffff)
     68  1.7       eeh #define	PCITAG_OFFSET(x)	((x)&0xffffffff)
     69  1.7       eeh #define	PCITAG_CREATE(n,b,d,f)	(((u_int64_t)(n)<<32)|((b)<<16)|((d)<<11)|((f)<<8))
     70  1.7       eeh #define	PCITAG_SETNODE(t,n)	((x)&0xffffffff)|(((n)<<32)
     71  1.7       eeh typedef u_int64_t pcitag_t;
     72  1.7       eeh 
     73  1.1       mrg 
     74  1.3       cgd void		pci_attach_hook(struct device *, struct device *,
     75  1.3       cgd 				     struct pcibus_attach_args *);
     76  1.6       mrg #ifdef __PCI_BUS_DEVORDER
     77  1.6       mrg int		pci_bus_devorder(pci_chipset_tag_t, int, char *);
     78  1.6       mrg #endif
     79  1.6       mrg #ifdef __PCI_DEV_FUNCORDER
     80  1.6       mrg int		pci_dev_funcorder(pci_chipset_tag_t, int, int, char *);
     81  1.6       mrg #endif
     82  1.3       cgd int		pci_bus_maxdevs(pci_chipset_tag_t, int);
     83  1.3       cgd pcitag_t	pci_make_tag(pci_chipset_tag_t, int, int, int);
     84  1.3       cgd pcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
     85  1.3       cgd void		pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
     86  1.3       cgd 				    pcireg_t);
     87  1.5  sommerfe int		pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
     88  1.3       cgd const char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
     89  1.4       cgd const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
     90  1.3       cgd void		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
     91  1.3       cgd 					 int, int (*)(void *), void *);
     92  1.3       cgd void		pci_intr_disestablish(pci_chipset_tag_t, void *);
     93  1.1       mrg 
     94  1.1       mrg #endif /* _MACHINE_PCI_MACHDEP_H_ */
     95