pci_machdep.h revision 1.8.4.4 1 1.8.4.4 nathanw /* $NetBSD: pci_machdep.h,v 1.8.4.4 2002/06/20 03:41:25 nathanw Exp $ */
2 1.8.4.2 eeh
3 1.8.4.2 eeh /*
4 1.8.4.2 eeh * Copyright (c) 1999 Matthew R. Green
5 1.8.4.2 eeh * All rights reserved.
6 1.8.4.2 eeh *
7 1.8.4.2 eeh * Redistribution and use in source and binary forms, with or without
8 1.8.4.2 eeh * modification, are permitted provided that the following conditions
9 1.8.4.2 eeh * are met:
10 1.8.4.2 eeh * 1. Redistributions of source code must retain the above copyright
11 1.8.4.2 eeh * notice, this list of conditions and the following disclaimer.
12 1.8.4.2 eeh * 2. Redistributions in binary form must reproduce the above copyright
13 1.8.4.2 eeh * notice, this list of conditions and the following disclaimer in the
14 1.8.4.2 eeh * documentation and/or other materials provided with the distribution.
15 1.8.4.2 eeh * 3. The name of the author may not be used to endorse or promote products
16 1.8.4.2 eeh * derived from this software without specific prior written permission.
17 1.8.4.2 eeh *
18 1.8.4.2 eeh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.8.4.2 eeh * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.8.4.2 eeh * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.8.4.2 eeh * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.8.4.2 eeh * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 1.8.4.2 eeh * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24 1.8.4.2 eeh * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 1.8.4.2 eeh * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 1.8.4.2 eeh * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.8.4.2 eeh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.8.4.2 eeh * SUCH DAMAGE.
29 1.8.4.2 eeh */
30 1.8.4.2 eeh
31 1.8.4.2 eeh #ifndef _MACHINE_PCI_MACHDEP_H_
32 1.8.4.2 eeh #define _MACHINE_PCI_MACHDEP_H_
33 1.8.4.2 eeh
34 1.8.4.2 eeh /*
35 1.8.4.2 eeh * Forward declarations.
36 1.8.4.2 eeh */
37 1.8.4.2 eeh struct pci_attach_args;
38 1.8.4.2 eeh
39 1.8.4.2 eeh /*
40 1.8.4.2 eeh * define some bits used to glue into the common PCI code.
41 1.8.4.2 eeh */
42 1.8.4.2 eeh
43 1.8.4.2 eeh typedef struct sparc_pci_chipset *pci_chipset_tag_t;
44 1.8.4.2 eeh typedef u_int pci_intr_handle_t;
45 1.8.4.2 eeh
46 1.8.4.2 eeh struct sparc_pci_chipset {
47 1.8.4.2 eeh void *cookie; /* psycho_pbm, but sssh! */
48 1.8.4.2 eeh int rootnode; /* PCI controller */
49 1.8.4.2 eeh };
50 1.8.4.2 eeh
51 1.8.4.2 eeh /*
52 1.8.4.2 eeh * The stuuuuuuupid allegedly MI PCI code expects pcitag_t to be a
53 1.8.4.2 eeh * scalar type. But we really need to store both the OFW node and
54 1.8.4.2 eeh * the bus/device/function info in it. (We'd like to store more,
55 1.8.4.2 eeh * like all the ofw properties, but we don't need to.) Luckily,
56 1.8.4.2 eeh * both are 32-bit values, so we can squeeze them into a u_int64_t
57 1.8.4.2 eeh * with a little help from some macros.
58 1.8.4.2 eeh */
59 1.8.4.2 eeh
60 1.8.4.2 eeh #define PCITAG_NODE(x) (int)(((x)>>32)&0xffffffff)
61 1.8.4.2 eeh #define PCITAG_OFFSET(x) ((x)&0xffffffff)
62 1.8.4.4 nathanw #define PCITAG_BUS(t) ((PCITAG_OFFSET(t)>>16)&0xff)
63 1.8.4.4 nathanw #define PCITAG_DEV(t) ((PCITAG_OFFSET(t)>>11)&0x1f)
64 1.8.4.4 nathanw #define PCITAG_FUN(t) ((PCITAG_OFFSET(t)>>8)&0x7)
65 1.8.4.2 eeh #define PCITAG_CREATE(n,b,d,f) (((u_int64_t)(n)<<32)|((b)<<16)|((d)<<11)|((f)<<8))
66 1.8.4.2 eeh #define PCITAG_SETNODE(t,n) ((t)&0xffffffff)|(((n)<<32)
67 1.8.4.2 eeh typedef u_int64_t pcitag_t;
68 1.8.4.2 eeh
69 1.8.4.2 eeh
70 1.8.4.2 eeh void pci_attach_hook(struct device *, struct device *,
71 1.8.4.2 eeh struct pcibus_attach_args *);
72 1.8.4.2 eeh int pci_bus_maxdevs(pci_chipset_tag_t, int);
73 1.8.4.2 eeh pcitag_t pci_make_tag(pci_chipset_tag_t, int, int, int);
74 1.8.4.4 nathanw void pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
75 1.8.4.4 nathanw int *);
76 1.8.4.2 eeh pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
77 1.8.4.2 eeh void pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
78 1.8.4.2 eeh pcireg_t);
79 1.8.4.2 eeh int pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
80 1.8.4.2 eeh const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
81 1.8.4.2 eeh const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
82 1.8.4.2 eeh void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
83 1.8.4.2 eeh int, int (*)(void *), void *);
84 1.8.4.2 eeh void pci_intr_disestablish(pci_chipset_tag_t, void *);
85 1.8.4.2 eeh
86 1.8.4.4 nathanw int pci_enumerate_bus(struct pci_softc *,
87 1.8.4.4 nathanw int (*match)(struct pci_attach_args *),
88 1.8.4.4 nathanw struct pci_attach_args *);
89 1.8.4.4 nathanw
90 1.8.4.2 eeh #endif /* _MACHINE_PCI_MACHDEP_H_ */
91