pmap.h revision 1.21.4.5 1 1.21.4.5 nathanw /* $NetBSD: pmap.h,v 1.21.4.5 2002/10/18 02:40:06 nathanw Exp $ */
2 1.21.4.2 petrov
3 1.21.4.2 petrov /*-
4 1.21.4.2 petrov * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 1.21.4.2 petrov * Copyright (C) 1995, 1996 TooLs GmbH.
6 1.21.4.2 petrov * All rights reserved.
7 1.21.4.2 petrov *
8 1.21.4.2 petrov * Redistribution and use in source and binary forms, with or without
9 1.21.4.2 petrov * modification, are permitted provided that the following conditions
10 1.21.4.2 petrov * are met:
11 1.21.4.2 petrov * 1. Redistributions of source code must retain the above copyright
12 1.21.4.2 petrov * notice, this list of conditions and the following disclaimer.
13 1.21.4.2 petrov * 2. Redistributions in binary form must reproduce the above copyright
14 1.21.4.2 petrov * notice, this list of conditions and the following disclaimer in the
15 1.21.4.2 petrov * documentation and/or other materials provided with the distribution.
16 1.21.4.2 petrov * 3. All advertising materials mentioning features or use of this software
17 1.21.4.2 petrov * must display the following acknowledgement:
18 1.21.4.2 petrov * This product includes software developed by TooLs GmbH.
19 1.21.4.2 petrov * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 1.21.4.2 petrov * derived from this software without specific prior written permission.
21 1.21.4.2 petrov *
22 1.21.4.2 petrov * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 1.21.4.2 petrov * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.21.4.2 petrov * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.21.4.2 petrov * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.21.4.2 petrov * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 1.21.4.2 petrov * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 1.21.4.2 petrov * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 1.21.4.2 petrov * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 1.21.4.2 petrov * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 1.21.4.2 petrov * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.21.4.2 petrov */
33 1.21.4.2 petrov
34 1.21.4.2 petrov #ifndef _MACHINE_PMAP_H_
35 1.21.4.2 petrov #define _MACHINE_PMAP_H_
36 1.21.4.2 petrov
37 1.21.4.2 petrov #ifndef _LOCORE
38 1.21.4.2 petrov #include <machine/pte.h>
39 1.21.4.2 petrov #include <sys/queue.h>
40 1.21.4.5 nathanw #include <uvm/uvm_object.h>
41 1.21.4.2 petrov #endif
42 1.21.4.2 petrov
43 1.21.4.2 petrov /*
44 1.21.4.2 petrov * This scheme uses 2-level page tables.
45 1.21.4.2 petrov *
46 1.21.4.2 petrov * While we're still in 32-bit mode we do the following:
47 1.21.4.2 petrov *
48 1.21.4.2 petrov * offset: 13 bits
49 1.21.4.2 petrov * 1st level: 1024 64-bit TTEs in an 8K page for 10 bits
50 1.21.4.2 petrov * 2nd level: 512 32-bit pointers in the pmap for 9 bits
51 1.21.4.2 petrov * -------
52 1.21.4.2 petrov * total: 32 bits
53 1.21.4.2 petrov *
54 1.21.4.2 petrov * In 64-bit mode the Spitfire and Blackbird CPUs support only
55 1.21.4.5 nathanw * 44-bit virtual addresses. All addresses between
56 1.21.4.2 petrov * 0x0000 07ff ffff ffff and 0xffff f800 0000 0000 are in the
57 1.21.4.2 petrov * "VA hole" and trap, so we don't have to track them. However,
58 1.21.4.2 petrov * we do need to keep them in mind during PT walking. If they
59 1.21.4.2 petrov * ever change the size of the address "hole" we need to rework
60 1.21.4.2 petrov * all the page table handling.
61 1.21.4.2 petrov *
62 1.21.4.2 petrov * offset: 13 bits
63 1.21.4.2 petrov * 1st level: 1024 64-bit TTEs in an 8K page for 10 bits
64 1.21.4.2 petrov * 2nd level: 1024 64-bit pointers in an 8K page for 10 bits
65 1.21.4.2 petrov * 3rd level: 1024 64-bit pointers in the segmap for 10 bits
66 1.21.4.2 petrov * -------
67 1.21.4.2 petrov * total: 43 bits
68 1.21.4.2 petrov *
69 1.21.4.2 petrov * Of course, this means for 32-bit spaces we always have a (practically)
70 1.21.4.2 petrov * wasted page for the segmap (only one entry used) and half a page wasted
71 1.21.4.2 petrov * for the page directory. We still have need of one extra bit 8^(.
72 1.21.4.2 petrov */
73 1.21.4.2 petrov
74 1.21.4.2 petrov #define HOLESHIFT (43)
75 1.21.4.2 petrov
76 1.21.4.2 petrov #define PTSZ (NBPG/8)
77 1.21.4.2 petrov #define PDSZ (PTSZ)
78 1.21.4.2 petrov #define STSZ (PTSZ)
79 1.21.4.2 petrov
80 1.21.4.2 petrov #define PTSHIFT (13)
81 1.21.4.2 petrov #define PDSHIFT (10+PTSHIFT)
82 1.21.4.2 petrov #define STSHIFT (10+PDSHIFT)
83 1.21.4.2 petrov
84 1.21.4.2 petrov #define PTMASK (PTSZ-1)
85 1.21.4.2 petrov #define PDMASK (PDSZ-1)
86 1.21.4.2 petrov #define STMASK (STSZ-1)
87 1.21.4.2 petrov
88 1.21.4.2 petrov #ifndef _LOCORE
89 1.21.4.2 petrov
90 1.21.4.2 petrov /*
91 1.21.4.2 petrov * Support for big page sizes. This maps the page size to the
92 1.21.4.2 petrov * page bits.
93 1.21.4.2 petrov */
94 1.21.4.2 petrov struct page_size_map {
95 1.21.4.2 petrov u_int64_t mask;
96 1.21.4.2 petrov u_int64_t code;
97 1.21.4.2 petrov #ifdef DEBUG
98 1.21.4.2 petrov u_int64_t use;
99 1.21.4.2 petrov #endif
100 1.21.4.2 petrov };
101 1.21.4.2 petrov extern struct page_size_map page_size_map[];
102 1.21.4.2 petrov
103 1.21.4.2 petrov /*
104 1.21.4.2 petrov * Pmap stuff
105 1.21.4.2 petrov */
106 1.21.4.2 petrov
107 1.21.4.2 petrov #define va_to_seg(v) (int)((((paddr_t)(v))>>STSHIFT)&STMASK)
108 1.21.4.2 petrov #define va_to_dir(v) (int)((((paddr_t)(v))>>PDSHIFT)&PDMASK)
109 1.21.4.2 petrov #define va_to_pte(v) (int)((((paddr_t)(v))>>PTSHIFT)&PTMASK)
110 1.21.4.2 petrov
111 1.21.4.2 petrov struct pmap {
112 1.21.4.5 nathanw struct uvm_object pm_obj;
113 1.21.4.5 nathanw #define pm_lock pm_obj.vmobjlock
114 1.21.4.5 nathanw #define pm_refs pm_obj.uo_refs
115 1.21.4.5 nathanw LIST_ENTRY(pmap) pm_list;
116 1.21.4.2 petrov int pm_ctx; /* Current context */
117 1.21.4.5 nathanw
118 1.21.4.5 nathanw /*
119 1.21.4.5 nathanw * This contains 64-bit pointers to pages that contain
120 1.21.4.2 petrov * 1024 64-bit pointers to page tables. All addresses
121 1.21.4.5 nathanw * are physical.
122 1.21.4.2 petrov *
123 1.21.4.2 petrov * !!! Only touch this through pseg_get() and pseg_set() !!!
124 1.21.4.2 petrov */
125 1.21.4.2 petrov paddr_t pm_physaddr; /* physical address of pm_segs */
126 1.21.4.2 petrov int64_t *pm_segs;
127 1.21.4.2 petrov };
128 1.21.4.2 petrov
129 1.21.4.2 petrov /*
130 1.21.4.2 petrov * This comes from the PROM and is used to map prom entries.
131 1.21.4.2 petrov */
132 1.21.4.2 petrov struct prom_map {
133 1.21.4.2 petrov u_int64_t vstart;
134 1.21.4.2 petrov u_int64_t vsize;
135 1.21.4.2 petrov u_int64_t tte;
136 1.21.4.2 petrov };
137 1.21.4.2 petrov
138 1.21.4.2 petrov #define PMAP_NC 0x001 /* Set the E bit in the page */
139 1.21.4.2 petrov #define PMAP_NVC 0x002 /* Don't enable the virtual cache */
140 1.21.4.2 petrov #define PMAP_LITTLE 0x004 /* Map in little endian mode */
141 1.21.4.5 nathanw /* Large page size hints --
142 1.21.4.5 nathanw we really should use another param to pmap_enter() */
143 1.21.4.2 petrov #define PMAP_8K 0x000
144 1.21.4.2 petrov #define PMAP_64K 0x008 /* Use 64K page */
145 1.21.4.2 petrov #define PMAP_512K 0x010
146 1.21.4.2 petrov #define PMAP_4M 0x018
147 1.21.4.2 petrov #define PMAP_SZ_TO_TTE(x) (((x)&0x018)<<58)
148 1.21.4.5 nathanw /* If these bits are different in va's to the same PA
149 1.21.4.5 nathanw then there is an aliasing in the d$ */
150 1.21.4.5 nathanw #define VA_ALIAS_MASK (1 << 14)
151 1.21.4.2 petrov
152 1.21.4.2 petrov typedef struct pmap *pmap_t;
153 1.21.4.2 petrov
154 1.21.4.2 petrov #ifdef _KERNEL
155 1.21.4.2 petrov extern struct pmap kernel_pmap_;
156 1.21.4.2 petrov #define pmap_kernel() (&kernel_pmap_)
157 1.21.4.2 petrov
158 1.21.4.5 nathanw int pmap_count_res __P((struct pmap *));
159 1.21.4.5 nathanw int pmap_count_wired __P((struct pmap *));
160 1.21.4.2 petrov #define pmap_resident_count(pm) pmap_count_res((pm))
161 1.21.4.2 petrov #define pmap_wired_count(pm) pmap_count_wired((pm))
162 1.21.4.2 petrov #define pmap_phys_address(x) (x)
163 1.21.4.5 nathanw
164 1.21.4.5 nathanw void pmap_activate_pmap(struct pmap *);
165 1.21.4.5 nathanw
166 1.21.4.5 nathanw static __inline void
167 1.21.4.5 nathanw pmap_update(struct pmap *pmap)
168 1.21.4.5 nathanw {
169 1.21.4.5 nathanw
170 1.21.4.5 nathanw if (pmap->pm_refs > 0) {
171 1.21.4.5 nathanw return;
172 1.21.4.5 nathanw }
173 1.21.4.5 nathanw pmap->pm_refs = 1;
174 1.21.4.5 nathanw pmap_activate_pmap(pmap);
175 1.21.4.5 nathanw }
176 1.21.4.2 petrov
177 1.21.4.2 petrov void pmap_bootstrap __P((u_long kernelstart, u_long kernelend, u_int numctx));
178 1.21.4.2 petrov /* make sure all page mappings are modulo 16K to prevent d$ aliasing */
179 1.21.4.4 nathanw #define PMAP_PREFER(pa, va) (*(va)+=(((*(va))^(pa))&(1<<(PGSHIFT))))
180 1.21.4.2 petrov
181 1.21.4.2 petrov #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
182 1.21.4.5 nathanw #define PMAP_NEED_PROCWR
183 1.21.4.5 nathanw #define __HAVE_PMAP_PREDESTROY
184 1.21.4.5 nathanw #define __HAVE_PMAP_ACTIVATE_KERNEL
185 1.21.4.5 nathanw
186 1.21.4.5 nathanw void pmap_procwr(struct proc *, vaddr_t, size_t);
187 1.21.4.2 petrov
188 1.21.4.2 petrov /* SPARC specific? */
189 1.21.4.2 petrov int pmap_dumpsize __P((void));
190 1.21.4.2 petrov int pmap_dumpmmu __P((int (*)__P((dev_t, daddr_t, caddr_t, size_t)),
191 1.21.4.2 petrov daddr_t));
192 1.21.4.2 petrov int pmap_pa_exists __P((paddr_t));
193 1.21.4.2 petrov struct proc;
194 1.21.4.3 eeh void switchexit __P((struct lwp *, int));
195 1.21.4.2 petrov
196 1.21.4.2 petrov /* SPARC64 specific */
197 1.21.4.5 nathanw int ctx_alloc __P((struct pmap *));
198 1.21.4.5 nathanw void ctx_free __P((struct pmap *));
199 1.21.4.2 petrov
200 1.21.4.2 petrov #endif /* _KERNEL */
201 1.21.4.2 petrov
202 1.21.4.2 petrov #endif /* _LOCORE */
203 1.21.4.2 petrov #endif /* _MACHINE_PMAP_H_ */
204