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pmap.h revision 1.52
      1  1.52       mrg /*	$NetBSD: pmap.h,v 1.52 2010/03/06 08:08:29 mrg Exp $	*/
      2   1.1       eeh 
      3   1.1       eeh /*-
      4   1.1       eeh  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
      5   1.1       eeh  * Copyright (C) 1995, 1996 TooLs GmbH.
      6   1.1       eeh  * All rights reserved.
      7   1.1       eeh  *
      8   1.1       eeh  * Redistribution and use in source and binary forms, with or without
      9   1.1       eeh  * modification, are permitted provided that the following conditions
     10   1.1       eeh  * are met:
     11   1.1       eeh  * 1. Redistributions of source code must retain the above copyright
     12   1.1       eeh  *    notice, this list of conditions and the following disclaimer.
     13   1.1       eeh  * 2. Redistributions in binary form must reproduce the above copyright
     14   1.1       eeh  *    notice, this list of conditions and the following disclaimer in the
     15   1.1       eeh  *    documentation and/or other materials provided with the distribution.
     16   1.1       eeh  * 3. All advertising materials mentioning features or use of this software
     17   1.1       eeh  *    must display the following acknowledgement:
     18   1.1       eeh  *	This product includes software developed by TooLs GmbH.
     19   1.1       eeh  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     20   1.1       eeh  *    derived from this software without specific prior written permission.
     21   1.1       eeh  *
     22   1.1       eeh  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     23   1.1       eeh  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24   1.1       eeh  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25   1.1       eeh  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26   1.1       eeh  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     27   1.1       eeh  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     28   1.1       eeh  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     29   1.1       eeh  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     30   1.1       eeh  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     31   1.1       eeh  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32   1.1       eeh  */
     33   1.1       eeh 
     34   1.1       eeh #ifndef	_MACHINE_PMAP_H_
     35   1.1       eeh #define	_MACHINE_PMAP_H_
     36   1.1       eeh 
     37   1.1       eeh #ifndef _LOCORE
     38   1.1       eeh #include <machine/pte.h>
     39   1.1       eeh #include <sys/queue.h>
     40  1.23       chs #include <uvm/uvm_object.h>
     41  1.44     pooka #ifdef _KERNEL
     42  1.44     pooka #include <machine/cpuset.h>
     43  1.44     pooka #endif
     44   1.1       eeh #endif
     45   1.1       eeh 
     46   1.1       eeh /*
     47   1.1       eeh  * This scheme uses 2-level page tables.
     48   1.1       eeh  *
     49   1.1       eeh  * While we're still in 32-bit mode we do the following:
     50   1.1       eeh  *
     51   1.1       eeh  *   offset:						13 bits
     52   1.1       eeh  * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits
     53   1.1       eeh  * 2nd level: 512 32-bit pointers in the pmap for 	 9 bits
     54   1.1       eeh  *							-------
     55   1.1       eeh  * total:						32 bits
     56   1.1       eeh  *
     57   1.4       eeh  * In 64-bit mode the Spitfire and Blackbird CPUs support only
     58  1.23       chs  * 44-bit virtual addresses.  All addresses between
     59   1.4       eeh  * 0x0000 07ff ffff ffff and 0xffff f800 0000 0000 are in the
     60   1.4       eeh  * "VA hole" and trap, so we don't have to track them.  However,
     61   1.4       eeh  * we do need to keep them in mind during PT walking.  If they
     62   1.4       eeh  * ever change the size of the address "hole" we need to rework
     63   1.4       eeh  * all the page table handling.
     64   1.1       eeh  *
     65   1.1       eeh  *   offset:						13 bits
     66   1.1       eeh  * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits
     67   1.1       eeh  * 2nd level: 1024 64-bit pointers in an 8K page for 	10 bits
     68   1.4       eeh  * 3rd level: 1024 64-bit pointers in the segmap for 	10 bits
     69   1.1       eeh  *							-------
     70   1.4       eeh  * total:						43 bits
     71   1.4       eeh  *
     72   1.4       eeh  * Of course, this means for 32-bit spaces we always have a (practically)
     73   1.4       eeh  * wasted page for the segmap (only one entry used) and half a page wasted
     74   1.4       eeh  * for the page directory.  We still have need of one extra bit 8^(.
     75   1.1       eeh  */
     76   1.1       eeh 
     77   1.4       eeh #define HOLESHIFT	(43)
     78   1.4       eeh 
     79  1.33      heas #define PTSZ	(PAGE_SIZE/8)			/* page table entry */
     80  1.33      heas #define PDSZ	(PTSZ)				/* page directory */
     81  1.33      heas #define STSZ	(PTSZ)				/* psegs */
     82   1.1       eeh 
     83   1.1       eeh #define PTSHIFT		(13)
     84   1.4       eeh #define	PDSHIFT		(10+PTSHIFT)
     85   1.4       eeh #define STSHIFT		(10+PDSHIFT)
     86   1.1       eeh 
     87   1.1       eeh #define PTMASK		(PTSZ-1)
     88   1.4       eeh #define PDMASK		(PDSZ-1)
     89   1.1       eeh #define STMASK		(STSZ-1)
     90   1.1       eeh 
     91   1.1       eeh #ifndef _LOCORE
     92   1.1       eeh 
     93   1.1       eeh /*
     94   1.1       eeh  * Support for big page sizes.  This maps the page size to the
     95   1.1       eeh  * page bits.
     96   1.1       eeh  */
     97   1.1       eeh struct page_size_map {
     98  1.36       cdi 	uint64_t mask;
     99  1.36       cdi 	uint64_t code;
    100   1.1       eeh #ifdef DEBUG
    101  1.36       cdi 	uint64_t use;
    102   1.1       eeh #endif
    103   1.1       eeh };
    104   1.1       eeh extern struct page_size_map page_size_map[];
    105   1.1       eeh 
    106   1.1       eeh /*
    107   1.1       eeh  * Pmap stuff
    108   1.1       eeh  */
    109   1.1       eeh 
    110   1.4       eeh #define va_to_seg(v)	(int)((((paddr_t)(v))>>STSHIFT)&STMASK)
    111   1.4       eeh #define va_to_dir(v)	(int)((((paddr_t)(v))>>PDSHIFT)&PDMASK)
    112   1.4       eeh #define va_to_pte(v)	(int)((((paddr_t)(v))>>PTSHIFT)&PTMASK)
    113   1.1       eeh 
    114  1.52       mrg #ifdef MULTIPROCESSOR
    115  1.52       mrg #define PMAP_LIST_MAXNUMCPU	CPUSET_MAXNUMCPU
    116  1.52       mrg #else
    117  1.52       mrg #define PMAP_LIST_MAXNUMCPU	1
    118  1.52       mrg #endif
    119  1.52       mrg 
    120   1.1       eeh struct pmap {
    121  1.23       chs 	struct uvm_object pm_obj;
    122  1.23       chs #define pm_lock pm_obj.vmobjlock
    123  1.23       chs #define pm_refs pm_obj.uo_refs
    124  1.52       mrg 	LIST_ENTRY(pmap) pm_list[PMAP_LIST_MAXNUMCPU];	/* per cpu ctx used list */
    125  1.25    martin 
    126  1.25    martin 	struct pmap_statistics pm_stats;
    127  1.25    martin 
    128  1.39    martin 	/*
    129  1.39    martin 	 * We record the context used on any cpu here. If the context
    130  1.39    martin 	 * is actually present in the TLB, it will be the plain context
    131  1.39    martin 	 * number. If the context is allocated, but has been flushed
    132  1.39    martin 	 * from the tlb, the number will be negative.
    133  1.39    martin 	 * If this pmap has no context allocated on that cpu, the entry
    134  1.39    martin 	 * will be 0.
    135  1.39    martin 	 */
    136  1.52       mrg 	int pm_ctx[PMAP_LIST_MAXNUMCPU];	/* Current context per cpu */
    137  1.23       chs 
    138  1.23       chs 	/*
    139  1.23       chs 	 * This contains 64-bit pointers to pages that contain
    140   1.4       eeh 	 * 1024 64-bit pointers to page tables.  All addresses
    141  1.23       chs 	 * are physical.
    142   1.4       eeh 	 *
    143   1.4       eeh 	 * !!! Only touch this through pseg_get() and pseg_set() !!!
    144   1.4       eeh 	 */
    145   1.3       eeh 	paddr_t pm_physaddr;	/* physical address of pm_segs */
    146  1.12       eeh 	int64_t *pm_segs;
    147   1.1       eeh };
    148   1.1       eeh 
    149   1.1       eeh /*
    150   1.1       eeh  * This comes from the PROM and is used to map prom entries.
    151   1.1       eeh  */
    152   1.1       eeh struct prom_map {
    153  1.36       cdi 	uint64_t	vstart;
    154  1.36       cdi 	uint64_t	vsize;
    155  1.36       cdi 	uint64_t	tte;
    156   1.1       eeh };
    157   1.1       eeh 
    158   1.9       eeh #define PMAP_NC		0x001	/* Set the E bit in the page */
    159   1.9       eeh #define PMAP_NVC	0x002	/* Don't enable the virtual cache */
    160   1.9       eeh #define PMAP_LITTLE	0x004	/* Map in little endian mode */
    161  1.23       chs /* Large page size hints --
    162  1.23       chs    we really should use another param to pmap_enter() */
    163   1.9       eeh #define PMAP_8K		0x000
    164   1.9       eeh #define PMAP_64K	0x008	/* Use 64K page */
    165   1.9       eeh #define PMAP_512K	0x010
    166   1.9       eeh #define PMAP_4M		0x018
    167   1.9       eeh #define PMAP_SZ_TO_TTE(x)	(((x)&0x018)<<58)
    168  1.23       chs /* If these bits are different in va's to the same PA
    169  1.23       chs    then there is an aliasing in the d$ */
    170  1.30    petrov #define VA_ALIAS_MASK   (1 << 13)
    171   1.1       eeh 
    172   1.1       eeh #ifdef	_KERNEL
    173  1.25    martin #ifdef PMAP_COUNT_DEBUG
    174  1.25    martin /* diagnostic versions if PMAP_COUNT_DEBUG option is used */
    175  1.37       cdi int pmap_count_res(struct pmap *);
    176  1.37       cdi int pmap_count_wired(struct pmap *);
    177  1.21       eeh #define	pmap_resident_count(pm)		pmap_count_res((pm))
    178  1.21       eeh #define	pmap_wired_count(pm)		pmap_count_wired((pm))
    179  1.25    martin #else
    180  1.25    martin #define	pmap_resident_count(pm)		((pm)->pm_stats.resident_count)
    181  1.25    martin #define	pmap_wired_count(pm)		((pm)->pm_stats.wired_count)
    182  1.25    martin #endif
    183  1.25    martin 
    184  1.21       eeh #define	pmap_phys_address(x)		(x)
    185  1.23       chs 
    186  1.23       chs void pmap_activate_pmap(struct pmap *);
    187  1.31       chs void pmap_update(struct pmap *);
    188  1.37       cdi void pmap_bootstrap(u_long, u_long);
    189  1.11       eeh /* make sure all page mappings are modulo 16K to prevent d$ aliasing */
    190  1.32    atatat #define	PMAP_PREFER(pa, va, sz, td)	(*(va)+=(((*(va))^(pa))&(1<<(PGSHIFT))))
    191  1.13       eeh 
    192  1.21       eeh #define	PMAP_GROWKERNEL         /* turn on pmap_growkernel interface */
    193  1.23       chs #define PMAP_NEED_PROCWR
    194  1.23       chs 
    195  1.23       chs void pmap_procwr(struct proc *, vaddr_t, size_t);
    196   1.1       eeh 
    197   1.1       eeh /* SPARC specific? */
    198  1.37       cdi int             pmap_dumpsize(void);
    199  1.38  christos int             pmap_dumpmmu(int (*)(dev_t, daddr_t, void *, size_t),
    200  1.37       cdi                                  daddr_t);
    201  1.37       cdi int		pmap_pa_exists(paddr_t);
    202  1.37       cdi void		switchexit(struct lwp *, int);
    203  1.29       chs void		pmap_kprotect(vaddr_t, vm_prot_t);
    204   1.1       eeh 
    205  1.51       mrg /* SPARC64 specific */
    206  1.51       mrg void		pmap_copy_page_phys(paddr_t, paddr_t);
    207  1.51       mrg void		pmap_zero_page_phys(paddr_t);
    208  1.51       mrg 
    209  1.35       cdi /* Installed physical memory, as discovered during bootstrap. */
    210  1.35       cdi extern int phys_installed_size;
    211  1.35       cdi extern struct mem_region *phys_installed;
    212  1.35       cdi 
    213   1.1       eeh #endif	/* _KERNEL */
    214  1.18    martin 
    215  1.18    martin #endif	/* _LOCORE */
    216   1.1       eeh #endif	/* _MACHINE_PMAP_H_ */
    217