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pmap.h revision 1.19
      1 /*	$NetBSD: pmap.h,v 1.19 2001/09/10 21:19:26 chris Exp $	*/
      2 
      3 /*-
      4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
      5  * Copyright (C) 1995, 1996 TooLs GmbH.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by TooLs GmbH.
     19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #ifndef	_MACHINE_PMAP_H_
     35 #define	_MACHINE_PMAP_H_
     36 
     37 #ifndef _LOCORE
     38 #include <machine/pte.h>
     39 #include <sys/queue.h>
     40 #endif
     41 
     42 /*
     43  * This scheme uses 2-level page tables.
     44  *
     45  * While we're still in 32-bit mode we do the following:
     46  *
     47  *   offset:						13 bits
     48  * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits
     49  * 2nd level: 512 32-bit pointers in the pmap for 	 9 bits
     50  *							-------
     51  * total:						32 bits
     52  *
     53  * In 64-bit mode the Spitfire and Blackbird CPUs support only
     54  * 44-bit virtual addresses.  All addresses between
     55  * 0x0000 07ff ffff ffff and 0xffff f800 0000 0000 are in the
     56  * "VA hole" and trap, so we don't have to track them.  However,
     57  * we do need to keep them in mind during PT walking.  If they
     58  * ever change the size of the address "hole" we need to rework
     59  * all the page table handling.
     60  *
     61  *   offset:						13 bits
     62  * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits
     63  * 2nd level: 1024 64-bit pointers in an 8K page for 	10 bits
     64  * 3rd level: 1024 64-bit pointers in the segmap for 	10 bits
     65  *							-------
     66  * total:						43 bits
     67  *
     68  * Of course, this means for 32-bit spaces we always have a (practically)
     69  * wasted page for the segmap (only one entry used) and half a page wasted
     70  * for the page directory.  We still have need of one extra bit 8^(.
     71  */
     72 
     73 #define HOLESHIFT	(43)
     74 
     75 #define PTSZ	(NBPG/8)
     76 #define PDSZ	(PTSZ)
     77 #define STSZ	(PTSZ)
     78 
     79 #define PTSHIFT		(13)
     80 #define	PDSHIFT		(10+PTSHIFT)
     81 #define STSHIFT		(10+PDSHIFT)
     82 
     83 #define PTMASK		(PTSZ-1)
     84 #define PDMASK		(PDSZ-1)
     85 #define STMASK		(STSZ-1)
     86 
     87 #ifndef _LOCORE
     88 
     89 /*
     90  * Support for big page sizes.  This maps the page size to the
     91  * page bits.
     92  */
     93 struct page_size_map {
     94 	u_int64_t mask;
     95 	u_int64_t code;
     96 #ifdef DEBUG
     97 	u_int64_t use;
     98 #endif
     99 };
    100 extern struct page_size_map page_size_map[];
    101 
    102 /*
    103  * Pmap stuff
    104  */
    105 
    106 #define va_to_seg(v)	(int)((((paddr_t)(v))>>STSHIFT)&STMASK)
    107 #define va_to_dir(v)	(int)((((paddr_t)(v))>>PDSHIFT)&PDMASK)
    108 #define va_to_pte(v)	(int)((((paddr_t)(v))>>PTSHIFT)&PTMASK)
    109 
    110 struct pmap {
    111 	int pm_ctx;		/* Current context */
    112 	int pm_refs;		/* ref count */
    113 	/*
    114 	 * This contains 64-bit pointers to pages that contain
    115 	 * 1024 64-bit pointers to page tables.  All addresses
    116 	 * are physical.
    117 	 *
    118 	 * !!! Only touch this through pseg_get() and pseg_set() !!!
    119 	 */
    120 	paddr_t pm_physaddr;	/* physical address of pm_segs */
    121 	int64_t *pm_segs;
    122 	struct simplelock pm_lock;
    123 };
    124 
    125 /*
    126  * This comes from the PROM and is used to map prom entries.
    127  */
    128 struct prom_map {
    129 	u_int64_t	vstart;
    130 	u_int64_t	vsize;
    131 	u_int64_t	tte;
    132 };
    133 
    134 #define PMAP_NC		0x001	/* Set the E bit in the page */
    135 #define PMAP_NVC	0x002	/* Don't enable the virtual cache */
    136 #define PMAP_LITTLE	0x004	/* Map in little endian mode */
    137 /* Large page size hints -- we really should use another param to pmap_enter() */
    138 #define PMAP_8K		0x000
    139 #define PMAP_64K	0x008	/* Use 64K page */
    140 #define PMAP_512K	0x010
    141 #define PMAP_4M		0x018
    142 #define PMAP_SZ_TO_TTE(x)	(((x)&0x018)<<58)
    143 /* If these bits are different in va's to the same PA then there is an aliasing in the d$ */
    144 #define VA_ALIAS_MASK   (1<<14)
    145 
    146 typedef	struct pmap *pmap_t;
    147 
    148 /*
    149  * Encode IO space for pmap_enter()
    150  *
    151  * Since sun4u machines don't have separate IO spaces, this is a noop.
    152  */
    153 #define PMAP_IOENC(io)	0
    154 
    155 #ifdef	_KERNEL
    156 extern struct pmap kernel_pmap_;
    157 #define	pmap_kernel()	(&kernel_pmap_)
    158 
    159 int pmap_count_res __P((pmap_t pmap));
    160 /* int pmap_change_wiring __P((pmap_t pm, vaddr_t va, boolean_t wired)); */
    161 #define pmap_resident_count(pm)		pmap_count_res((pm))
    162 #define pmap_from_phys_address(x,f)	((x)>>PGSHIFT)
    163 #define	pmap_phys_address(x)		((((paddr_t)(x))<<PGSHIFT)|PMAP_NC)
    164 #define	pmap_update(pmap)		/* nothing (yet) */
    165 
    166 void pmap_bootstrap __P((u_long kernelstart, u_long kernelend, u_int numctx));
    167 /* make sure all page mappings are modulo 16K to prevent d$ aliasing */
    168 #define PMAP_PREFER(pa, va)	(*(va)+=(((*(va))^(pa))&(1<<(PGSHIFT+1))))
    169 
    170 #define PMAP_GROWKERNEL         /* turn on pmap_growkernel interface */
    171 
    172 /* SPARC specific? */
    173 void		pmap_redzone __P((void));
    174 int             pmap_dumpsize __P((void));
    175 int             pmap_dumpmmu __P((int (*)__P((dev_t, daddr_t, caddr_t, size_t)),
    176                                  daddr_t));
    177 int		pmap_pa_exists __P((paddr_t));
    178 struct proc;
    179 void		switchexit __P((struct proc *));
    180 
    181 /* SPARC64 specific */
    182 int	ctx_alloc __P((struct pmap*));
    183 void	ctx_free __P((struct pmap*));
    184 
    185 
    186 #endif	/* _KERNEL */
    187 
    188 /* This is only for compatibility with the SPARC */
    189 struct segmap {
    190 	int	*sg_pte;		/* points to NPTESG PTEs */
    191 	pmeg_t	sg_pmeg;		/* the MMU segment number (4c) */
    192 	u_char	sg_npte;		/* number of valid PTEs per seg */
    193 };
    194 
    195 #endif	/* _LOCORE */
    196 #endif	/* _MACHINE_PMAP_H_ */
    197