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pmap.h revision 1.53
      1 /*	$NetBSD: pmap.h,v 1.53 2010/11/14 13:33:23 uebayasi Exp $	*/
      2 
      3 /*-
      4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
      5  * Copyright (C) 1995, 1996 TooLs GmbH.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by TooLs GmbH.
     19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #ifndef	_MACHINE_PMAP_H_
     35 #define	_MACHINE_PMAP_H_
     36 
     37 #ifndef _LOCORE
     38 #include <machine/pte.h>
     39 #include <sys/queue.h>
     40 #include <uvm/uvm_object.h>
     41 #ifdef _KERNEL
     42 #include <machine/cpuset.h>
     43 #endif
     44 #endif
     45 
     46 /*
     47  * This scheme uses 2-level page tables.
     48  *
     49  * While we're still in 32-bit mode we do the following:
     50  *
     51  *   offset:						13 bits
     52  * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits
     53  * 2nd level: 512 32-bit pointers in the pmap for 	 9 bits
     54  *							-------
     55  * total:						32 bits
     56  *
     57  * In 64-bit mode the Spitfire and Blackbird CPUs support only
     58  * 44-bit virtual addresses.  All addresses between
     59  * 0x0000 07ff ffff ffff and 0xffff f800 0000 0000 are in the
     60  * "VA hole" and trap, so we don't have to track them.  However,
     61  * we do need to keep them in mind during PT walking.  If they
     62  * ever change the size of the address "hole" we need to rework
     63  * all the page table handling.
     64  *
     65  *   offset:						13 bits
     66  * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits
     67  * 2nd level: 1024 64-bit pointers in an 8K page for 	10 bits
     68  * 3rd level: 1024 64-bit pointers in the segmap for 	10 bits
     69  *							-------
     70  * total:						43 bits
     71  *
     72  * Of course, this means for 32-bit spaces we always have a (practically)
     73  * wasted page for the segmap (only one entry used) and half a page wasted
     74  * for the page directory.  We still have need of one extra bit 8^(.
     75  */
     76 
     77 #define HOLESHIFT	(43)
     78 
     79 #define PTSZ	(PAGE_SIZE/8)			/* page table entry */
     80 #define PDSZ	(PTSZ)				/* page directory */
     81 #define STSZ	(PTSZ)				/* psegs */
     82 
     83 #define PTSHIFT		(13)
     84 #define	PDSHIFT		(10+PTSHIFT)
     85 #define STSHIFT		(10+PDSHIFT)
     86 
     87 #define PTMASK		(PTSZ-1)
     88 #define PDMASK		(PDSZ-1)
     89 #define STMASK		(STSZ-1)
     90 
     91 #ifndef _LOCORE
     92 
     93 /*
     94  * Support for big page sizes.  This maps the page size to the
     95  * page bits.
     96  */
     97 struct page_size_map {
     98 	uint64_t mask;
     99 	uint64_t code;
    100 #ifdef DEBUG
    101 	uint64_t use;
    102 #endif
    103 };
    104 extern struct page_size_map page_size_map[];
    105 
    106 /*
    107  * Pmap stuff
    108  */
    109 
    110 #define va_to_seg(v)	(int)((((paddr_t)(v))>>STSHIFT)&STMASK)
    111 #define va_to_dir(v)	(int)((((paddr_t)(v))>>PDSHIFT)&PDMASK)
    112 #define va_to_pte(v)	(int)((((paddr_t)(v))>>PTSHIFT)&PTMASK)
    113 
    114 #ifdef MULTIPROCESSOR
    115 #define PMAP_LIST_MAXNUMCPU	CPUSET_MAXNUMCPU
    116 #else
    117 #define PMAP_LIST_MAXNUMCPU	1
    118 #endif
    119 
    120 struct pmap {
    121 	struct uvm_object pm_obj;
    122 #define pm_lock pm_obj.vmobjlock
    123 #define pm_refs pm_obj.uo_refs
    124 	LIST_ENTRY(pmap) pm_list[PMAP_LIST_MAXNUMCPU];	/* per cpu ctx used list */
    125 
    126 	struct pmap_statistics pm_stats;
    127 
    128 	/*
    129 	 * We record the context used on any cpu here. If the context
    130 	 * is actually present in the TLB, it will be the plain context
    131 	 * number. If the context is allocated, but has been flushed
    132 	 * from the tlb, the number will be negative.
    133 	 * If this pmap has no context allocated on that cpu, the entry
    134 	 * will be 0.
    135 	 */
    136 	int pm_ctx[PMAP_LIST_MAXNUMCPU];	/* Current context per cpu */
    137 
    138 	/*
    139 	 * This contains 64-bit pointers to pages that contain
    140 	 * 1024 64-bit pointers to page tables.  All addresses
    141 	 * are physical.
    142 	 *
    143 	 * !!! Only touch this through pseg_get() and pseg_set() !!!
    144 	 */
    145 	paddr_t pm_physaddr;	/* physical address of pm_segs */
    146 	int64_t *pm_segs;
    147 };
    148 
    149 /*
    150  * This comes from the PROM and is used to map prom entries.
    151  */
    152 struct prom_map {
    153 	uint64_t	vstart;
    154 	uint64_t	vsize;
    155 	uint64_t	tte;
    156 };
    157 
    158 #define PMAP_NC		0x001	/* Set the E bit in the page */
    159 #define PMAP_NVC	0x002	/* Don't enable the virtual cache */
    160 #define PMAP_LITTLE	0x004	/* Map in little endian mode */
    161 /* Large page size hints --
    162    we really should use another param to pmap_enter() */
    163 #define PMAP_8K		0x000
    164 #define PMAP_64K	0x008	/* Use 64K page */
    165 #define PMAP_512K	0x010
    166 #define PMAP_4M		0x018
    167 #define PMAP_SZ_TO_TTE(x)	(((x)&0x018)<<58)
    168 /* If these bits are different in va's to the same PA
    169    then there is an aliasing in the d$ */
    170 #define VA_ALIAS_MASK   (1 << 13)
    171 
    172 #ifdef	_KERNEL
    173 #ifdef PMAP_COUNT_DEBUG
    174 /* diagnostic versions if PMAP_COUNT_DEBUG option is used */
    175 int pmap_count_res(struct pmap *);
    176 int pmap_count_wired(struct pmap *);
    177 #define	pmap_resident_count(pm)		pmap_count_res((pm))
    178 #define	pmap_wired_count(pm)		pmap_count_wired((pm))
    179 #else
    180 #define	pmap_resident_count(pm)		((pm)->pm_stats.resident_count)
    181 #define	pmap_wired_count(pm)		((pm)->pm_stats.wired_count)
    182 #endif
    183 
    184 #define	pmap_phys_address(x)		(x)
    185 
    186 void pmap_activate_pmap(struct pmap *);
    187 void pmap_update(struct pmap *);
    188 void pmap_bootstrap(u_long, u_long);
    189 /* make sure all page mappings are modulo 16K to prevent d$ aliasing */
    190 #define	PMAP_PREFER(pa, va, sz, td)	(*(va)+=(((*(va))^(pa))&(1<<(PGSHIFT))))
    191 
    192 #define	PMAP_GROWKERNEL         /* turn on pmap_growkernel interface */
    193 #define PMAP_NEED_PROCWR
    194 
    195 void pmap_procwr(struct proc *, vaddr_t, size_t);
    196 
    197 /* SPARC specific? */
    198 int             pmap_dumpsize(void);
    199 int             pmap_dumpmmu(int (*)(dev_t, daddr_t, void *, size_t),
    200                                  daddr_t);
    201 int		pmap_pa_exists(paddr_t);
    202 void		switchexit(struct lwp *, int);
    203 void		pmap_kprotect(vaddr_t, vm_prot_t);
    204 
    205 /* SPARC64 specific */
    206 void		pmap_copy_page_phys(paddr_t, paddr_t);
    207 void		pmap_zero_page_phys(paddr_t);
    208 
    209 /* Installed physical memory, as discovered during bootstrap. */
    210 extern int phys_installed_size;
    211 extern struct mem_region *phys_installed;
    212 
    213 #define	__HAVE_VM_PAGE_MD
    214 
    215 /*
    216  * For each struct vm_page, there is a list of all currently valid virtual
    217  * mappings of that page.  An entry is a pv_entry_t.
    218  */
    219 struct pmap;
    220 typedef struct pv_entry {
    221 	struct pv_entry	*pv_next;	/* next pv_entry */
    222 	struct pmap	*pv_pmap;	/* pmap where mapping lies */
    223 	vaddr_t		pv_va;		/* virtual address for mapping */
    224 } *pv_entry_t;
    225 /* PV flags encoded in the low bits of the VA of the first pv_entry */
    226 
    227 struct vm_page_md {
    228 	struct pv_entry mdpg_pvh;
    229 };
    230 #define	VM_MDPAGE_INIT(pg)						\
    231 do {									\
    232 	(pg)->mdpage.mdpg_pvh.pv_next = NULL;				\
    233 	(pg)->mdpage.mdpg_pvh.pv_pmap = NULL;				\
    234 	(pg)->mdpage.mdpg_pvh.pv_va = 0;				\
    235 } while (/*CONSTCOND*/0)
    236 
    237 #endif	/* _KERNEL */
    238 
    239 #endif	/* _LOCORE */
    240 #endif	/* _MACHINE_PMAP_H_ */
    241