pmap.h revision 1.62
1 /* $NetBSD: pmap.h,v 1.62 2019/01/10 10:33:49 mrg Exp $ */ 2 3 /*- 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _MACHINE_PMAP_H_ 35 #define _MACHINE_PMAP_H_ 36 37 #ifndef _LOCORE 38 #include <machine/pte.h> 39 #include <sys/queue.h> 40 #include <uvm/uvm_object.h> 41 #ifdef _KERNEL 42 #include <machine/cpuset.h> 43 #ifdef SUN4V 44 #include <machine/hypervisor.h> 45 #endif 46 #endif 47 #endif 48 49 /* 50 * This scheme uses 2-level page tables. 51 * 52 * While we're still in 32-bit mode we do the following: 53 * 54 * offset: 13 bits 55 * 1st level: 1024 64-bit TTEs in an 8K page for 10 bits 56 * 2nd level: 512 32-bit pointers in the pmap for 9 bits 57 * ------- 58 * total: 32 bits 59 * 60 * In 64-bit mode the Spitfire and Blackbird CPUs support only 61 * 44-bit virtual addresses. All addresses between 62 * 0x0000 07ff ffff ffff and 0xffff f800 0000 0000 are in the 63 * "VA hole" and trap, so we don't have to track them. However, 64 * we do need to keep them in mind during PT walking. If they 65 * ever change the size of the address "hole" we need to rework 66 * all the page table handling. 67 * 68 * offset: 13 bits 69 * 1st level: 1024 64-bit TTEs in an 8K page for 10 bits 70 * 2nd level: 1024 64-bit pointers in an 8K page for 10 bits 71 * 3rd level: 1024 64-bit pointers in the segmap for 10 bits 72 * ------- 73 * total: 43 bits 74 * 75 * Of course, this means for 32-bit spaces we always have a (practically) 76 * wasted page for the segmap (only one entry used) and half a page wasted 77 * for the page directory. We still have need of one extra bit 8^(. 78 */ 79 80 #define HOLESHIFT (43) 81 82 #define PTSZ (PAGE_SIZE/8) /* page table entry */ 83 #define PDSZ (PTSZ) /* page directory */ 84 #define STSZ (PTSZ) /* psegs */ 85 86 #define PTSHIFT (13) 87 #define PDSHIFT (10+PTSHIFT) 88 #define STSHIFT (10+PDSHIFT) 89 90 #define PTMASK (PTSZ-1) 91 #define PDMASK (PDSZ-1) 92 #define STMASK (STSZ-1) 93 94 #ifndef _LOCORE 95 96 #ifdef _LP64 97 int sparc64_mmap_range_test(vaddr_t, vaddr_t); 98 #define MD_MMAP_RANGE_TEST(MINVA, MAXVA) sparc64_mmap_range_test(MINVA, MAXVA) 99 #endif 100 101 /* 102 * Support for big page sizes. This maps the page size to the 103 * page bits. 104 */ 105 struct page_size_map { 106 uint64_t mask; 107 uint64_t code; 108 #if defined(DEBUG) || 1 109 uint64_t use; 110 #endif 111 }; 112 extern struct page_size_map page_size_map[]; 113 114 /* 115 * Pmap stuff 116 */ 117 118 #define va_to_seg(v) (int)((((paddr_t)(v))>>STSHIFT)&STMASK) 119 #define va_to_dir(v) (int)((((paddr_t)(v))>>PDSHIFT)&PDMASK) 120 #define va_to_pte(v) (int)((((paddr_t)(v))>>PTSHIFT)&PTMASK) 121 122 #ifdef MULTIPROCESSOR 123 #define PMAP_LIST_MAXNUMCPU CPUSET_MAXNUMCPU 124 #else 125 #define PMAP_LIST_MAXNUMCPU 1 126 #endif 127 128 struct pmap { 129 struct uvm_object pm_obj; 130 kmutex_t pm_obj_lock; 131 #define pm_lock pm_obj.vmobjlock 132 #define pm_refs pm_obj.uo_refs 133 LIST_ENTRY(pmap) pm_list[PMAP_LIST_MAXNUMCPU]; /* per cpu ctx used list */ 134 135 struct pmap_statistics pm_stats; 136 137 /* 138 * We record the context used on any cpu here. If the context 139 * is actually present in the TLB, it will be the plain context 140 * number. If the context is allocated, but has been flushed 141 * from the tlb, the number will be negative. 142 * If this pmap has no context allocated on that cpu, the entry 143 * will be 0. 144 */ 145 int pm_ctx[PMAP_LIST_MAXNUMCPU]; /* Current context per cpu */ 146 147 /* 148 * This contains 64-bit pointers to pages that contain 149 * 1024 64-bit pointers to page tables. All addresses 150 * are physical. 151 * 152 * !!! Only touch this through pseg_get() and pseg_set() !!! 153 */ 154 paddr_t pm_physaddr; /* physical address of pm_segs */ 155 int64_t *pm_segs; 156 }; 157 158 /* 159 * This comes from the PROM and is used to map prom entries. 160 */ 161 struct prom_map { 162 uint64_t vstart; 163 uint64_t vsize; 164 uint64_t tte; 165 }; 166 167 #define PMAP_NC 0x001 /* Don't cache, set the E bit in the page */ 168 #define PMAP_NVC 0x002 /* Don't enable the virtual cache */ 169 #define PMAP_LITTLE 0x004 /* Map in little endian mode */ 170 /* Large page size hints -- 171 we really should use another param to pmap_enter() */ 172 #define PMAP_8K 0x000 173 #define PMAP_64K 0x008 /* Use 64K page */ 174 #define PMAP_512K 0x010 175 #define PMAP_4M 0x018 176 #define PMAP_SZ_TO_TTE(x) (((x)&0x018)<<58) 177 /* If these bits are different in va's to the same PA 178 then there is an aliasing in the d$ */ 179 #define VA_ALIAS_MASK (1 << 13) 180 #define PMAP_WC 0x20 /* allow write combinimg */ 181 182 #ifdef _KERNEL 183 #ifdef PMAP_COUNT_DEBUG 184 /* diagnostic versions if PMAP_COUNT_DEBUG option is used */ 185 int pmap_count_res(struct pmap *); 186 int pmap_count_wired(struct pmap *); 187 #define pmap_resident_count(pm) pmap_count_res((pm)) 188 #define pmap_wired_count(pm) pmap_count_wired((pm)) 189 #else 190 #define pmap_resident_count(pm) ((pm)->pm_stats.resident_count) 191 #define pmap_wired_count(pm) ((pm)->pm_stats.wired_count) 192 #endif 193 194 #define pmap_phys_address(x) (x) 195 196 void pmap_activate_pmap(struct pmap *); 197 void pmap_update(struct pmap *); 198 void pmap_bootstrap(u_long, u_long); 199 200 /* make sure all page mappings are modulo 16K to prevent d$ aliasing */ 201 #define PMAP_PREFER(fo, va, sz, td) pmap_prefer((fo), (va), (td)) 202 static inline void 203 pmap_prefer(vaddr_t fo, vaddr_t *va, int td) 204 { 205 vaddr_t newva; 206 vaddr_t m; 207 208 m = 2 * PAGE_SIZE; 209 newva = (*va & ~(m - 1)) | (fo & (m - 1)); 210 211 if (td) { 212 if (newva > *va) 213 newva -= m; 214 } else { 215 if (newva < *va) 216 newva += m; 217 } 218 *va = newva; 219 } 220 221 #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ 222 #define PMAP_NEED_PROCWR 223 224 void pmap_procwr(struct proc *, vaddr_t, size_t); 225 226 /* SPARC specific? */ 227 int pmap_dumpsize(void); 228 int pmap_dumpmmu(int (*)(dev_t, daddr_t, void *, size_t), 229 daddr_t); 230 int pmap_pa_exists(paddr_t); 231 void switchexit(struct lwp *, int); 232 void pmap_kprotect(vaddr_t, vm_prot_t); 233 234 /* SPARC64 specific */ 235 void pmap_copy_page_phys(paddr_t, paddr_t); 236 void pmap_zero_page_phys(paddr_t); 237 238 #ifdef SUN4V 239 /* sun4v specific */ 240 void pmap_setup_intstack_sun4v(paddr_t); 241 void pmap_setup_tsb_sun4v(struct tsb_desc*); 242 #endif 243 244 /* Installed physical memory, as discovered during bootstrap. */ 245 extern int phys_installed_size; 246 extern struct mem_region *phys_installed; 247 248 #define __HAVE_VM_PAGE_MD 249 250 /* 251 * For each struct vm_page, there is a list of all currently valid virtual 252 * mappings of that page. An entry is a pv_entry_t. 253 */ 254 struct pmap; 255 typedef struct pv_entry { 256 struct pv_entry *pv_next; /* next pv_entry */ 257 struct pmap *pv_pmap; /* pmap where mapping lies */ 258 vaddr_t pv_va; /* virtual address for mapping */ 259 } *pv_entry_t; 260 /* PV flags encoded in the low bits of the VA of the first pv_entry */ 261 262 struct vm_page_md { 263 struct pv_entry mdpg_pvh; 264 }; 265 #define VM_MDPAGE_INIT(pg) \ 266 do { \ 267 (pg)->mdpage.mdpg_pvh.pv_next = NULL; \ 268 (pg)->mdpage.mdpg_pvh.pv_pmap = NULL; \ 269 (pg)->mdpage.mdpg_pvh.pv_va = 0; \ 270 } while (/*CONSTCOND*/0) 271 272 #ifdef MULTIPROCESSOR 273 #define pmap_ctx_cpu(PM, C) ((PM)->pm_ctx[(C)]) 274 #define pmap_ctx(PM) pmap_ctx_cpu((PM), cpu_number()) 275 #else 276 #define pmap_ctx(PM) ((PM)->pm_ctx[0]) 277 #endif 278 279 #endif /* _KERNEL */ 280 281 #endif /* _LOCORE */ 282 #endif /* _MACHINE_PMAP_H_ */ 283
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