reg.h revision 1.10
1 /* $NetBSD: reg.h,v 1.10 2002/05/16 23:29:42 eeh Exp $ */ 2 3 /* 4 * Copyright (c) 1996-2002 Eduardo Horvath. 5 * Copyright (c) 1992, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This software was developed by the Computer Systems Engineering group 9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10 * contributed to Berkeley. 11 * 12 * All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed by the University of 15 * California, Lawrence Berkeley Laboratory. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. All advertising materials mentioning features or use of this software 26 * must display the following acknowledgement: 27 * This product includes software developed by the University of 28 * California, Berkeley and its contributors. 29 * 4. Neither the name of the University nor the names of its contributors 30 * may be used to endorse or promote products derived from this software 31 * without specific prior written permission. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 * SUCH DAMAGE. 44 * 45 * @(#)reg.h 8.1 (Berkeley) 6/11/93 46 */ 47 48 #ifndef _MACHINE_REG_H_ 49 #define _MACHINE_REG_H_ 50 51 /* 52 * Registers passed to trap/syscall/etc. 53 * This structure is known to occupy exactly 80 bytes (see locore.s). 54 * Note, tf_global[0] is not actually written (since g0 is always 0). 55 * (The slot tf_global[0] is used to send a copy of %wim to kernel gdb. 56 * This is known as `cheating'.) 57 */ 58 struct trapframe32 { 59 int tf_psr; /* psr */ 60 int tf_pc; /* return pc */ 61 int tf_npc; /* return npc */ 62 int tf_y; /* %y register */ 63 int tf_global[8]; /* global registers in trap's caller */ 64 int tf_out[8]; /* output registers in trap's caller */ 65 }; 66 67 /* 68 * The v9 trapframe is a bit more complex. Since we don't get a free 69 * register window with each trap we need some way to keep track of 70 * pending traps. 71 * (The slot tf_global[0] is used to store the %fp when this is used 72 * as a clockframe. This is known as `cheating'.) 73 */ 74 75 struct trapframe64 { 76 int64_t tf_tstate; /* tstate register */ 77 int64_t tf_pc; /* return pc */ 78 int64_t tf_npc; /* return npc */ 79 int64_t tf_fault; /* faulting addr -- need somewhere to save it */ 80 int64_t tf_kstack; /* kernel stack of prev tf */ 81 int tf_y; /* %y register -- 32-bits */ 82 short tf_tt; /* What type of trap this was */ 83 char tf_pil; /* What IRQ we're handling */ 84 char tf_oldpil; /* What our old SPL was */ 85 int64_t tf_global[8]; /* global registers in trap's caller */ 86 /* n.b. tf_global[0] is used for fp when this is a clockframe */ 87 int64_t tf_out[8]; /* output registers in trap's caller */ 88 int64_t tf_local[8]; /* local registers in trap's caller (for debug) */ 89 int64_t tf_in[8]; /* in registers in trap's caller (for debug) */ 90 }; 91 92 93 /* 94 * Register windows. Each stack pointer (%o6 aka %sp) in each window 95 * must ALWAYS point to some place at which it is safe to scribble on 96 * 64 bytes. (If not, your process gets mangled.) Furthermore, each 97 * stack pointer should be aligned on an 8-byte boundary for v8 stacks 98 * or a 16-byte boundary (plus the BIAS) for v9 stacks (the kernel 99 * as currently coded allows arbitrary alignment, but with a hefty 100 * performance penalty). 101 */ 102 struct rwindow32 { 103 int rw_local[8]; /* %l0..%l7 */ 104 int rw_in[8]; /* %i0..%i7 */ 105 }; 106 107 /* Don't forget the BIAS!! */ 108 struct rwindow64 { 109 int64_t rw_local[8]; /* %l0..%l7 */ 110 int64_t rw_in[8]; /* %i0..%i7 */ 111 }; 112 113 /* 114 * Clone trapframe for now; this seems to be the more useful 115 * than the old struct reg above. 116 */ 117 struct reg32 { 118 int r_psr; /* psr */ 119 int r_pc; /* return pc */ 120 int r_npc; /* return npc */ 121 int r_y; /* %y register */ 122 int r_global[8]; /* global registers in trap's caller */ 123 int r_out[8]; /* output registers in trap's caller */ 124 }; 125 126 struct reg64 { 127 int64_t r_tstate; /* tstate register */ 128 int64_t r_pc; /* return pc */ 129 int64_t r_npc; /* return npc */ 130 int r_y; /* %y register -- 32-bits */ 131 int64_t r_global[8]; /* global registers in trap's caller */ 132 int64_t r_out[8]; /* output registers in trap's caller */ 133 }; 134 135 #include <machine/fsr.h> 136 137 /* 138 * FP coprocessor registers. 139 * 140 * FP_QSIZE is the maximum coprocessor instruction queue depth 141 * of any implementation on which the kernel will run. David Hough: 142 * ``I'd suggest allowing 16 ... allowing an indeterminate variable 143 * size would be even better''. Of course, we cannot do that; we 144 * need to malloc these. 145 * 146 * XXXX UltraSPARC processors don't implement a floating point queue. 147 */ 148 #define FP_QSIZE 16 149 #define ALIGNFPSTATE(f) ((struct fpstate64 *)(((long)(f))&(~BLOCK_ALIGN))) 150 151 struct fp_qentry { 152 int *fq_addr; /* the instruction's address */ 153 int fq_instr; /* the instruction itself */ 154 }; 155 156 struct fpstate64 { 157 u_int fs_regs[64]; /* our view is 64 32-bit registers */ 158 int64_t fs_fsr; /* %fsr */ 159 int fs_gsr; /* graphics state reg */ 160 int fs_qsize; /* actual queue depth */ 161 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 162 }; 163 164 /* 165 * For 32-bit emulations. 166 */ 167 struct fpstate32 { 168 u_int fs_regs[32]; /* our view is 32 32-bit registers */ 169 int fs_fsr; /* %fsr */ 170 int fs_qsize; /* actual queue depth */ 171 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 172 }; 173 174 /* 175 * The actual FP registers are made accessible (c.f. ptrace(2)) through 176 * a `struct fpreg'; <arch/sparc64/sparc64/process_machdep.c> relies on the 177 * fact that `fpreg' is a prefix of `fpstate'. 178 */ 179 struct fpreg64 { 180 u_int fr_regs[64]; /* our view is 64 32-bit registers */ 181 int64_t fr_fsr; /* %fsr */ 182 int fr_gsr; /* graphics state reg */ 183 }; 184 185 /* 186 * 32-bit fpreg used by 32-bit sparc CPUs 187 */ 188 struct fpreg32 { 189 u_int fr_regs[32]; /* our view is 32 32-bit registers */ 190 int fr_fsr; /* %fsr */ 191 }; 192 193 #if defined(__arch64__) 194 /* Here we gotta do naughty things to let gdb work on 32-bit binaries */ 195 #define reg reg64 196 #define fpreg fpreg64 197 #define fpstate fpstate64 198 #define trapframe trapframe64 199 #define rwindow rwindow64 200 #else 201 #define reg reg32 202 #define fpreg fpreg32 203 #define fpstate fpstate32 204 #define trapframe trapframe32 205 #define rwindow rwindow32 206 #endif 207 208 #endif /* _MACHINE_REG_H_ */ 209
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