reg.h revision 1.11
1 /* $NetBSD: reg.h,v 1.11 2003/08/07 16:29:50 agc Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)reg.h 8.1 (Berkeley) 6/11/93 41 */ 42 43 /* 44 * Copyright (c) 1996-2002 Eduardo Horvath. 45 * 46 * This software was developed by the Computer Systems Engineering group 47 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 48 * contributed to Berkeley. 49 * 50 * All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed by the University of 53 * California, Lawrence Berkeley Laboratory. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 3. All advertising materials mentioning features or use of this software 64 * must display the following acknowledgement: 65 * This product includes software developed by the University of 66 * California, Berkeley and its contributors. 67 * 4. Neither the name of the University nor the names of its contributors 68 * may be used to endorse or promote products derived from this software 69 * without specific prior written permission. 70 * 71 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 72 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 74 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 77 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 78 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 79 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 80 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 81 * SUCH DAMAGE. 82 * 83 * @(#)reg.h 8.1 (Berkeley) 6/11/93 84 */ 85 86 #ifndef _MACHINE_REG_H_ 87 #define _MACHINE_REG_H_ 88 89 /* 90 * Registers passed to trap/syscall/etc. 91 * This structure is known to occupy exactly 80 bytes (see locore.s). 92 * Note, tf_global[0] is not actually written (since g0 is always 0). 93 * (The slot tf_global[0] is used to send a copy of %wim to kernel gdb. 94 * This is known as `cheating'.) 95 */ 96 struct trapframe32 { 97 int tf_psr; /* psr */ 98 int tf_pc; /* return pc */ 99 int tf_npc; /* return npc */ 100 int tf_y; /* %y register */ 101 int tf_global[8]; /* global registers in trap's caller */ 102 int tf_out[8]; /* output registers in trap's caller */ 103 }; 104 105 /* 106 * The v9 trapframe is a bit more complex. Since we don't get a free 107 * register window with each trap we need some way to keep track of 108 * pending traps. 109 * (The slot tf_global[0] is used to store the %fp when this is used 110 * as a clockframe. This is known as `cheating'.) 111 */ 112 113 struct trapframe64 { 114 int64_t tf_tstate; /* tstate register */ 115 int64_t tf_pc; /* return pc */ 116 int64_t tf_npc; /* return npc */ 117 int64_t tf_fault; /* faulting addr -- need somewhere to save it */ 118 int64_t tf_kstack; /* kernel stack of prev tf */ 119 int tf_y; /* %y register -- 32-bits */ 120 short tf_tt; /* What type of trap this was */ 121 char tf_pil; /* What IRQ we're handling */ 122 char tf_oldpil; /* What our old SPL was */ 123 int64_t tf_global[8]; /* global registers in trap's caller */ 124 /* n.b. tf_global[0] is used for fp when this is a clockframe */ 125 int64_t tf_out[8]; /* output registers in trap's caller */ 126 int64_t tf_local[8]; /* local registers in trap's caller (for debug) */ 127 int64_t tf_in[8]; /* in registers in trap's caller (for debug) */ 128 }; 129 130 131 /* 132 * Register windows. Each stack pointer (%o6 aka %sp) in each window 133 * must ALWAYS point to some place at which it is safe to scribble on 134 * 64 bytes. (If not, your process gets mangled.) Furthermore, each 135 * stack pointer should be aligned on an 8-byte boundary for v8 stacks 136 * or a 16-byte boundary (plus the BIAS) for v9 stacks (the kernel 137 * as currently coded allows arbitrary alignment, but with a hefty 138 * performance penalty). 139 */ 140 struct rwindow32 { 141 int rw_local[8]; /* %l0..%l7 */ 142 int rw_in[8]; /* %i0..%i7 */ 143 }; 144 145 /* Don't forget the BIAS!! */ 146 struct rwindow64 { 147 int64_t rw_local[8]; /* %l0..%l7 */ 148 int64_t rw_in[8]; /* %i0..%i7 */ 149 }; 150 151 /* 152 * Clone trapframe for now; this seems to be the more useful 153 * than the old struct reg above. 154 */ 155 struct reg32 { 156 int r_psr; /* psr */ 157 int r_pc; /* return pc */ 158 int r_npc; /* return npc */ 159 int r_y; /* %y register */ 160 int r_global[8]; /* global registers in trap's caller */ 161 int r_out[8]; /* output registers in trap's caller */ 162 }; 163 164 struct reg64 { 165 int64_t r_tstate; /* tstate register */ 166 int64_t r_pc; /* return pc */ 167 int64_t r_npc; /* return npc */ 168 int r_y; /* %y register -- 32-bits */ 169 int64_t r_global[8]; /* global registers in trap's caller */ 170 int64_t r_out[8]; /* output registers in trap's caller */ 171 }; 172 173 #include <machine/fsr.h> 174 175 /* 176 * FP coprocessor registers. 177 * 178 * FP_QSIZE is the maximum coprocessor instruction queue depth 179 * of any implementation on which the kernel will run. David Hough: 180 * ``I'd suggest allowing 16 ... allowing an indeterminate variable 181 * size would be even better''. Of course, we cannot do that; we 182 * need to malloc these. 183 * 184 * XXXX UltraSPARC processors don't implement a floating point queue. 185 */ 186 #define FP_QSIZE 16 187 #define ALIGNFPSTATE(f) ((struct fpstate64 *)(((long)(f))&(~BLOCK_ALIGN))) 188 189 struct fp_qentry { 190 int *fq_addr; /* the instruction's address */ 191 int fq_instr; /* the instruction itself */ 192 }; 193 194 struct fpstate64 { 195 u_int fs_regs[64]; /* our view is 64 32-bit registers */ 196 int64_t fs_fsr; /* %fsr */ 197 int fs_gsr; /* graphics state reg */ 198 int fs_qsize; /* actual queue depth */ 199 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 200 }; 201 202 /* 203 * For 32-bit emulations. 204 */ 205 struct fpstate32 { 206 u_int fs_regs[32]; /* our view is 32 32-bit registers */ 207 int fs_fsr; /* %fsr */ 208 int fs_qsize; /* actual queue depth */ 209 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 210 }; 211 212 /* 213 * The actual FP registers are made accessible (c.f. ptrace(2)) through 214 * a `struct fpreg'; <arch/sparc64/sparc64/process_machdep.c> relies on the 215 * fact that `fpreg' is a prefix of `fpstate'. 216 */ 217 struct fpreg64 { 218 u_int fr_regs[64]; /* our view is 64 32-bit registers */ 219 int64_t fr_fsr; /* %fsr */ 220 int fr_gsr; /* graphics state reg */ 221 }; 222 223 /* 224 * 32-bit fpreg used by 32-bit sparc CPUs 225 */ 226 struct fpreg32 { 227 u_int fr_regs[32]; /* our view is 32 32-bit registers */ 228 int fr_fsr; /* %fsr */ 229 }; 230 231 #if defined(__arch64__) 232 /* Here we gotta do naughty things to let gdb work on 32-bit binaries */ 233 #define reg reg64 234 #define fpreg fpreg64 235 #define fpstate fpstate64 236 #define trapframe trapframe64 237 #define rwindow rwindow64 238 #else 239 #define reg reg32 240 #define fpreg fpreg32 241 #define fpstate fpstate32 242 #define trapframe trapframe32 243 #define rwindow rwindow32 244 #endif 245 246 #endif /* _MACHINE_REG_H_ */ 247
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