1 1.6 martin /* $NetBSD: if_ecreg.h,v 1.6 2008/04/28 20:23:37 martin Exp $ */ 2 1.1 fredette 3 1.1 fredette /* 4 1.1 fredette * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 1.1 fredette * All rights reserved. 6 1.1 fredette * 7 1.1 fredette * This code is derived from software contributed to The NetBSD Foundation 8 1.1 fredette * by Matthew Fredette. 9 1.1 fredette * 10 1.1 fredette * Redistribution and use in source and binary forms, with or without 11 1.1 fredette * modification, are permitted provided that the following conditions 12 1.1 fredette * are met: 13 1.1 fredette * 1. Redistributions of source code must retain the above copyright 14 1.1 fredette * notice, this list of conditions and the following disclaimer. 15 1.1 fredette * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 fredette * notice, this list of conditions and the following disclaimer in the 17 1.1 fredette * documentation and/or other materials provided with the distribution. 18 1.1 fredette * 19 1.1 fredette * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 fredette * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 fredette * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 fredette * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 fredette * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 fredette * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 fredette * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 fredette * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 fredette * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 fredette * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 fredette * POSSIBILITY OF SUCH DAMAGE. 30 1.1 fredette */ 31 1.1 fredette 32 1.1 fredette /* 33 1.1 fredette * 3Com Ethernet controller registers. 34 1.1 fredette */ 35 1.1 fredette 36 1.1 fredette #define EC_BUF_SZ 2048 37 1.1 fredette 38 1.1 fredette #if __for_reference_only__ 39 1.1 fredette struct ec_regs { 40 1.4 chs uint16_t ec_csr; /* control/status register */ 41 1.4 chs uint16_t ec_backoff; /* backoff seed */ 42 1.4 chs uint8_t ec_pad1[0x400 - (2 * sizeof(uint16_t))]; 43 1.1 fredette struct ether_addr ec_arom; /* address ROM */ 44 1.4 chs uint8_t ec_pad2[0x200 - sizeof(struct ether_addr)]; 45 1.1 fredette struct ether_addr ec_aram; /* address RAM */ 46 1.4 chs uint8_t ec_pad3[0x200 - sizeof(struct ether_addr)]; 47 1.4 chs uint8_t ec_tbuf[EC_BUF_SZ]; /* transmit buffer */ 48 1.4 chs uint8_t ec_abuf[EC_BUF_SZ]; /* receive buffer A */ 49 1.4 chs uint8_t ec_bbuf[EC_BUF_SZ]; /* receive buffer B */ 50 1.1 fredette }; 51 1.1 fredette #endif 52 1.1 fredette 53 1.1 fredette /* Register offsets. */ 54 1.1 fredette #define ECREG_CSR (0) 55 1.1 fredette #define ECREG_BACKOFF (2) 56 1.1 fredette #define ECREG_AROM (1024) 57 1.1 fredette #define ECREG_ARAM (1536) 58 1.1 fredette #define ECREG_TBUF (2048) 59 1.1 fredette #define ECREG_ABUF (ECREG_TBUF + EC_BUF_SZ) 60 1.1 fredette #define ECREG_BBUF (ECREG_ABUF + EC_BUF_SZ) 61 1.1 fredette #define ECREG_BANK_SZ (ECREG_BBUF + EC_BUF_SZ) 62 1.1 fredette 63 1.1 fredette /* 64 1.1 fredette * Control/status register bits 65 1.1 fredette */ 66 1.1 fredette #define EC_CSR_BBSW 0x8000 /* B buffer empty (belongs to card) */ 67 1.1 fredette #define EC_CSR_ABSW 0x4000 /* A buffer empty (belongs to card) */ 68 1.1 fredette #define EC_CSR_TBSW 0x2000 /* T buffer full (belongs to card) */ 69 1.1 fredette #define EC_CSR_JAM 0x1000 /* Ethernet jammed (collision) */ 70 1.1 fredette #define EC_CSR_AMSW 0x0800 /* address RAM belongs to ether */ 71 1.1 fredette #define EC_CSR_RBBA 0x0400 /* B buffer received before A */ 72 1.1 fredette #define EC_CSR_RESET 0x0100 /* reset the card */ 73 1.1 fredette #define EC_CSR_BINT 0x0080 /* B buffer interrupt enable */ 74 1.1 fredette #define EC_CSR_AINT 0x0040 /* A buffer interrupt enable */ 75 1.1 fredette #define EC_CSR_TINT 0x0020 /* T buffer interrupt enable */ 76 1.1 fredette #define EC_CSR_JINT 0x0010 /* jam interrupt enable */ 77 1.1 fredette #define EC_CSR_INTPA 0x00ff /* mask for interrupt and PA fields */ 78 1.1 fredette #define EC_CSR_PAMASK 0x000f /* PA field */ 79 1.1 fredette 80 1.1 fredette #define EC_CSR_PA 0x0007 /* receive mine+broadcast-errors */ 81 1.1 fredette #define EC_CSR_PROMISC 0x0001 /* receive all-errors */ 82 1.1 fredette 83 1.1 fredette /* 84 1.1 fredette * Turns an EC_CSR_xINT value into an ECREG_xBUF value. 85 1.1 fredette * NB: does not work with EC_CSR_TINT. 86 1.1 fredette */ 87 1.1 fredette #define EC_CSR_INT_BUF(x) (((x) << 5) + 2048) 88 1.1 fredette 89 1.1 fredette /* 90 1.1 fredette * Turns an EC_CSR_xINT value into an ECREG_xBSW value. 91 1.1 fredette */ 92 1.1 fredette #define EC_CSR_INT_BSW(x) ((x) << 8) 93 1.1 fredette 94 1.1 fredette /* 95 1.1 fredette * Receive status bits. The first 16 bits of a receive 96 1.1 fredette * buffer are a status word. 97 1.1 fredette */ 98 1.1 fredette #define EC_PKT_FCSERR 0x8000 /* FCS error */ 99 1.1 fredette #define EC_PKT_BROADCAST 0x4000 /* packet was broadcast */ 100 1.1 fredette #define EC_PKT_RGERR 0x2000 /* range error */ 101 1.1 fredette #define EC_PKT_ADDRMATCH 0x1000 /* address match */ 102 1.1 fredette #define EC_PKT_FRERR 0x0800 /* framing error */ 103 1.1 fredette #define EC_PKT_DOFF 0x07ff /* first free byte */ 104 1.1 fredette 105 1.2 fredette #define EC_PKT_MAXTDOFF (EC_BUF_SZ - (ETHER_MIN_LEN - ETHER_CRC_LEN)) /* max xmit doff (min size) */ 106 1.1 fredette #define EC_PKT_RDOFF 2 /* packet offset in buffer */ 107 1.2 fredette #define EC_PKT_MINRDOFF (EC_PKT_RDOFF + (ETHER_MIN_LEN - ETHER_CRC_LEN)) /* min packet doff (min size) */ 108 1.3 fredette #define EC_PKT_MAXRDOFF (EC_BUF_SZ - EC_PKT_RDOFF) /* max packet doff (max size) */ 109