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zs.c revision 1.22 
      1 /*	$NetBSD: zs.c,v 1.22 2021/04/24 23:36:49 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Gordon W. Ross.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Zilog Z8530 Dual UART driver (machine-dependent part)
     34  *
     35  * Runs two serial lines per chip using slave drivers.
     36  * Plain tty/async lines use the zs_async slave.
     37  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
     38  */
     39 
     40 #include <sys/cdefs.h>
     41 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.22 2021/04/24 23:36:49 thorpej Exp $");
     42 
     43 #include "opt_ddb.h"
     44 #include "opt_kgdb.h"
     45 
     46 #include <sys/param.h>
     47 #include <sys/systm.h>
     48 #include <sys/conf.h>
     49 #include <sys/device.h>
     50 #include <sys/file.h>
     51 #include <sys/ioctl.h>
     52 #include <sys/kernel.h>
     53 #include <sys/proc.h>
     54 #include <sys/tty.h>
     55 #include <sys/time.h>
     56 #include <sys/syslog.h>
     57 #include <sys/intr.h>
     58 
     59 #include <machine/autoconf.h>
     60 #include <machine/promlib.h>
     61 #include <machine/cpu.h>
     62 #include <machine/eeprom.h>
     63 #include <machine/psl.h>
     64 #include <machine/z8530var.h>
     65 
     66 #include <dev/cons.h>
     67 #include <dev/ic/z8530reg.h>
     68 #include <dev/sun/kbd_ms_ttyvar.h>
     69 #include <ddb/db_output.h>
     70 
     71 #include <sun2/dev/cons.h>
     72 
     73 #include "ioconf.h"
     74 #include "kbd.h"	/* NKBD */
     75 #include "ms.h"		/* NMS */
     76 
     77 /*
     78  * Some warts needed by z8530tty.c -
     79  * The default parity REALLY needs to be the same as the PROM uses,
     80  * or you can not see messages done with printf during boot-up...
     81  */
     82 int zs_def_cflag = (CREAD | CS8 | HUPCL);
     83 
     84 /* ZS channel used as the console device (if any) */
     85 void *zs_conschan_get, *zs_conschan_put;
     86 
     87 static uint8_t zs_init_reg[16] = {
     88 	0,	/* 0: CMD (reset, etc.) */
     89 	0,	/* 1: No interrupts yet. */
     90 #ifdef  ZS_INIT_IVECT
     91 	ZS_INIT_IVECT,	/* 2: IVECT */
     92 #else
     93 	0,	/* 2: IVECT */
     94 #endif
     95 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
     96 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
     97 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
     98 	0,	/* 6: TXSYNC/SYNCLO */
     99 	0,	/* 7: RXSYNC/SYNCHI */
    100 	0,	/* 8: alias for data port */
    101 #ifdef  ZS_INIT_IVECT
    102 	ZSWR9_MASTER_IE,
    103 #else
    104 	ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
    105 #endif
    106 	0,	/*10: Misc. TX/RX control bits */
    107 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
    108 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
    109 	0,			/*13: BAUDHI (default=9600) */
    110 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
    111 	ZSWR15_BREAK_IE,
    112 };
    113 
    114 /* Console ops */
    115 static int  zscngetc(dev_t);
    116 static void zscnputc(dev_t, int);
    117 static void zscnpollc(dev_t, int);
    118 
    119 struct consdev zs_consdev = {
    120 	NULL,
    121 	NULL,
    122 	zscngetc,
    123 	zscnputc,
    124 	zscnpollc,
    125 	NULL,
    126 };
    127 
    128 
    129 /****************************************************************
    130  * Autoconfig
    131  ****************************************************************/
    132 
    133 static int  zs_print(void *, const char *name);
    134 
    135 /* Interrupt handlers. */
    136 int zscheckintr(void *);
    137 static int zshard(void *);
    138 static void zssoft(void *);
    139 
    140 static int zs_get_speed(struct zs_chanstate *);
    141 
    142 /*
    143  * Attach a found zs.
    144  *
    145  * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
    146  * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
    147  */
    148 void
    149 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
    150 {
    151 	struct zsc_attach_args zsc_args;
    152 	struct zs_chanstate *cs;
    153 	int channel;
    154 
    155 	memset(&zsc_args, 0, sizeof zsc_args);
    156 	if (zsd == NULL) {
    157 		aprint_error(": configuration incomplete\n");
    158 		return;
    159 	}
    160 
    161 #if 0
    162 	/* we should use ipl2si(softpri) but it isn't exported */
    163 	aprint_normal(" softpri %d\n", _IPL_SOFT_LEVEL3);
    164 #else
    165 	aprint_normal("\n");
    166 #endif
    167 
    168 	/*
    169 	 * Initialize software state for each channel.
    170 	 */
    171 	for (channel = 0; channel < 2; channel++) {
    172 		struct zschan *zc;
    173 		device_t child;
    174 
    175 		zsc_args.channel = channel;
    176 		zsc_args.hwflags = 0;
    177 		cs = &zsc->zsc_cs_store[channel];
    178 		zsc->zsc_cs[channel] = cs;
    179 
    180 		zs_lock_init(cs);
    181 		cs->cs_channel = channel;
    182 		cs->cs_private = NULL;
    183 		cs->cs_ops = &zsops_null;
    184 		cs->cs_brg_clk = PCLK / 16;
    185 
    186 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
    187 
    188 		zsc_args.consdev = NULL;
    189 		zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
    190 						    zsc->zsc_node,
    191 						    channel);
    192 
    193 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
    194 			zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
    195 			zsc_args.consdev = &zs_consdev;
    196 		}
    197 
    198 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
    199 			zs_conschan_get = zc;
    200 		}
    201 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
    202 			zs_conschan_put = zc;
    203 		}
    204 
    205 		/* Children need to set cn_dev, etc */
    206 		cs->cs_reg_csr  = &zc->zc_csr;
    207 		cs->cs_reg_data = &zc->zc_data;
    208 
    209 		memcpy(cs->cs_creg, zs_init_reg, 16);
    210 		memcpy(cs->cs_preg, zs_init_reg, 16);
    211 
    212 		/* XXX: Consult PROM properties for this?! */
    213 		cs->cs_defspeed = zs_get_speed(cs);
    214 		cs->cs_defcflag = zs_def_cflag;
    215 
    216 		/* Make these correspond to cs_defcflag (-crtscts) */
    217 		cs->cs_rr0_dcd = ZSRR0_DCD;
    218 		cs->cs_rr0_cts = 0;
    219 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    220 		cs->cs_wr5_rts = 0;
    221 
    222 		/*
    223 		 * Clear the master interrupt enable.
    224 		 * The INTENA is common to both channels,
    225 		 * so just do it on the A channel.
    226 		 */
    227 		if (channel == 0) {
    228 			zs_write_reg(cs, 9, 0);
    229 		}
    230 
    231 		/*
    232 		 * Look for a child driver for this channel.
    233 		 * The child attach will setup the hardware.
    234 		 */
    235 		if ((child = config_found(zsc->zsc_dev, (void *)&zsc_args,
    236 		    zs_print, CFARG_EOL)) == NULL) {
    237 			/* No sub-driver.  Just reset it. */
    238 			uint8_t reset = (channel == 0) ?
    239 				ZSWR9_A_RESET : ZSWR9_B_RESET;
    240 			zs_lock_chan(cs);
    241 			zs_write_reg(cs,  9, reset);
    242 			zs_unlock_chan(cs);
    243 		}
    244 #if (NKBD > 0) || (NMS > 0)
    245 		/*
    246 		 * If this was a zstty it has a keyboard
    247 		 * property on it we need to attach the
    248 		 * sunkbd and sunms line disciplines.
    249 		 */
    250 		if (child
    251 		    && device_is_a(child, "zstty")) {
    252 			struct kbd_ms_tty_attach_args kma;
    253 			struct zstty_softc {
    254 				/*
    255 				 * The following are the only fields
    256 				 * we need here
    257 				 */
    258 				device_t zst_dev;
    259 				struct  tty *zst_tty;
    260 				struct	zs_chanstate *zst_cs;
    261 			} *zst = device_private(child);
    262 			struct tty *tp;
    263 
    264 			kma.kmta_tp = tp = zst->zst_tty;
    265 			if (tp != NULL) {
    266 				kma.kmta_dev = tp->t_dev;
    267 				kma.kmta_consdev = zsc_args.consdev;
    268 
    269 				/* Attach 'em if we got 'em. */
    270 				switch(zs_peripheral_type(zsc->zsc_promunit,
    271 						 	  zsc->zsc_node,
    272 						  	  channel)) {
    273 				case ZS_PERIPHERAL_SUNKBD:
    274 #if (NKBD > 0)
    275 					kma.kmta_name = "keyboard";
    276 					config_found(child, (void *)&kma, NULL,
    277 					    CFARG_EOL);
    278 #endif
    279 					break;
    280 				case ZS_PERIPHERAL_SUNMS:
    281 #if (NMS > 0)
    282 					kma.kmta_name = "mouse";
    283 					config_found(child, (void *)&kma, NULL,
    284 					    CFARG_EOL);
    285 #endif
    286 					break;
    287 				default:
    288 					break;
    289 				}
    290 			}
    291 		}
    292 #endif
    293 	}
    294 
    295 	/*
    296 	 * Now safe to install interrupt handlers.
    297 	 */
    298 	bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, 0, zshard, zsc);
    299 	if ((zsc->zsc_softintr = softint_establish(SOFTINT_SERIAL,
    300 	    zssoft, zsc)) == NULL)
    301 		panic("%s: could not establish soft interrupt", __func__);
    302 
    303 	evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
    304 	    device_xname(zsc->zsc_dev), "intr");
    305 
    306 
    307 	/*
    308 	 * Set the master interrupt enable and interrupt vector.
    309 	 * (common to both channels, do it on A)
    310 	 */
    311 	cs = zsc->zsc_cs[0];
    312 	zs_lock_chan(cs);
    313 	/* interrupt vector */
    314 	zs_write_reg(cs, 2, zs_init_reg[2]);
    315 	/* master interrupt control (enable) */
    316 	zs_write_reg(cs, 9, zs_init_reg[9]);
    317 	zs_unlock_chan(cs);
    318 
    319 }
    320 
    321 static int
    322 zs_print(void *aux, const char *name)
    323 {
    324 	struct zsc_attach_args *args = aux;
    325 
    326 	if (name != NULL)
    327 		aprint_normal("%s: ", name);
    328 
    329 	if (args->channel != -1)
    330 		aprint_normal(" channel %d", args->channel);
    331 
    332 	return (UNCONF);
    333 }
    334 
    335 static int
    336 zshard(void *arg)
    337 {
    338 	struct zsc_softc *zsc = arg;
    339 	int rval;
    340 	uint8_t rr3;
    341 
    342 	rval = 0;
    343 	while ((rr3 = zsc_intr_hard(zsc))) {
    344 		/* Count up the interrupts. */
    345 		rval |= rr3;
    346 		zsc->zsc_intrcnt.ev_count++;
    347 	}
    348 	if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
    349 	     (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
    350 	    zsc->zsc_softintr) {
    351 		softint_schedule(zsc->zsc_softintr);
    352 	}
    353 	return (rval);
    354 }
    355 
    356 int
    357 zscheckintr(void *arg)
    358 {
    359 	struct zsc_softc *zsc;
    360 	int unit, rval;
    361 
    362 	rval = 0;
    363 	for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
    364 
    365 		zsc = device_lookup_private(&zs_cd, unit);
    366 		if (zsc == NULL)
    367 			continue;
    368 		rval = (zshard((void *)zsc) || rval);
    369 	}
    370 	return (rval);
    371 }
    372 
    373 
    374 /*
    375  * We need this only for TTY_DEBUG purposes.
    376  */
    377 static void
    378 zssoft(void *arg)
    379 {
    380 	struct zsc_softc *zsc = arg;
    381 	int s;
    382 
    383 	/* Make sure we call the tty layer at spltty. */
    384 	s = spltty();
    385 	(void)zsc_intr_soft(zsc);
    386 #ifdef TTY_DEBUG
    387 	{
    388 		struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
    389 		struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
    390 		if (zst0->zst_overflows || zst1->zst_overflows ) {
    391 			struct trapframe *frame = arg;	/* XXX */
    392 
    393 			printf("zs silo overflow from %p\n",
    394 			    (long)frame->tf_pc);
    395 		}
    396 	}
    397 #endif
    398 	splx(s);
    399 }
    400 
    401 
    402 /*
    403  * Compute the current baud rate given a ZS channel.
    404  */
    405 static int
    406 zs_get_speed(struct zs_chanstate *cs)
    407 {
    408 	int tconst;
    409 
    410 	tconst = zs_read_reg(cs, 12);
    411 	tconst |= zs_read_reg(cs, 13) << 8;
    412 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
    413 }
    414 
    415 /*
    416  * MD functions for setting the baud rate and control modes.
    417  */
    418 int
    419 zs_set_speed(struct zs_chanstate *cs, int bps)
    420 {
    421 	int tconst, real_bps;
    422 
    423 	if (bps == 0)
    424 		return (0);
    425 
    426 #ifdef	DIAGNOSTIC
    427 	if (cs->cs_brg_clk == 0)
    428 		panic("zs_set_speed");
    429 #endif
    430 
    431 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
    432 	if (tconst < 0)
    433 		return (EINVAL);
    434 
    435 	/* Convert back to make sure we can do it. */
    436 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
    437 
    438 	/* XXX - Allow some tolerance here? */
    439 	if (real_bps != bps)
    440 		return (EINVAL);
    441 
    442 	cs->cs_preg[12] = tconst;
    443 	cs->cs_preg[13] = tconst >> 8;
    444 
    445 	/* Caller will stuff the pending registers. */
    446 	return (0);
    447 }
    448 
    449 int
    450 zs_set_modes(struct zs_chanstate *cs, int cflag	/* bits per second */)
    451 {
    452 
    453 	/*
    454 	 * Output hardware flow control on the chip is horrendous:
    455 	 * if carrier detect drops, the receiver is disabled, and if
    456 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
    457 	 * Therefore, NEVER set the HFC bit, and instead use the
    458 	 * status interrupt to detect CTS changes.
    459 	 */
    460 	zs_lock_chan(cs);
    461 	cs->cs_rr0_pps = 0;
    462 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
    463 		cs->cs_rr0_dcd = 0;
    464 		if ((cflag & MDMBUF) == 0)
    465 			cs->cs_rr0_pps = ZSRR0_DCD;
    466 	} else
    467 		cs->cs_rr0_dcd = ZSRR0_DCD;
    468 	if ((cflag & CRTSCTS) != 0) {
    469 		cs->cs_wr5_dtr = ZSWR5_DTR;
    470 		cs->cs_wr5_rts = ZSWR5_RTS;
    471 		cs->cs_rr0_cts = ZSRR0_CTS;
    472 	} else if ((cflag & CDTRCTS) != 0) {
    473 		cs->cs_wr5_dtr = 0;
    474 		cs->cs_wr5_rts = ZSWR5_DTR;
    475 		cs->cs_rr0_cts = ZSRR0_CTS;
    476 	} else if ((cflag & MDMBUF) != 0) {
    477 		cs->cs_wr5_dtr = 0;
    478 		cs->cs_wr5_rts = ZSWR5_DTR;
    479 		cs->cs_rr0_cts = ZSRR0_DCD;
    480 	} else {
    481 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
    482 		cs->cs_wr5_rts = 0;
    483 		cs->cs_rr0_cts = 0;
    484 	}
    485 	zs_unlock_chan(cs);
    486 
    487 	/* Caller will stuff the pending registers. */
    488 	return (0);
    489 }
    490 
    491 
    492 /*
    493  * Read or write the chip with suitable delays.
    494  */
    495 
    496 uint8_t
    497 zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
    498 {
    499 	uint8_t val;
    500 
    501 	*cs->cs_reg_csr = reg;
    502 	ZS_DELAY();
    503 	val = *cs->cs_reg_csr;
    504 	ZS_DELAY();
    505 	return (val);
    506 }
    507 
    508 void
    509 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
    510 {
    511 	*cs->cs_reg_csr = reg;
    512 	ZS_DELAY();
    513 	*cs->cs_reg_csr = val;
    514 	ZS_DELAY();
    515 }
    516 
    517 uint8_t
    518 zs_read_csr(struct zs_chanstate *cs)
    519 {
    520 	uint8_t val;
    521 
    522 	val = *cs->cs_reg_csr;
    523 	ZS_DELAY();
    524 	return (val);
    525 }
    526 
    527 void
    528 zs_write_csr(struct zs_chanstate *cs, uint8_t val)
    529 {
    530 	*cs->cs_reg_csr = val;
    531 	ZS_DELAY();
    532 }
    533 
    534 uint8_t
    535 zs_read_data(struct zs_chanstate *cs)
    536 {
    537 	uint8_t val;
    538 
    539 	val = *cs->cs_reg_data;
    540 	ZS_DELAY();
    541 	return (val);
    542 }
    543 
    544 void
    545 zs_write_data(struct zs_chanstate *cs, uint8_t val)
    546 {
    547 	*cs->cs_reg_data = val;
    548 	ZS_DELAY();
    549 }
    550 
    551 /****************************************************************
    552  * Console support functions (Sun specific!)
    553  * Note: this code is allowed to know about the layout of
    554  * the chip registers, and uses that to keep things simple.
    555  * XXX - I think I like the mvme167 code better. -gwr
    556  ****************************************************************/
    557 
    558 extern void Debugger(void);
    559 
    560 /*
    561  * Handle user request to enter kernel debugger.
    562  */
    563 void
    564 zs_abort(struct zs_chanstate *cs)
    565 {
    566 	volatile struct zschan *zc = zs_conschan_get;
    567 	int rr0;
    568 
    569 	/* Wait for end of break to avoid PROM abort. */
    570 	/* XXX - Limit the wait? */
    571 	do {
    572 		rr0 = zc->zc_csr;
    573 		ZS_DELAY();
    574 	} while (rr0 & ZSRR0_BREAK);
    575 
    576 #if defined(KGDB)
    577 	zskgdb(cs);
    578 #elif defined(DDB)
    579 	{
    580 		extern int db_active;
    581 
    582 		if (!db_active)
    583 			Debugger();
    584 		else
    585 			/* Debugger is probably hozed */
    586 			callrom();
    587 	}
    588 #else
    589 	printf("stopping on keyboard abort\n");
    590 	callrom();
    591 #endif
    592 }
    593 
    594 
    595 /*
    596  * Polled input char.
    597  */
    598 int
    599 zs_getc(void *arg)
    600 {
    601 	volatile struct zschan *zc = arg;
    602 	int s, c, rr0;
    603 
    604 	s = splhigh();
    605 	/* Wait for a character to arrive. */
    606 	do {
    607 		rr0 = zc->zc_csr;
    608 		ZS_DELAY();
    609 	} while ((rr0 & ZSRR0_RX_READY) == 0);
    610 
    611 	c = zc->zc_data;
    612 	ZS_DELAY();
    613 	splx(s);
    614 
    615 	/*
    616 	 * This is used by the kd driver to read scan codes,
    617 	 * so don't translate '\r' ==> '\n' here...
    618 	 */
    619 	return (c);
    620 }
    621 
    622 /*
    623  * Polled output char.
    624  */
    625 void
    626 zs_putc(void *arg, int c)
    627 {
    628 	volatile struct zschan *zc = arg;
    629 	int s, rr0;
    630 
    631 	s = splhigh();
    632 
    633 	/* Wait for transmitter to become ready. */
    634 	do {
    635 		rr0 = zc->zc_csr;
    636 		ZS_DELAY();
    637 	} while ((rr0 & ZSRR0_TX_READY) == 0);
    638 
    639 	/*
    640 	 * Send the next character.
    641 	 * Now you'd think that this could be followed by a ZS_DELAY()
    642 	 * just like all the other chip accesses, but it turns out that
    643 	 * the `transmit-ready' interrupt isn't de-asserted until
    644 	 * some period of time after the register write completes
    645 	 * (more than a couple instructions).  So to avoid stray
    646 	 * interrupts we put in the 2us delay regardless of CPU model.
    647 	 */
    648 	zc->zc_data = c;
    649 	delay(2);
    650 
    651 	splx(s);
    652 }
    653 
    654 /*****************************************************************/
    655 
    656 
    657 
    658 
    659 /*
    660  * Polled console input putchar.
    661  */
    662 static int
    663 zscngetc(dev_t dev)
    664 {
    665 	return (zs_getc(zs_conschan_get));
    666 }
    667 
    668 /*
    669  * Polled console output putchar.
    670  */
    671 static void
    672 zscnputc(dev_t dev, int c)
    673 {
    674 	zs_putc(zs_conschan_put, c);
    675 }
    676 
    677 int swallow_zsintrs;
    678 
    679 static void
    680 zscnpollc(dev_t dev, int on)
    681 {
    682 	/*
    683 	 * Need to tell zs driver to acknowledge all interrupts or we get
    684 	 * annoying spurious interrupt messages.  This is because mucking
    685 	 * with spl() levels during polling does not prevent interrupts from
    686 	 * being generated.
    687 	 */
    688 
    689 	if (on) swallow_zsintrs++;
    690 	else swallow_zsintrs--;
    691 }
    692 
    693