pte.h revision 1.3.8.2 1 1.3.8.2 nathanw /* $NetBSD: pte.h,v 1.3.8.2 2002/01/08 00:28:09 nathanw Exp $ */
2 1.3.8.2 nathanw
3 1.3.8.2 nathanw /*-
4 1.3.8.2 nathanw * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.3.8.2 nathanw * All rights reserved.
6 1.3.8.2 nathanw *
7 1.3.8.2 nathanw * Redistribution and use in source and binary forms, with or without
8 1.3.8.2 nathanw * modification, are permitted provided that the following conditions
9 1.3.8.2 nathanw * are met:
10 1.3.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
11 1.3.8.2 nathanw * notice, this list of conditions and the following disclaimer.
12 1.3.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
13 1.3.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
14 1.3.8.2 nathanw * documentation and/or other materials provided with the distribution.
15 1.3.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
16 1.3.8.2 nathanw * must display the following acknowledgement:
17 1.3.8.2 nathanw * This product includes software developed by the NetBSD
18 1.3.8.2 nathanw * Foundation, Inc. and its contributors.
19 1.3.8.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
20 1.3.8.2 nathanw * contributors may be used to endorse or promote products derived
21 1.3.8.2 nathanw * from this software without specific prior written permission.
22 1.3.8.2 nathanw *
23 1.3.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.3.8.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.3.8.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.3.8.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.3.8.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.3.8.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.3.8.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.3.8.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.3.8.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.3.8.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.3.8.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
34 1.3.8.2 nathanw */
35 1.3.8.2 nathanw
36 1.3.8.2 nathanw #ifndef _MACHINE_PTE_H
37 1.3.8.2 nathanw #define _MACHINE_PTE_H
38 1.3.8.2 nathanw
39 1.3.8.2 nathanw #define NCONTEXT 8
40 1.3.8.2 nathanw #define NPMEG 256
41 1.3.8.2 nathanw #define SEGINV (NPMEG-1)
42 1.3.8.2 nathanw #define NPAGSEG 16
43 1.3.8.2 nathanw #define NSEGMAP 512
44 1.3.8.2 nathanw
45 1.3.8.2 nathanw /*
46 1.3.8.2 nathanw * In our zeal to use the sun3 pmap with as few changes as possible,
47 1.3.8.2 nathanw * we pretend that sun2 page table entries work more like their sun3
48 1.3.8.2 nathanw * counterparts. Namely, we pretend that they simply have PG_WRITE
49 1.3.8.2 nathanw * and PG_SYSTEM bits, and we use get_pte and set_pte to translate
50 1.3.8.2 nathanw * entries between the two styles.
51 1.3.8.2 nathanw *
52 1.3.8.2 nathanw * All known valid protections in a real sun2 PTE are given in
53 1.3.8.2 nathanw * (disabled) defines below, and are displayed as bitmaps here:
54 1.3.8.2 nathanw *
55 1.3.8.2 nathanw * 3 2 2 2 2
56 1.3.8.2 nathanw * 0 9 8 7 6 meaning
57 1.3.8.2 nathanw * -------------------
58 1.3.8.2 nathanw * 1 1 1 0 0 PG_KW => a read/write kernel-only page.
59 1.3.8.2 nathanw * 1 0 1 0 0 PG_KR => a read-only kernel-only page.
60 1.3.8.2 nathanw * 1 1 1 1 1 PG_UW => a read/write kernel/user page.
61 1.3.8.2 nathanw * 1 0 1 1 0 PG_URKR => a read-only kernel/user page.
62 1.3.8.2 nathanw *
63 1.3.8.2 nathanw * The sun3 PTE protections we want to emulate are:
64 1.3.8.2 nathanw *
65 1.3.8.2 nathanw * PG_SYSTEM | PG_WRITE => a read/write kernel-only page.
66 1.3.8.2 nathanw * PG_SYSTEM => a read-only kernel-only page.
67 1.3.8.2 nathanw * PG_WRITE => a read/write kernel/user page.
68 1.3.8.2 nathanw * => a read-only kernel/user page.
69 1.3.8.2 nathanw *
70 1.3.8.2 nathanw * We want to assign values to PG_SYSTEM and PG_WRITE, and
71 1.3.8.2 nathanw * craft get_pte and set_pte to do a translation from and to the real
72 1.3.8.2 nathanw * hardware protections.
73 1.3.8.2 nathanw *
74 1.3.8.2 nathanw * We begin by noting that bits 30 and 28 are set in all known valid
75 1.3.8.2 nathanw * sun2 protections. Since we assume that the kernel can always read
76 1.3.8.2 nathanw * all pages in the system, we might as well call one of them the
77 1.3.8.2 nathanw * "kernel readable" bit, and say that the other is just always on.
78 1.3.8.2 nathanw * We deem bit 30 the "kernel readable" bit. There is some evidence
79 1.3.8.2 nathanw * that bit 28 may mean "not a device" (the PROM makes PTEs for its
80 1.3.8.2 nathanw * device mappings with bit 28 clear), but I'm not sure enough about
81 1.3.8.2 nathanw * this to do anything about it. So, set_pte will always set these
82 1.3.8.2 nathanw * bits when it loads a valid PTE, and get_pte will always clear them
83 1.3.8.2 nathanw * when it unloads a valid PTE.
84 1.3.8.2 nathanw *
85 1.3.8.2 nathanw * Bit 25, which SunOS calles the "fill on demand" bit, also needs
86 1.3.8.2 nathanw * to be set on all valid PTEs. Dunno any more about this bit.
87 1.3.8.2 nathanw *
88 1.3.8.2 nathanw * Next, we see that bit 27 is set for all pages the user can access,
89 1.3.8.2 nathanw * and clear otherwise. This bit has the opposite meaning of the sun3
90 1.3.8.2 nathanw * PG_SYSTEM bit, but that's OK - we will just define PG_SYSTEM to be
91 1.3.8.2 nathanw * bit 27, and set_pte and get_pte will invert it when loading or
92 1.3.8.2 nathanw * unloading a valid PTE.
93 1.3.8.2 nathanw *
94 1.3.8.2 nathanw * Bit 29 is set for all pages the kernel can write to. We define
95 1.3.8.2 nathanw * PG_WRITE to be bit 29. No inverting is done.
96 1.3.8.2 nathanw *
97 1.3.8.2 nathanw * That leaves us to take care of bit 26. This bit, and bit 27, need
98 1.3.8.2 nathanw * to be set for all pages the user can write to. On the sun3, all
99 1.3.8.2 nathanw * user-accessible pages that the kernel can write to, the user can
100 1.3.8.2 nathanw * also write to. We can use this fact to make set_pte set bit 26 iff
101 1.3.8.2 nathanw * the kernel can write to the page (PG_WRITE is set), and the user
102 1.3.8.2 nathanw * can also access the page (bit 27 is set, i.e., PG_SYSTEM was clear
103 1.3.8.2 nathanw * before set_pte inverted it).
104 1.3.8.2 nathanw *
105 1.3.8.2 nathanw * This is what makes set_pte tricky. It begins by clearing bit 26
106 1.3.8.2 nathanw * (this is paranoia, if all is working well, this bit should never be
107 1.3.8.2 nathanw * set in our pseudo-sun3 PTEs). It then flips PG_SYSTEM to become
108 1.3.8.2 nathanw * the user-accessible bit. Lastly, as the tricky part, it sets bits
109 1.3.8.2 nathanw * 30 and 28, *and* sets bit 26 by shifting the expression (pte &
110 1.3.8.2 nathanw * PG_WRITE) right by two to move the resulting "single bit" into the
111 1.3.8.2 nathanw * bit 27 position, ANDing that with bit 27 in the PTE (the
112 1.3.8.2 nathanw * user-accessible bit), shifting that right once more to line up with
113 1.3.8.2 nathanw * the target bit 26 in the PTE, and ORing it in. This will result in
114 1.3.8.2 nathanw * bit 26 being set if the pseudo-sun3 protection was simply PG_WRITE.
115 1.3.8.2 nathanw *
116 1.3.8.2 nathanw * This could be expressed with if .. else.. logic, but the bit
117 1.3.8.2 nathanw * shifts should compile into something that needs no branching.
118 1.3.8.2 nathanw *
119 1.3.8.2 nathanw * get_pte's job is easier. All it has to do is clear the always-set
120 1.3.8.2 nathanw * bits 30, 28, and 25, *and* clear bit 26, and flip PG_SYSTEM. It can
121 1.3.8.2 nathanw * clear bit 26 because the value that was there can always be derived
122 1.3.8.2 nathanw * from the resulting pseudo-sun3 PG_SYSTEM and PG_WRITE combination.
123 1.3.8.2 nathanw *
124 1.3.8.2 nathanw * And that's how we reuse the sun3 pmap.
125 1.3.8.2 nathanw */
126 1.3.8.2 nathanw #define PG_VALID 0x80000000
127 1.3.8.2 nathanw #define PG_WRITE 0x20000000
128 1.3.8.2 nathanw #define PG_NC 0x00000000
129 1.3.8.2 nathanw #define PG_SYSTEM 0x08000000
130 1.3.8.2 nathanw #if 0
131 1.3.8.2 nathanw #define PG_KW 0x70000000
132 1.3.8.2 nathanw #define PG_KR 0x50000000
133 1.3.8.2 nathanw #define PG_UW 0x7C000000
134 1.3.8.2 nathanw #define PG_URKR 0x58000000
135 1.3.8.2 nathanw #endif
136 1.3.8.2 nathanw #define PG_TYPE 0x00C00000
137 1.3.8.2 nathanw #define PG_REF 0x00200000
138 1.3.8.2 nathanw #define PG_MOD 0x00100000
139 1.3.8.2 nathanw
140 1.3.8.2 nathanw #define PG_SPECIAL (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC|PG_REF|PG_MOD)
141 1.3.8.2 nathanw #define PG_PERM (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC)
142 1.3.8.2 nathanw #define PG_MODREF (PG_REF|PG_MOD)
143 1.3.8.2 nathanw #define PG_FRAME 0x00000FFF
144 1.3.8.2 nathanw
145 1.3.8.2 nathanw #define PG_MOD_SHIFT 20
146 1.3.8.2 nathanw
147 1.3.8.2 nathanw /*
148 1.3.8.2 nathanw * At first glance, the need for two page types for the VME
149 1.3.8.2 nathanw * bus on the sun2 isn't obvious - it's a single 16 bit wide
150 1.3.8.2 nathanw * bus with 24 address lines, with the A16 devices simply
151 1.3.8.2 nathanw * found starting at addresses 0xff0000. No problem - use
152 1.3.8.2 nathanw * only one page type. But the sun2 VM page frame is only 12
153 1.3.8.2 nathanw * bits wide, with 11 bit wide page offsets, meaning only 23
154 1.3.8.2 nathanw * address bits, not enough to cover the entire VME bus. So
155 1.3.8.2 nathanw * we have two page types, with the low bit of the page type
156 1.3.8.2 nathanw * representing the 24th VME bus address bit.
157 1.3.8.2 nathanw */
158 1.3.8.2 nathanw #define OBMEM 0
159 1.3.8.2 nathanw #define OBIO 1
160 1.3.8.2 nathanw #define MBMEM 2 /* on the 2/120 */
161 1.3.8.2 nathanw #define VME0 2 /* on the 2/50 (VME addresses [0..0x7fffff]) */
162 1.3.8.2 nathanw #define MBIO 3 /* on the 2/120 */
163 1.3.8.2 nathanw #define VME8 3 /* on the 2/50 (VME addresses [0x800000..0xffffff]) */
164 1.3.8.2 nathanw #define PG_TYPE_SHIFT 22
165 1.3.8.2 nathanw
166 1.3.8.2 nathanw #define PG_INVAL 0x0
167 1.3.8.2 nathanw
168 1.3.8.2 nathanw #define MAKE_PGTYPE(x) ((x) << PG_TYPE_SHIFT)
169 1.3.8.2 nathanw #define PG_PFNUM(pte) (pte & PG_FRAME)
170 1.3.8.2 nathanw #define PG_PA(pte) (PG_PFNUM(pte) << PGSHIFT)
171 1.3.8.2 nathanw
172 1.3.8.2 nathanw #define PGT_MASK MAKE_PGTYPE(3)
173 1.3.8.2 nathanw #define PGT_OBMEM MAKE_PGTYPE(OBMEM) /* onboard memory */
174 1.3.8.2 nathanw #define PGT_OBIO MAKE_PGTYPE(OBIO) /* onboard I/O */
175 1.3.8.2 nathanw #define PGT_MBMEM MAKE_PGTYPE(MBMEM) /* on the 2/120 */
176 1.3.8.2 nathanw #define PGT_VME0 MAKE_PGTYPE(VME0) /* on the 2/50 */
177 1.3.8.2 nathanw #define PGT_MBIO MAKE_PGTYPE(MBIO) /* on the 2/120 */
178 1.3.8.2 nathanw #define PGT_VME8 MAKE_PGTYPE(VME8) /* on the 2/50 */
179 1.3.8.2 nathanw
180 1.3.8.2 nathanw #define VA_SEGNUM(x) ((u_int)(x) >> SEGSHIFT)
181 1.3.8.2 nathanw
182 1.3.8.2 nathanw #define VA_PTE_NUM_SHIFT PGSHIFT
183 1.3.8.2 nathanw #define VA_PTE_NUM_MASK (((1 << SEGSHIFT) - 1) ^ ((1 << PGSHIFT) - 1))
184 1.3.8.2 nathanw #define VA_PTE_NUM(va) ((va & VA_PTE_NUM_MASK) >> VA_PTE_NUM_SHIFT)
185 1.3.8.2 nathanw
186 1.3.8.2 nathanw #define PA_PGNUM(pa) ((unsigned)pa >> PGSHIFT)
187 1.3.8.2 nathanw
188 1.3.8.2 nathanw #if defined(_KERNEL) || defined(_STANDALONE)
189 1.3.8.2 nathanw #define kernel_context() get_context(); set_context(0)
190 1.3.8.2 nathanw #define restore_context set_context
191 1.3.8.2 nathanw u_int get_pte __P((vaddr_t va));
192 1.3.8.2 nathanw void set_pte __P((vaddr_t va, u_int pte));
193 1.3.8.2 nathanw #endif /* _KERNEL */
194 1.3.8.2 nathanw
195 1.3.8.2 nathanw #endif /* _MACHINE_PTE_H */
196