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pte.h revision 1.5
      1 /*	$NetBSD: pte.h,v 1.5 2005/01/22 15:36:09 chs Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *        This product includes software developed by the NetBSD
     18  *        Foundation, Inc. and its contributors.
     19  * 4. Neither the name of The NetBSD Foundation nor the names of its
     20  *    contributors may be used to endorse or promote products derived
     21  *    from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33  * POSSIBILITY OF SUCH DAMAGE.
     34  */
     35 
     36 #ifndef	_MACHINE_PTE_H
     37 #define	_MACHINE_PTE_H
     38 
     39 #define NCONTEXT 8
     40 #define NPMEG	256
     41 #define SEGINV	(NPMEG-1)
     42 #define NPAGSEG 16
     43 #define NSEGMAP 512
     44 
     45 /*
     46  * In our zeal to use the sun3 pmap with as few changes as possible,
     47  * we pretend that sun2 page table entries work more like their sun3
     48  * counterparts.  Namely, we pretend that they simply have PG_WRITE
     49  * and PG_SYSTEM bits, and we use get_pte and set_pte to translate
     50  * entries between the two styles.
     51  *
     52  * All known valid protections in a real sun2 PTE are given in
     53  * (disabled) defines below, and are displayed as bitmaps here:
     54  *
     55  * 3 2 2 2 2
     56  * 0 9 8 7 6   meaning
     57  * -------------------
     58  * 1 1 1 0 0   PG_KW => a read/write kernel-only page.
     59  * 1 0 1 0 0   PG_KR => a read-only kernel-only page.
     60  * 1 1 1 1 1   PG_UW => a read/write kernel/user page.
     61  * 1 0 1 1 0   PG_URKR => a read-only kernel/user page.
     62  *
     63  * The sun3 PTE protections we want to emulate are:
     64  *
     65  * PG_SYSTEM | PG_WRITE => a read/write kernel-only page.
     66  * PG_SYSTEM            => a read-only kernel-only page.
     67  *             PG_WRITE => a read/write kernel/user page.
     68  *                      => a read-only kernel/user page.
     69  *
     70  * We want to assign values to PG_SYSTEM and PG_WRITE, and
     71  * craft get_pte and set_pte to do a translation from and to the real
     72  * hardware protections.
     73  *
     74  * We begin by noting that bits 30 and 28 are set in all known valid
     75  * sun2 protections.  Since we assume that the kernel can always read
     76  * all pages in the system, we might as well call one of them the
     77  * "kernel readable" bit, and say that the other is just always on.
     78  * We deem bit 30 the "kernel readable" bit.  There is some evidence
     79  * that bit 28 may mean "not a device" (the PROM makes PTEs for its
     80  * device mappings with bit 28 clear), but I'm not sure enough about
     81  * this to do anything about it.  So, set_pte will always set these
     82  * bits when it loads a valid PTE, and get_pte will always clear them
     83  * when it unloads a valid PTE.
     84  *
     85  * Bit 25, which SunOS calles the "fill on demand" bit, also needs
     86  * to be set on all valid PTEs.  Dunno any more about this bit.
     87  *
     88  * Next, we see that bit 27 is set for all pages the user can access,
     89  * and clear otherwise.  This bit has the opposite meaning of the sun3
     90  * PG_SYSTEM bit, but that's OK - we will just define PG_SYSTEM to be
     91  * bit 27, and set_pte and get_pte will invert it when loading or
     92  * unloading a valid PTE.
     93  *
     94  * Bit 29 is set for all pages the kernel can write to.  We define
     95  * PG_WRITE to be bit 29.  No inverting is done.
     96  *
     97  * That leaves us to take care of bit 26.  This bit, and bit 27, need
     98  * to be set for all pages the user can write to.  On the sun3, all
     99  * user-accessible pages that the kernel can write to, the user can
    100  * also write to.  We can use this fact to make set_pte set bit 26 iff
    101  * the kernel can write to the page (PG_WRITE is set), and the user
    102  * can also access the page (bit 27 is set, i.e., PG_SYSTEM was clear
    103  * before set_pte inverted it).
    104  *
    105  * This is what makes set_pte tricky.  It begins by clearing bit 26
    106  * (this is paranoia, if all is working well, this bit should never be
    107  * set in our pseudo-sun3 PTEs).  It then flips PG_SYSTEM to become
    108  * the user-accessible bit.  Lastly, as the tricky part, it sets bits
    109  * 30 and 28, *and* sets bit 26 by shifting the expression (pte &
    110  * PG_WRITE) right by two to move the resulting "single bit" into the
    111  * bit 27 position, ANDing that with bit 27 in the PTE (the
    112  * user-accessible bit), shifting that right once more to line up with
    113  * the target bit 26 in the PTE, and ORing it in.  This will result in
    114  * bit 26 being set if the pseudo-sun3 protection was simply PG_WRITE.
    115  *
    116  * This could be expressed with if .. else.. logic, but the bit
    117  * shifts should compile into something that needs no branching.
    118  *
    119  * get_pte's job is easier.  All it has to do is clear the always-set
    120  * bits 30, 28, and 25, *and* clear bit 26, and flip PG_SYSTEM.  It can
    121  * clear bit 26 because the value that was there can always be derived
    122  * from the resulting pseudo-sun3 PG_SYSTEM and PG_WRITE combination.
    123  *
    124  * And that's how we reuse the sun3 pmap.
    125  */
    126 #define PG_VALID   0x80000000
    127 #define PG_WRITE   0x20000000
    128 #define PG_NC      0x00000000
    129 #define PG_SYSTEM  0x08000000
    130 #if 0
    131 #define PG_KW      0x70000000
    132 #define PG_KR      0x50000000
    133 #define PG_UW      0x7C000000
    134 #define PG_URKR    0x58000000
    135 #endif
    136 #define PG_TYPE    0x00C00000
    137 #define PG_REF     0x00200000
    138 #define PG_MOD     0x00100000
    139 
    140 #define PG_SPECIAL (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC|PG_REF|PG_MOD)
    141 #define PG_PERM    (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC)
    142 #define	PG_MODREF  (PG_REF|PG_MOD)
    143 #define PG_FRAME   0x00000FFF
    144 
    145 #define PG_MOD_SHIFT 20
    146 
    147 /*
    148  * At first glance, the need for two page types for the VME
    149  * bus on the sun2 isn't obvious - it's a single 16 bit wide
    150  * bus with 24 address lines, with the A16 devices simply
    151  * found starting at addresses 0xff0000.  No problem - use
    152  * only one page type.  But the sun2 VM page frame is only 12
    153  * bits wide, with 11 bit wide page offsets, meaning only 23
    154  * address bits, not enough to cover the entire VME bus.  So
    155  * we have two page types, with the low bit of the page type
    156  * representing the 24th VME bus address bit.
    157  */
    158 #define OBMEM	0
    159 #define OBIO 	1
    160 #define MBMEM	2	/* on the 2/120 */
    161 #define VME0	2	/* on the 2/50 (VME addresses [0..0x7fffff]) */
    162 #define MBIO	3	/* on the 2/120 */
    163 #define VME8	3	/* on the 2/50 (VME addresses [0x800000..0xffffff]) */
    164 #define PG_TYPE_SHIFT 22
    165 
    166 #define PG_INVAL   0x0
    167 
    168 #define MAKE_PGTYPE(x) ((x) << PG_TYPE_SHIFT)
    169 #define PG_PFNUM(pte) (pte & PG_FRAME)
    170 #define PG_PA(pte) (PG_PFNUM(pte) << PGSHIFT)
    171 
    172 #define	PGT_MASK	MAKE_PGTYPE(3)
    173 #define	PGT_OBMEM	MAKE_PGTYPE(OBMEM)		/* onboard memory */
    174 #define	PGT_OBIO	MAKE_PGTYPE(OBIO)		/* onboard I/O */
    175 #define	PGT_MBMEM	MAKE_PGTYPE(MBMEM)	/* on the 2/120 */
    176 #define	PGT_VME0	MAKE_PGTYPE(VME0)	/* on the 2/50 */
    177 #define	PGT_MBIO	MAKE_PGTYPE(MBIO)	/* on the 2/120 */
    178 #define	PGT_VME8	MAKE_PGTYPE(VME8)	/* on the 2/50 */
    179 
    180 #define VA_SEGNUM(x)	((u_int)(x) >> SEGSHIFT)
    181 
    182 #define VA_PTE_NUM_SHIFT  PGSHIFT
    183 #define VA_PTE_NUM_MASK   (((1 << SEGSHIFT) - 1) ^ ((1 << PGSHIFT) - 1))
    184 #define VA_PTE_NUM(va) ((va & VA_PTE_NUM_MASK) >> VA_PTE_NUM_SHIFT)
    185 
    186 #define PA_PGNUM(pa) ((unsigned)pa >> PGSHIFT)
    187 
    188 #if defined(_KERNEL) || defined(_STANDALONE)
    189 #define kernel_context() get_context(); set_context(0)
    190 #define restore_context set_context
    191 u_int get_pte(vaddr_t);
    192 void  set_pte(vaddr_t, u_int);
    193 #endif	/* _KERNEL */
    194 
    195 #endif	/* _MACHINE_PTE_H */
    196