btreg.h revision 1.1 1 1.1 gwr /* $NetBSD: btreg.h,v 1.1 1995/03/10 01:50:41 gwr Exp $ */
2 1.1 gwr
3 1.1 gwr /*
4 1.1 gwr * Copyright (c) 1993
5 1.1 gwr * The Regents of the University of California. All rights reserved.
6 1.1 gwr *
7 1.1 gwr * This software was developed by the Computer Systems Engineering group
8 1.1 gwr * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 1.1 gwr * contributed to Berkeley.
10 1.1 gwr *
11 1.1 gwr * All advertising materials mentioning features or use of this software
12 1.1 gwr * must display the following acknowledgement:
13 1.1 gwr * This product includes software developed by the University of
14 1.1 gwr * California, Lawrence Berkeley Laboratory.
15 1.1 gwr *
16 1.1 gwr * Redistribution and use in source and binary forms, with or without
17 1.1 gwr * modification, are permitted provided that the following conditions
18 1.1 gwr * are met:
19 1.1 gwr * 1. Redistributions of source code must retain the above copyright
20 1.1 gwr * notice, this list of conditions and the following disclaimer.
21 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
22 1.1 gwr * notice, this list of conditions and the following disclaimer in the
23 1.1 gwr * documentation and/or other materials provided with the distribution.
24 1.1 gwr * 3. All advertising materials mentioning features or use of this software
25 1.1 gwr * must display the following acknowledgement:
26 1.1 gwr * This product includes software developed by the University of
27 1.1 gwr * California, Berkeley and its contributors.
28 1.1 gwr * 4. Neither the name of the University nor the names of its contributors
29 1.1 gwr * may be used to endorse or promote products derived from this software
30 1.1 gwr * without specific prior written permission.
31 1.1 gwr *
32 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 1.1 gwr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 1.1 gwr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 1.1 gwr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 1.1 gwr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 1.1 gwr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 1.1 gwr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 1.1 gwr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 1.1 gwr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 1.1 gwr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 1.1 gwr * SUCH DAMAGE.
43 1.1 gwr *
44 1.1 gwr * @(#)btreg.h 8.2 (Berkeley) 1/21/94
45 1.1 gwr */
46 1.1 gwr
47 1.1 gwr /*
48 1.1 gwr * Several Sun color frame buffers use some kind of Brooktree video
49 1.1 gwr * DAC (e.g., the Bt458, -- in any case, Brooktree make the only
50 1.1 gwr * decent color frame buffer chips).
51 1.1 gwr *
52 1.1 gwr * Color map control on these is a bit funky in a SPARCstation.
53 1.1 gwr * To update the color map one would normally do byte writes, but
54 1.1 gwr * the hardware takes longword writes. Since there are three
55 1.1 gwr * registers for each color map entry (R, then G, then B), we have
56 1.1 gwr * to set color 1 with a write to address 0 (setting 0's R/G/B and
57 1.1 gwr * color 1's R) followed by a second write to address 1 (setting
58 1.1 gwr * color 1's G/B and color 2's R/G). Software must therefore keep
59 1.1 gwr * a copy of the current map.
60 1.1 gwr *
61 1.1 gwr * The colormap address register increments automatically, so the
62 1.1 gwr * above write is done as:
63 1.1 gwr *
64 1.1 gwr * bt->bt_addr = 0;
65 1.1 gwr * bt->bt_cmap = R0G0B0R1;
66 1.1 gwr * bt->bt_cmap = G1B1R2G2;
67 1.1 gwr * ...
68 1.1 gwr *
69 1.1 gwr * Yow!
70 1.1 gwr *
71 1.1 gwr * Bonus complication: on the cg6, only the top 8 bits of each 32 bit
72 1.1 gwr * register matter, even though the cg3 takes all the bits from all
73 1.1 gwr * bytes written to it.
74 1.1 gwr */
75 1.1 gwr struct bt_regs {
76 1.1 gwr u_int bt_addr; /* map address register */
77 1.1 gwr u_int bt_cmap; /* colormap data register */
78 1.1 gwr u_int bt_ctrl; /* control register */
79 1.1 gwr u_int bt_omap; /* overlay (cursor) map register */
80 1.1 gwr };
81