cg4.c revision 1.13 1 1.13 thorpej /* $NetBSD: cg4.c,v 1.13 1998/01/12 20:32:19 thorpej Exp $ */
2 1.1 gwr
3 1.1 gwr /*
4 1.1 gwr * Copyright (c) 1992, 1993
5 1.1 gwr * The Regents of the University of California. All rights reserved.
6 1.1 gwr *
7 1.1 gwr * This software was developed by the Computer Systems Engineering group
8 1.1 gwr * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 1.1 gwr * contributed to Berkeley.
10 1.1 gwr *
11 1.1 gwr * All advertising materials mentioning features or use of this software
12 1.1 gwr * must display the following acknowledgement:
13 1.1 gwr * This product includes software developed by the University of
14 1.1 gwr * California, Lawrence Berkeley Laboratory.
15 1.1 gwr *
16 1.1 gwr * Redistribution and use in source and binary forms, with or without
17 1.1 gwr * modification, are permitted provided that the following conditions
18 1.1 gwr * are met:
19 1.1 gwr * 1. Redistributions of source code must retain the above copyright
20 1.1 gwr * notice, this list of conditions and the following disclaimer.
21 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright
22 1.1 gwr * notice, this list of conditions and the following disclaimer in the
23 1.1 gwr * documentation and/or other materials provided with the distribution.
24 1.1 gwr * 3. All advertising materials mentioning features or use of this software
25 1.1 gwr * must display the following acknowledgement:
26 1.1 gwr * This product includes software developed by the University of
27 1.1 gwr * California, Berkeley and its contributors.
28 1.1 gwr * 4. Neither the name of the University nor the names of its contributors
29 1.1 gwr * may be used to endorse or promote products derived from this software
30 1.1 gwr * without specific prior written permission.
31 1.1 gwr *
32 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 1.1 gwr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 1.1 gwr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 1.1 gwr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 1.1 gwr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 1.1 gwr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 1.1 gwr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 1.1 gwr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 1.1 gwr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 1.1 gwr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42 1.1 gwr * SUCH DAMAGE.
43 1.1 gwr *
44 1.1 gwr * from: @(#)cgthree.c 8.2 (Berkeley) 10/30/93
45 1.1 gwr */
46 1.1 gwr
47 1.1 gwr /*
48 1.1 gwr * color display (cg4) driver.
49 1.1 gwr *
50 1.11 gwr * Credits, history:
51 1.11 gwr * Gordon Ross created this driver based on the cg3 driver from
52 1.11 gwr * the sparc port as distributed in BSD 4.4 Lite, but included
53 1.11 gwr * support for only the "type B" adapter (Brooktree DACs).
54 1.11 gwr * Ezra Story added support for the "type A" (AMD DACs).
55 1.1 gwr *
56 1.11 gwr * Todo:
57 1.11 gwr * Make this driver handle video interrupts.
58 1.11 gwr * Defer colormap updates to vertical retrace interrupts.
59 1.1 gwr */
60 1.1 gwr
61 1.1 gwr #include <sys/param.h>
62 1.11 gwr #include <sys/systm.h>
63 1.12 gwr #include <sys/conf.h>
64 1.1 gwr #include <sys/device.h>
65 1.1 gwr #include <sys/ioctl.h>
66 1.1 gwr #include <sys/malloc.h>
67 1.1 gwr #include <sys/mman.h>
68 1.12 gwr #include <sys/proc.h>
69 1.1 gwr #include <sys/tty.h>
70 1.1 gwr
71 1.1 gwr #include <vm/vm.h>
72 1.1 gwr
73 1.12 gwr #include <machine/autoconf.h>
74 1.2 gwr #include <machine/cpu.h>
75 1.1 gwr #include <machine/fbio.h>
76 1.12 gwr #include <machine/idprom.h>
77 1.1 gwr #include <machine/pmap.h>
78 1.1 gwr
79 1.1 gwr #include "fbvar.h"
80 1.1 gwr #include "btreg.h"
81 1.1 gwr #include "btvar.h"
82 1.1 gwr #include "cg4reg.h"
83 1.1 gwr
84 1.12 gwr cdev_decl(cg4);
85 1.12 gwr
86 1.11 gwr #define CG4_MMAP_SIZE (CG4_OVERLAY_SIZE + CG4_ENABLE_SIZE + CG4_PIXMAP_SIZE)
87 1.11 gwr
88 1.2 gwr extern unsigned char cpu_machine_id;
89 1.2 gwr
90 1.11 gwr #define CMAP_SIZE 256
91 1.11 gwr struct soft_cmap {
92 1.11 gwr u_char r[CMAP_SIZE];
93 1.11 gwr u_char g[CMAP_SIZE];
94 1.11 gwr u_char b[CMAP_SIZE];
95 1.11 gwr };
96 1.11 gwr
97 1.1 gwr /* per-display variables */
98 1.1 gwr struct cg4_softc {
99 1.1 gwr struct device sc_dev; /* base device */
100 1.1 gwr struct fbdevice sc_fb; /* frame buffer device */
101 1.11 gwr int sc_cg4type; /* A or B */
102 1.11 gwr void *sc_va_cmap; /* Colormap h/w (mapped KVA) */
103 1.11 gwr int sc_pa_overlay; /* phys. addr. of overlay plane */
104 1.11 gwr int sc_pa_enable; /* phys. addr. of enable plane */
105 1.11 gwr int sc_pa_pixmap; /* phys. addr. of color plane */
106 1.1 gwr int sc_blanked; /* true if blanked */
107 1.11 gwr
108 1.11 gwr union bt_cmap *sc_btcm; /* Brooktree color map */
109 1.11 gwr struct soft_cmap sc_cmap; /* Generic soft colormap. */
110 1.1 gwr };
111 1.1 gwr
112 1.1 gwr /* autoconfiguration driver */
113 1.1 gwr static void cg4attach __P((struct device *, struct device *, void *));
114 1.12 gwr static int cg4match __P((struct device *, struct cfdata *, void *));
115 1.1 gwr
116 1.7 thorpej struct cfattach cgfour_ca = {
117 1.7 thorpej sizeof(struct cg4_softc), cg4match, cg4attach
118 1.7 thorpej };
119 1.7 thorpej
120 1.13 thorpej extern struct cfdriver cgfour_cd;
121 1.1 gwr
122 1.12 gwr static int cg4gattr __P((struct fbdevice *, void *));
123 1.12 gwr static int cg4gvideo __P((struct fbdevice *, void *));
124 1.12 gwr static int cg4svideo __P((struct fbdevice *, void *));
125 1.12 gwr static int cg4getcmap __P((struct fbdevice *, void *));
126 1.12 gwr static int cg4putcmap __P((struct fbdevice *, void *));
127 1.1 gwr
128 1.11 gwr static void cg4a_init __P((struct cg4_softc *));
129 1.11 gwr static void cg4a_svideo __P((struct cg4_softc *, int));
130 1.11 gwr static void cg4a_ldcmap __P((struct cg4_softc *));
131 1.11 gwr
132 1.11 gwr static void cg4b_init __P((struct cg4_softc *));
133 1.11 gwr static void cg4b_svideo __P((struct cg4_softc *, int));
134 1.11 gwr static void cg4b_ldcmap __P((struct cg4_softc *));
135 1.11 gwr
136 1.11 gwr static struct fbdriver cg4_fbdriver = {
137 1.6 gwr cg4open, cg4close, cg4mmap, cg4gattr,
138 1.1 gwr cg4gvideo, cg4svideo,
139 1.1 gwr cg4getcmap, cg4putcmap };
140 1.1 gwr
141 1.1 gwr /*
142 1.1 gwr * Match a cg4.
143 1.1 gwr */
144 1.1 gwr static int
145 1.12 gwr cg4match(parent, cf, args)
146 1.1 gwr struct device *parent;
147 1.12 gwr struct cfdata *cf;
148 1.12 gwr void *args;
149 1.1 gwr {
150 1.1 gwr struct confargs *ca = args;
151 1.11 gwr int paddr;
152 1.2 gwr
153 1.11 gwr /* XXX: Huge hack due to lack of probe info... */
154 1.11 gwr /* XXX: Machines that might have a cg4 (gag). */
155 1.11 gwr /* XXX: Need info on the "P4" register... */
156 1.2 gwr switch (cpu_machine_id) {
157 1.11 gwr
158 1.11 gwr case SUN3_MACH_110:
159 1.11 gwr /* XXX: Assume type A. */
160 1.11 gwr if (ca->ca_paddr == -1)
161 1.11 gwr ca->ca_paddr = CG4A_DEF_BASE;
162 1.11 gwr if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
163 1.11 gwr return (0);
164 1.11 gwr if (bus_peek(BUS_OBIO, CG4A_OBIO_CMAP, 1) == -1)
165 1.11 gwr return (0);
166 1.11 gwr break;
167 1.11 gwr
168 1.2 gwr case SUN3_MACH_60:
169 1.11 gwr /* XXX: Assume type A. */
170 1.11 gwr if (ca->ca_paddr == -1)
171 1.11 gwr ca->ca_paddr = CG4B_DEF_BASE;
172 1.11 gwr paddr = ca->ca_paddr;
173 1.11 gwr if (bus_peek(ca->ca_bustype, paddr, 1) == -1)
174 1.11 gwr return (0);
175 1.11 gwr /* Make sure we're color */
176 1.11 gwr paddr += CG4B_OFF_PIXMAP;
177 1.11 gwr if (bus_peek(ca->ca_bustype, paddr, 1) == -1)
178 1.11 gwr return (0);
179 1.2 gwr break;
180 1.11 gwr
181 1.2 gwr default:
182 1.2 gwr return (0);
183 1.2 gwr }
184 1.1 gwr
185 1.3 gwr return (1);
186 1.1 gwr }
187 1.1 gwr
188 1.1 gwr /*
189 1.1 gwr * Attach a display. We need to notice if it is the console, too.
190 1.1 gwr */
191 1.1 gwr static void
192 1.1 gwr cg4attach(parent, self, args)
193 1.1 gwr struct device *parent, *self;
194 1.1 gwr void *args;
195 1.1 gwr {
196 1.1 gwr struct cg4_softc *sc = (struct cg4_softc *)self;
197 1.1 gwr struct fbdevice *fb = &sc->sc_fb;
198 1.1 gwr struct confargs *ca = args;
199 1.1 gwr struct fbtype *fbt;
200 1.1 gwr
201 1.11 gwr /* XXX: should do better than this... */
202 1.11 gwr switch (cpu_machine_id) {
203 1.11 gwr case SUN3_MACH_110:
204 1.11 gwr sc->sc_cg4type = CG4_TYPE_A;
205 1.11 gwr break;
206 1.11 gwr case SUN3_MACH_60:
207 1.11 gwr default:
208 1.11 gwr sc->sc_cg4type = CG4_TYPE_B;
209 1.11 gwr }
210 1.11 gwr
211 1.11 gwr fb->fb_driver = &cg4_fbdriver;
212 1.1 gwr fb->fb_private = sc;
213 1.1 gwr fb->fb_name = sc->sc_dev.dv_xname;
214 1.1 gwr
215 1.1 gwr fbt = &fb->fb_fbtype;
216 1.1 gwr fbt->fb_type = FBTYPE_SUN4COLOR;
217 1.1 gwr fbt->fb_depth = 8;
218 1.1 gwr fbt->fb_cmsize = 256;
219 1.1 gwr
220 1.1 gwr fbt->fb_width = 1152;
221 1.1 gwr fbt->fb_height = 900;
222 1.2 gwr fbt->fb_size = CG4_MMAP_SIZE;
223 1.1 gwr
224 1.11 gwr switch (sc->sc_cg4type) {
225 1.11 gwr case CG4_TYPE_A: /* Sun3/110 */
226 1.11 gwr sc->sc_va_cmap = bus_mapin(BUS_OBIO, CG4A_OBIO_CMAP,
227 1.11 gwr sizeof(struct amd_regs));
228 1.11 gwr sc->sc_pa_overlay = ca->ca_paddr + CG4A_OFF_OVERLAY;
229 1.11 gwr sc->sc_pa_enable = ca->ca_paddr + CG4A_OFF_ENABLE;
230 1.11 gwr sc->sc_pa_pixmap = ca->ca_paddr + CG4A_OFF_PIXMAP;
231 1.11 gwr sc->sc_btcm = NULL;
232 1.11 gwr cg4a_init(sc);
233 1.11 gwr break;
234 1.11 gwr
235 1.11 gwr case CG4_TYPE_B: /* Sun3/60 */
236 1.11 gwr default:
237 1.11 gwr sc->sc_va_cmap = (struct bt_regs *)
238 1.11 gwr bus_mapin(ca->ca_bustype, ca->ca_paddr,
239 1.11 gwr sizeof(struct bt_regs *));
240 1.11 gwr sc->sc_pa_overlay = ca->ca_paddr + CG4B_OFF_OVERLAY;
241 1.11 gwr sc->sc_pa_enable = ca->ca_paddr + CG4B_OFF_ENABLE;
242 1.11 gwr sc->sc_pa_pixmap = ca->ca_paddr + CG4B_OFF_PIXMAP;
243 1.11 gwr sc->sc_btcm = malloc(sizeof(union bt_cmap), M_DEVBUF, M_WAITOK);
244 1.11 gwr cg4b_init(sc);
245 1.11 gwr break;
246 1.11 gwr }
247 1.1 gwr
248 1.10 christos printf(" (%dx%d)\n", fbt->fb_width, fbt->fb_height);
249 1.2 gwr fb_attach(fb, 4);
250 1.1 gwr }
251 1.1 gwr
252 1.1 gwr int
253 1.1 gwr cg4open(dev, flags, mode, p)
254 1.1 gwr dev_t dev;
255 1.1 gwr int flags, mode;
256 1.1 gwr struct proc *p;
257 1.1 gwr {
258 1.1 gwr int unit = minor(dev);
259 1.1 gwr
260 1.7 thorpej if (unit >= cgfour_cd.cd_ndevs || cgfour_cd.cd_devs[unit] == NULL)
261 1.1 gwr return (ENXIO);
262 1.1 gwr return (0);
263 1.1 gwr }
264 1.1 gwr
265 1.1 gwr int
266 1.1 gwr cg4close(dev, flags, mode, p)
267 1.1 gwr dev_t dev;
268 1.1 gwr int flags, mode;
269 1.1 gwr struct proc *p;
270 1.1 gwr {
271 1.1 gwr
272 1.1 gwr return (0);
273 1.1 gwr }
274 1.1 gwr
275 1.1 gwr int
276 1.1 gwr cg4ioctl(dev, cmd, data, flags, p)
277 1.1 gwr dev_t dev;
278 1.1 gwr u_long cmd;
279 1.1 gwr caddr_t data;
280 1.1 gwr int flags;
281 1.1 gwr struct proc *p;
282 1.1 gwr {
283 1.7 thorpej struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)];
284 1.1 gwr
285 1.1 gwr return (fbioctlfb(&sc->sc_fb, cmd, data));
286 1.1 gwr }
287 1.1 gwr
288 1.1 gwr /*
289 1.1 gwr * Return the address that would map the given device at the given
290 1.1 gwr * offset, allowing for the given protection, or return -1 for error.
291 1.1 gwr *
292 1.1 gwr * X11 expects its mmap'd region to look like this:
293 1.11 gwr * 128k overlay data memory
294 1.11 gwr * 128k overlay enable bitmap
295 1.1 gwr * 1024k color memory
296 1.1 gwr *
297 1.1 gwr * The hardware really looks like this (starting at ca_paddr)
298 1.1 gwr * 4 bytes Brooktree DAC registers
299 1.1 gwr * 2MB-4 gap
300 1.1 gwr * 128k overlay memory
301 1.1 gwr * 1920k gap
302 1.1 gwr * 128k overlay-enable bitmap
303 1.1 gwr * 1920k gap
304 1.1 gwr * 1024k color memory
305 1.1 gwr */
306 1.1 gwr int
307 1.4 mycroft cg4mmap(dev, off, prot)
308 1.1 gwr dev_t dev;
309 1.2 gwr register int off;
310 1.2 gwr int prot;
311 1.1 gwr {
312 1.7 thorpej struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)];
313 1.2 gwr register int physbase;
314 1.1 gwr
315 1.1 gwr if (off & PGOFSET)
316 1.5 mycroft panic("cg4mmap");
317 1.1 gwr
318 1.2 gwr if ((unsigned)off >= CG4_MMAP_SIZE)
319 1.2 gwr return (-1);
320 1.2 gwr
321 1.2 gwr if (off < 0x40000) {
322 1.2 gwr if (off < 0x20000) {
323 1.11 gwr physbase = sc->sc_pa_overlay;
324 1.2 gwr } else {
325 1.2 gwr /* enable plane */
326 1.2 gwr off -= 0x20000;
327 1.11 gwr physbase = sc->sc_pa_enable;
328 1.2 gwr }
329 1.2 gwr } else {
330 1.2 gwr /* pixel map */
331 1.2 gwr off -= 0x40000;
332 1.11 gwr physbase = sc->sc_pa_pixmap;
333 1.1 gwr }
334 1.1 gwr
335 1.1 gwr /*
336 1.1 gwr * I turned on PMAP_NC here to disable the cache as I was
337 1.1 gwr * getting horribly broken behaviour with it on.
338 1.1 gwr */
339 1.2 gwr return ((physbase + off) | PMAP_NC);
340 1.1 gwr }
341 1.1 gwr
342 1.1 gwr /*
343 1.1 gwr * Internal ioctl functions.
344 1.1 gwr */
345 1.1 gwr
346 1.1 gwr /* FBIOGATTR: */
347 1.12 gwr static int cg4gattr(fb, data)
348 1.1 gwr struct fbdevice *fb;
349 1.12 gwr void *data;
350 1.1 gwr {
351 1.12 gwr struct fbgattr *fba = data;
352 1.1 gwr
353 1.1 gwr fba->real_type = fb->fb_fbtype.fb_type;
354 1.1 gwr fba->owner = 0; /* XXX - TIOCCONS stuff? */
355 1.1 gwr fba->fbtype = fb->fb_fbtype;
356 1.1 gwr fba->sattr.flags = 0;
357 1.1 gwr fba->sattr.emu_type = fb->fb_fbtype.fb_type;
358 1.1 gwr fba->sattr.dev_specific[0] = -1;
359 1.1 gwr fba->emu_types[0] = fb->fb_fbtype.fb_type;
360 1.1 gwr fba->emu_types[1] = -1;
361 1.1 gwr return (0);
362 1.1 gwr }
363 1.1 gwr
364 1.1 gwr /* FBIOGVIDEO: */
365 1.12 gwr static int cg4gvideo(fb, data)
366 1.1 gwr struct fbdevice *fb;
367 1.12 gwr void *data;
368 1.1 gwr {
369 1.12 gwr int *on = data;
370 1.1 gwr struct cg4_softc *sc = fb->fb_private;
371 1.1 gwr
372 1.1 gwr *on = !sc->sc_blanked;
373 1.1 gwr return (0);
374 1.1 gwr }
375 1.1 gwr
376 1.1 gwr /* FBIOSVIDEO: */
377 1.12 gwr static int cg4svideo(fb, data)
378 1.1 gwr struct fbdevice *fb;
379 1.12 gwr void *data;
380 1.1 gwr {
381 1.12 gwr int *on = data;
382 1.1 gwr struct cg4_softc *sc = fb->fb_private;
383 1.11 gwr int state;
384 1.11 gwr
385 1.11 gwr state = *on;
386 1.11 gwr if (sc->sc_cg4type == CG4_TYPE_A)
387 1.11 gwr cg4a_svideo(sc, state);
388 1.11 gwr else
389 1.11 gwr cg4b_svideo(sc, state);
390 1.11 gwr return (0);
391 1.11 gwr }
392 1.11 gwr
393 1.11 gwr /*
394 1.11 gwr * FBIOGETCMAP:
395 1.11 gwr * Copy current colormap out to user space.
396 1.11 gwr */
397 1.12 gwr static int cg4getcmap(fb, data)
398 1.11 gwr struct fbdevice *fb;
399 1.12 gwr void *data;
400 1.11 gwr {
401 1.12 gwr struct fbcmap *fbcm = data;
402 1.11 gwr struct cg4_softc *sc = fb->fb_private;
403 1.11 gwr struct soft_cmap *cm = &sc->sc_cmap;
404 1.11 gwr int error, start, count;
405 1.11 gwr
406 1.11 gwr start = fbcm->index;
407 1.11 gwr count = fbcm->count;
408 1.11 gwr if ((start < 0) || (start >= CMAP_SIZE) ||
409 1.11 gwr (count < 0) || (start + count > CMAP_SIZE) )
410 1.11 gwr return (EINVAL);
411 1.11 gwr
412 1.11 gwr if ((error = copyout(&cm->r[start], fbcm->red, count)) != 0)
413 1.11 gwr return (error);
414 1.11 gwr
415 1.11 gwr if ((error = copyout(&cm->g[start], fbcm->green, count)) != 0)
416 1.11 gwr return (error);
417 1.11 gwr
418 1.11 gwr if ((error = copyout(&cm->b[start], fbcm->blue, count)) != 0)
419 1.11 gwr return (error);
420 1.11 gwr
421 1.11 gwr return (0);
422 1.11 gwr }
423 1.11 gwr
424 1.11 gwr /*
425 1.11 gwr * FBIOPUTCMAP:
426 1.11 gwr * Copy new colormap from user space and load.
427 1.11 gwr */
428 1.12 gwr static int cg4putcmap(fb, data)
429 1.11 gwr struct fbdevice *fb;
430 1.12 gwr void *data;
431 1.11 gwr {
432 1.12 gwr struct fbcmap *fbcm = data;
433 1.11 gwr struct cg4_softc *sc = fb->fb_private;
434 1.11 gwr struct soft_cmap *cm = &sc->sc_cmap;
435 1.11 gwr int error, start, count;
436 1.11 gwr
437 1.11 gwr start = fbcm->index;
438 1.11 gwr count = fbcm->count;
439 1.11 gwr if ((start < 0) || (start >= CMAP_SIZE) ||
440 1.11 gwr (count < 0) || (start + count > CMAP_SIZE) )
441 1.11 gwr return (EINVAL);
442 1.11 gwr
443 1.11 gwr if ((error = copyin(fbcm->red, &cm->r[start], count)) != 0)
444 1.11 gwr return (error);
445 1.11 gwr
446 1.11 gwr if ((error = copyin(fbcm->green, &cm->g[start], count)) != 0)
447 1.11 gwr return (error);
448 1.11 gwr
449 1.11 gwr if ((error = copyin(fbcm->blue, &cm->b[start], count)) != 0)
450 1.11 gwr return (error);
451 1.11 gwr
452 1.11 gwr if (sc->sc_cg4type == CG4_TYPE_A)
453 1.11 gwr cg4a_ldcmap(sc);
454 1.11 gwr else
455 1.11 gwr cg4b_ldcmap(sc);
456 1.1 gwr
457 1.11 gwr return (0);
458 1.11 gwr }
459 1.11 gwr
460 1.11 gwr /****************************************************************
461 1.11 gwr * Routines for the "Type A" hardware
462 1.11 gwr ****************************************************************/
463 1.11 gwr
464 1.11 gwr static void
465 1.11 gwr cg4a_init(sc)
466 1.11 gwr struct cg4_softc *sc;
467 1.11 gwr {
468 1.11 gwr volatile struct amd_regs *ar = sc->sc_va_cmap;
469 1.11 gwr struct soft_cmap *cm = &sc->sc_cmap;
470 1.11 gwr int i;
471 1.11 gwr
472 1.11 gwr /* grab initial (current) color map */
473 1.11 gwr for(i = 0; i < 256; i++) {
474 1.11 gwr cm->r[i] = ar->r[i];
475 1.11 gwr cm->g[i] = ar->g[i];
476 1.11 gwr cm->b[i] = ar->b[i];
477 1.11 gwr }
478 1.11 gwr }
479 1.11 gwr
480 1.11 gwr static void
481 1.11 gwr cg4a_ldcmap(sc)
482 1.11 gwr struct cg4_softc *sc;
483 1.11 gwr {
484 1.11 gwr volatile struct amd_regs *ar = sc->sc_va_cmap;
485 1.11 gwr struct soft_cmap *cm = &sc->sc_cmap;
486 1.11 gwr int i;
487 1.11 gwr
488 1.11 gwr /*
489 1.11 gwr * Now blast them into the chip!
490 1.11 gwr * XXX Should use retrace interrupt!
491 1.11 gwr * Just set a "need load" bit and let the
492 1.11 gwr * retrace interrupt handler do the work.
493 1.11 gwr */
494 1.11 gwr for(i = 0; i < 256; i++) {
495 1.11 gwr ar->r[i] = cm->r[i];
496 1.11 gwr ar->g[i] = cm->g[i];
497 1.11 gwr ar->b[i] = cm->b[i];
498 1.11 gwr }
499 1.11 gwr }
500 1.11 gwr
501 1.11 gwr static void
502 1.11 gwr cg4a_svideo(sc, on)
503 1.11 gwr struct cg4_softc *sc;
504 1.11 gwr int on;
505 1.11 gwr {
506 1.11 gwr volatile struct amd_regs *ar = sc->sc_va_cmap;
507 1.11 gwr int i;
508 1.1 gwr
509 1.11 gwr if ((on == 0) && (sc->sc_blanked == 0)) {
510 1.11 gwr /* Turn OFF video (make it blank). */
511 1.1 gwr sc->sc_blanked = 1;
512 1.11 gwr /* Load fake "all zero" colormap. */
513 1.11 gwr for (i = 0; i < 256; i++) {
514 1.11 gwr ar->r[i] = 0;
515 1.11 gwr ar->g[i] = 0;
516 1.11 gwr ar->b[i] = 0;
517 1.11 gwr }
518 1.1 gwr }
519 1.1 gwr
520 1.11 gwr if ((on != 0) && (sc->sc_blanked != 0)) {
521 1.1 gwr /* Turn video back ON (unblank). */
522 1.1 gwr sc->sc_blanked = 0;
523 1.11 gwr /* Restore normal colormap. */
524 1.11 gwr cg4a_ldcmap(sc);
525 1.11 gwr }
526 1.11 gwr }
527 1.11 gwr
528 1.11 gwr
529 1.11 gwr /****************************************************************
530 1.11 gwr * Routines for the "Type B" hardware
531 1.11 gwr ****************************************************************/
532 1.1 gwr
533 1.11 gwr static void
534 1.11 gwr cg4b_init(sc)
535 1.11 gwr struct cg4_softc *sc;
536 1.11 gwr {
537 1.11 gwr volatile struct bt_regs *bt = sc->sc_va_cmap;
538 1.11 gwr struct soft_cmap *cm = &sc->sc_cmap;
539 1.11 gwr union bt_cmap *btcm = sc->sc_btcm;
540 1.11 gwr int i;
541 1.11 gwr
542 1.11 gwr /*
543 1.11 gwr * BT458 chip initialization as described in Brooktree's
544 1.11 gwr * 1993 Graphics and Imaging Product Databook (DB004-1/93).
545 1.11 gwr */
546 1.11 gwr bt->bt_addr = 0x04; /* select read mask register */
547 1.11 gwr bt->bt_ctrl = 0xff; /* all planes on */
548 1.11 gwr bt->bt_addr = 0x05; /* select blink mask register */
549 1.11 gwr bt->bt_ctrl = 0x00; /* all planes non-blinking */
550 1.11 gwr bt->bt_addr = 0x06; /* select command register */
551 1.11 gwr bt->bt_ctrl = 0x43; /* palette enabled, overlay planes enabled */
552 1.11 gwr bt->bt_addr = 0x07; /* select test register */
553 1.11 gwr bt->bt_ctrl = 0x00; /* set test mode */
554 1.11 gwr
555 1.11 gwr /* grab initial (current) color map */
556 1.11 gwr bt->bt_addr = 0;
557 1.11 gwr for (i = 0; i < (256 * 3 / 4); i++) {
558 1.11 gwr btcm->cm_chip[i] = bt->bt_cmap;
559 1.11 gwr }
560 1.1 gwr
561 1.11 gwr /* Transpose into S/W form. */
562 1.11 gwr for (i = 0; i < 256; i++) {
563 1.11 gwr cm->r[i] = btcm->cm_map[i][0];
564 1.11 gwr cm->g[i] = btcm->cm_map[i][1];
565 1.11 gwr cm->b[i] = btcm->cm_map[i][2];
566 1.1 gwr }
567 1.1 gwr }
568 1.1 gwr
569 1.11 gwr static void
570 1.11 gwr cg4b_ldcmap(sc)
571 1.11 gwr struct cg4_softc *sc;
572 1.1 gwr {
573 1.11 gwr volatile struct bt_regs *bt = sc->sc_va_cmap;
574 1.11 gwr struct soft_cmap *cm = &sc->sc_cmap;
575 1.11 gwr union bt_cmap *btcm = sc->sc_btcm;
576 1.11 gwr int i;
577 1.1 gwr
578 1.11 gwr /*
579 1.11 gwr * Now blast them into the chip!
580 1.11 gwr * XXX Should use retrace interrupt!
581 1.11 gwr * Just set a "need load" bit and let the
582 1.11 gwr * retrace interrupt handler do the work.
583 1.11 gwr */
584 1.1 gwr
585 1.11 gwr /* Transpose into H/W form. */
586 1.11 gwr for (i = 0; i < 256; i++) {
587 1.11 gwr btcm->cm_map[i][0] = cm->r[i];
588 1.11 gwr btcm->cm_map[i][1] = cm->g[i];
589 1.11 gwr btcm->cm_map[i][2] = cm->b[i];
590 1.11 gwr }
591 1.1 gwr
592 1.11 gwr bt->bt_addr = 0;
593 1.11 gwr for (i = 0; i < (256 * 3 / 4); i++) {
594 1.11 gwr bt->bt_cmap = btcm->cm_chip[i];
595 1.1 gwr }
596 1.1 gwr }
597 1.1 gwr
598 1.1 gwr static void
599 1.11 gwr cg4b_svideo(sc, on)
600 1.1 gwr struct cg4_softc *sc;
601 1.11 gwr int on;
602 1.1 gwr {
603 1.11 gwr volatile struct bt_regs *bt = sc->sc_va_cmap;
604 1.11 gwr int i;
605 1.11 gwr
606 1.11 gwr if ((on == 0) && (sc->sc_blanked == 0)) {
607 1.11 gwr /* Turn OFF video (make it blank). */
608 1.11 gwr sc->sc_blanked = 1;
609 1.11 gwr /* Load fake "all zero" colormap. */
610 1.11 gwr bt->bt_addr = 0;
611 1.11 gwr for (i = 0; i < (256 * 3 / 4); i++)
612 1.11 gwr bt->bt_cmap = 0;
613 1.11 gwr }
614 1.11 gwr
615 1.11 gwr if ((on != 0) && (sc->sc_blanked != 0)) {
616 1.11 gwr /* Turn video back ON (unblank). */
617 1.11 gwr sc->sc_blanked = 0;
618 1.11 gwr /* Restore normal colormap. */
619 1.11 gwr cg4b_ldcmap(sc);
620 1.11 gwr }
621 1.1 gwr }
622 1.11 gwr
623