cg4.c revision 1.15
1 /* $NetBSD: cg4.c,v 1.15 1998/02/08 05:22:10 gwr Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * from: @(#)cgthree.c 8.2 (Berkeley) 10/30/93 45 */ 46 47 /* 48 * color display (cg4) driver. 49 * 50 * Credits, history: 51 * Gordon Ross created this driver based on the cg3 driver from 52 * the sparc port as distributed in BSD 4.4 Lite, but included 53 * support for only the "type B" adapter (Brooktree DACs). 54 * Ezra Story added support for the "type A" (AMD DACs). 55 * 56 * Todo: 57 * Make this driver handle video interrupts. 58 * Defer colormap updates to vertical retrace interrupts. 59 */ 60 61 #include <sys/param.h> 62 #include <sys/systm.h> 63 #include <sys/conf.h> 64 #include <sys/device.h> 65 #include <sys/ioctl.h> 66 #include <sys/malloc.h> 67 #include <sys/mman.h> 68 #include <sys/proc.h> 69 #include <sys/tty.h> 70 71 #include <vm/vm.h> 72 73 #include <machine/autoconf.h> 74 #include <machine/cpu.h> 75 #include <machine/fbio.h> 76 #include <machine/idprom.h> 77 #include <machine/pmap.h> 78 79 #include <sun3/dev/fbvar.h> 80 #include <sun3/dev/btreg.h> 81 #include <sun3/dev/btvar.h> 82 #include <sun3/dev/cg4reg.h> 83 #include <sun3/dev/p4reg.h> 84 85 #define CG4_TYPE_A 0 /* AMD DACs */ 86 #define CG4_TYPE_B 1 /* Brooktree DACs */ 87 88 cdev_decl(cg4); 89 90 #define CG4_MMAP_SIZE (CG4_OVERLAY_SIZE + CG4_ENABLE_SIZE + CG4_PIXMAP_SIZE) 91 92 #define CMAP_SIZE 256 93 struct soft_cmap { 94 u_char r[CMAP_SIZE]; 95 u_char g[CMAP_SIZE]; 96 u_char b[CMAP_SIZE]; 97 }; 98 99 /* per-display variables */ 100 struct cg4_softc { 101 struct device sc_dev; /* base device */ 102 struct fbdevice sc_fb; /* frame buffer device */ 103 int sc_cg4type; /* A or B */ 104 int sc_pa_overlay; /* phys. addr. of overlay plane */ 105 int sc_pa_enable; /* phys. addr. of enable plane */ 106 int sc_pa_pixmap; /* phys. addr. of color plane */ 107 int sc_video_on; /* zero if blanked */ 108 void *sc_va_cmap; /* Colormap h/w (mapped KVA) */ 109 void *sc_btcm; /* Soft cmap, Brooktree format */ 110 struct soft_cmap sc_cmap; /* Soft cmap, user format */ 111 void (*sc_ldcmap) __P((struct cg4_softc *)); 112 }; 113 114 /* autoconfiguration driver */ 115 static void cg4attach __P((struct device *, struct device *, void *)); 116 static int cg4match __P((struct device *, struct cfdata *, void *)); 117 118 struct cfattach cgfour_ca = { 119 sizeof(struct cg4_softc), cg4match, cg4attach 120 }; 121 122 extern struct cfdriver cgfour_cd; 123 124 static int cg4gattr __P((struct fbdevice *, void *)); 125 static int cg4gvideo __P((struct fbdevice *, void *)); 126 static int cg4svideo __P((struct fbdevice *, void *)); 127 static int cg4getcmap __P((struct fbdevice *, void *)); 128 static int cg4putcmap __P((struct fbdevice *, void *)); 129 130 static void cg4a_init __P((struct cg4_softc *)); 131 static void cg4a_ldcmap __P((struct cg4_softc *)); 132 133 static void cg4b_init __P((struct cg4_softc *)); 134 static void cg4b_ldcmap __P((struct cg4_softc *)); 135 136 static struct fbdriver cg4_fbdriver = { 137 cg4open, cg4close, cg4mmap, cg4gattr, 138 cg4gvideo, cg4svideo, 139 cg4getcmap, cg4putcmap }; 140 141 /* 142 * Match a cg4. 143 */ 144 static int 145 cg4match(parent, cf, args) 146 struct device *parent; 147 struct cfdata *cf; 148 void *args; 149 { 150 struct confargs *ca = args; 151 int mid, p4id, peekval; 152 void *p4reg; 153 154 /* No default address support. */ 155 if (ca->ca_paddr == -1) 156 return (0); 157 158 /* 159 * Slight hack here: The low four bits of the 160 * config flags, if set, restrict the match to 161 * that machine "implementation" only. 162 */ 163 mid = cf->cf_flags & IDM_IMPL_MASK; 164 if (mid && (mid != (cpu_machine_id & IDM_IMPL_MASK))) 165 return (0); 166 167 /* 168 * Make sure something is there, and if so, 169 * see if it looks like a P4 register. 170 */ 171 p4reg = bus_tmapin(ca->ca_bustype, ca->ca_paddr); 172 peekval = peek_long(p4reg); 173 p4id = (peekval == -1) ? 174 P4_NOTFOUND : fb_pfour_id(p4reg); 175 bus_tmapout(p4reg); 176 if (peekval == -1) 177 return (0); 178 179 /* 180 * The config flag 0x10 if set means we are 181 * looking for a Type A (3/110) which has 182 * AMD RAMDACs in control space. 183 */ 184 #ifdef _SUN3_ 185 if (cf->cf_flags & 0x10) { 186 if (bus_peek(BUS_OBIO, CG4A_OBIO_CMAP, 1) == -1) 187 return (0); 188 /* OK, assume it really is a Type A. */ 189 return (1); 190 } 191 #endif /* SUN3 */ 192 193 /* 194 * OK, we are expecting a "Type B" CG4, and 195 * there may or may not be a P4 register. 196 */ 197 switch (p4id) { 198 case P4_ID_COLOR8P1: 199 case P4_NOTFOUND: 200 return (1); 201 default: 202 #ifdef DEBUG 203 printf("cgfour at 0x%x match p4id=0x%x fails\n", 204 ca->ca_paddr, p4id & 0xFF); 205 #endif 206 } 207 208 return (0); 209 } 210 211 /* 212 * Attach a display. We need to notice if it is the console, too. 213 */ 214 static void 215 cg4attach(parent, self, args) 216 struct device *parent, *self; 217 void *args; 218 { 219 struct cg4_softc *sc = (struct cg4_softc *)self; 220 struct fbdevice *fb = &sc->sc_fb; 221 struct confargs *ca = args; 222 struct fbtype *fbt; 223 void *p4reg; 224 int p4id, tmp; 225 226 fbt = &fb->fb_fbtype; 227 fbt->fb_type = FBTYPE_SUN4COLOR; 228 fbt->fb_width = 1152; /* default - see below */ 229 fbt->fb_height = 900; /* default - see below */ 230 fbt->fb_depth = 8; 231 fbt->fb_cmsize = 256; 232 fbt->fb_size = CG4_MMAP_SIZE; 233 fb->fb_driver = &cg4_fbdriver; 234 fb->fb_private = sc; 235 fb->fb_name = sc->sc_dev.dv_xname; 236 fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags; 237 238 p4reg = NULL; 239 240 /* 241 * The config flag 0x10 if set means we are 242 * attaching a Type A (3/110) which has the 243 * AMD RAMDACs in control space, and no P4. 244 */ 245 if (fb->fb_flags & 0x10) { 246 #ifdef _SUN3_ 247 sc->sc_cg4type = CG4_TYPE_A; 248 sc->sc_ldcmap = cg4a_ldcmap; 249 sc->sc_va_cmap = bus_mapin(BUS_OBIO, CG4A_OBIO_CMAP, 250 sizeof(struct amd_regs)); 251 sc->sc_pa_overlay = ca->ca_paddr + CG4A_OFF_OVERLAY; 252 sc->sc_pa_enable = ca->ca_paddr + CG4A_OFF_ENABLE; 253 sc->sc_pa_pixmap = ca->ca_paddr + CG4A_OFF_PIXMAP; 254 cg4a_init(sc); 255 #else /* SUN3 */ 256 panic("cgfour flags 0x10"); 257 #endif /* SUN3 */ 258 } else { 259 sc->sc_cg4type = CG4_TYPE_B; 260 sc->sc_ldcmap = cg4b_ldcmap; 261 sc->sc_va_cmap = bus_mapin(ca->ca_bustype, ca->ca_paddr, 262 sizeof(struct bt_regs)); 263 sc->sc_pa_overlay = ca->ca_paddr + CG4B_OFF_OVERLAY; 264 sc->sc_pa_enable = ca->ca_paddr + CG4B_OFF_ENABLE; 265 sc->sc_pa_pixmap = ca->ca_paddr + CG4B_OFF_PIXMAP; 266 cg4b_init(sc); 267 268 /* Does it have a P4 register? */ 269 p4reg = bus_mapin(ca->ca_bustype, ca->ca_paddr, 4); 270 p4id = fb_pfour_id(p4reg); 271 if (p4id != P4_NOTFOUND) 272 fb->fb_pfour = p4reg; 273 else 274 bus_mapout(p4reg, 4); 275 } 276 277 /* 278 * Determine width and height as follows: 279 * If it has a P4 register, use that; 280 * else if unit==0, use the EEPROM size, 281 * else make our best guess. 282 */ 283 if (fb->fb_pfour) 284 fb_pfour_setsize(fb); 285 else if (sc->sc_dev.dv_unit == 0) 286 fb_eeprom_setsize(fb); 287 else { 288 /* Guess based on machine ID. */ 289 switch (cpu_machine_id) { 290 default: 291 /* Leave the defaults set above. */ 292 break; 293 } 294 } 295 printf(" (%dx%d)\n", fbt->fb_width, fbt->fb_height); 296 297 /* 298 * Make sure video is on. This driver uses a 299 * black colormap to blank the screen, so if 300 * there is any global enable, set it here. 301 */ 302 tmp = 1; 303 cg4svideo(fb, &tmp); 304 if (fb->fb_pfour) 305 fb_pfour_set_video(fb, 1); 306 else 307 enable_video(1); 308 309 /* Let /dev/fb know we are here. */ 310 fb_attach(fb, 4); 311 } 312 313 int 314 cg4open(dev, flags, mode, p) 315 dev_t dev; 316 int flags, mode; 317 struct proc *p; 318 { 319 int unit = minor(dev); 320 321 if (unit >= cgfour_cd.cd_ndevs || cgfour_cd.cd_devs[unit] == NULL) 322 return (ENXIO); 323 return (0); 324 } 325 326 int 327 cg4close(dev, flags, mode, p) 328 dev_t dev; 329 int flags, mode; 330 struct proc *p; 331 { 332 333 return (0); 334 } 335 336 int 337 cg4ioctl(dev, cmd, data, flags, p) 338 dev_t dev; 339 u_long cmd; 340 caddr_t data; 341 int flags; 342 struct proc *p; 343 { 344 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 345 346 return (fbioctlfb(&sc->sc_fb, cmd, data)); 347 } 348 349 /* 350 * Return the address that would map the given device at the given 351 * offset, allowing for the given protection, or return -1 for error. 352 * 353 * X11 expects its mmap'd region to look like this: 354 * 128k overlay data memory 355 * 128k overlay enable bitmap 356 * 1024k color memory 357 * 358 * The hardware looks completely different. 359 */ 360 int 361 cg4mmap(dev, off, prot) 362 dev_t dev; 363 int off; 364 int prot; 365 { 366 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 367 register int physbase; 368 369 if (off & PGOFSET) 370 panic("cg4mmap"); 371 372 if ((off < 0) || (off >= CG4_MMAP_SIZE)) 373 return (-1); 374 375 if (off < 0x40000) { 376 if (off < 0x20000) { 377 physbase = sc->sc_pa_overlay; 378 } else { 379 /* enable plane */ 380 off -= 0x20000; 381 physbase = sc->sc_pa_enable; 382 } 383 } else { 384 /* pixel map */ 385 off -= 0x40000; 386 physbase = sc->sc_pa_pixmap; 387 } 388 389 /* 390 * I turned on PMAP_NC here to disable the cache as I was 391 * getting horribly broken behaviour without it. 392 */ 393 return ((physbase + off) | PMAP_NC); 394 } 395 396 /* 397 * Internal ioctl functions. 398 */ 399 400 /* FBIOGATTR: */ 401 static int cg4gattr(fb, data) 402 struct fbdevice *fb; 403 void *data; 404 { 405 struct fbgattr *fba = data; 406 407 fba->real_type = fb->fb_fbtype.fb_type; 408 fba->owner = 0; /* XXX - TIOCCONS stuff? */ 409 fba->fbtype = fb->fb_fbtype; 410 fba->sattr.flags = 0; 411 fba->sattr.emu_type = fb->fb_fbtype.fb_type; 412 fba->sattr.dev_specific[0] = -1; 413 fba->emu_types[0] = fb->fb_fbtype.fb_type; 414 fba->emu_types[1] = -1; 415 return (0); 416 } 417 418 /* FBIOGVIDEO: */ 419 static int cg4gvideo(fb, data) 420 struct fbdevice *fb; 421 void *data; 422 { 423 struct cg4_softc *sc = fb->fb_private; 424 int *on = data; 425 426 *on = sc->sc_video_on; 427 return (0); 428 } 429 430 /* FBIOSVIDEO: */ 431 static int cg4svideo(fb, data) 432 struct fbdevice *fb; 433 void *data; 434 { 435 struct cg4_softc *sc = fb->fb_private; 436 int *on = data; 437 438 if (sc->sc_video_on == *on) 439 return (0); 440 sc->sc_video_on = *on; 441 442 (*sc->sc_ldcmap)(sc); 443 return (0); 444 } 445 446 /* 447 * FBIOGETCMAP: 448 * Copy current colormap out to user space. 449 */ 450 static int cg4getcmap(fb, data) 451 struct fbdevice *fb; 452 void *data; 453 { 454 struct cg4_softc *sc = fb->fb_private; 455 struct soft_cmap *cm = &sc->sc_cmap; 456 struct fbcmap *fbcm = data; 457 int error, start, count; 458 459 start = fbcm->index; 460 count = fbcm->count; 461 if ((start < 0) || (start >= CMAP_SIZE) || 462 (count < 0) || (start + count > CMAP_SIZE) ) 463 return (EINVAL); 464 465 if ((error = copyout(&cm->r[start], fbcm->red, count)) != 0) 466 return (error); 467 468 if ((error = copyout(&cm->g[start], fbcm->green, count)) != 0) 469 return (error); 470 471 if ((error = copyout(&cm->b[start], fbcm->blue, count)) != 0) 472 return (error); 473 474 return (0); 475 } 476 477 /* 478 * FBIOPUTCMAP: 479 * Copy new colormap from user space and load. 480 */ 481 static int cg4putcmap(fb, data) 482 struct fbdevice *fb; 483 void *data; 484 { 485 struct cg4_softc *sc = fb->fb_private; 486 struct soft_cmap *cm = &sc->sc_cmap; 487 struct fbcmap *fbcm = data; 488 int error, start, count; 489 490 start = fbcm->index; 491 count = fbcm->count; 492 if ((start < 0) || (start >= CMAP_SIZE) || 493 (count < 0) || (start + count > CMAP_SIZE) ) 494 return (EINVAL); 495 496 if ((error = copyin(fbcm->red, &cm->r[start], count)) != 0) 497 return (error); 498 499 if ((error = copyin(fbcm->green, &cm->g[start], count)) != 0) 500 return (error); 501 502 if ((error = copyin(fbcm->blue, &cm->b[start], count)) != 0) 503 return (error); 504 505 (*sc->sc_ldcmap)(sc); 506 return (0); 507 } 508 509 /**************************************************************** 510 * Routines for the "Type A" hardware 511 ****************************************************************/ 512 #ifdef _SUN3_ 513 514 static void 515 cg4a_init(sc) 516 struct cg4_softc *sc; 517 { 518 volatile struct amd_regs *ar = sc->sc_va_cmap; 519 struct soft_cmap *cm = &sc->sc_cmap; 520 int i; 521 522 /* Grab initial (current) color map. */ 523 for(i = 0; i < 256; i++) { 524 cm->r[i] = ar->r[i]; 525 cm->g[i] = ar->g[i]; 526 cm->b[i] = ar->b[i]; 527 } 528 } 529 530 static void 531 cg4a_ldcmap(sc) 532 struct cg4_softc *sc; 533 { 534 volatile struct amd_regs *ar = sc->sc_va_cmap; 535 struct soft_cmap *cm = &sc->sc_cmap; 536 int i; 537 538 /* 539 * Now blast them into the chip! 540 * XXX Should use retrace interrupt! 541 * Just set a "need load" bit and let the 542 * retrace interrupt handler do the work. 543 */ 544 if (sc->sc_video_on) { 545 /* Update H/W colormap. */ 546 for (i = 0; i < 256; i++) { 547 ar->r[i] = cm->r[i]; 548 ar->g[i] = cm->g[i]; 549 ar->b[i] = cm->b[i]; 550 } 551 } else { 552 /* Clear H/W colormap. */ 553 for (i = 0; i < 256; i++) { 554 ar->r[i] = 0; 555 ar->g[i] = 0; 556 ar->b[i] = 0; 557 } 558 } 559 } 560 #endif /* SUN3 */ 561 562 /**************************************************************** 563 * Routines for the "Type B" hardware 564 ****************************************************************/ 565 566 static void 567 cg4b_init(sc) 568 struct cg4_softc *sc; 569 { 570 volatile struct bt_regs *bt = sc->sc_va_cmap; 571 struct soft_cmap *cm = &sc->sc_cmap; 572 union bt_cmap *btcm; 573 int i; 574 575 /* Need a buffer for colormap format translation. */ 576 btcm = malloc(sizeof(*btcm), M_DEVBUF, M_WAITOK); 577 sc->sc_btcm = btcm; 578 579 /* 580 * BT458 chip initialization as described in Brooktree's 581 * 1993 Graphics and Imaging Product Databook (DB004-1/93). 582 */ 583 bt->bt_addr = 0x04; /* select read mask register */ 584 bt->bt_ctrl = 0xff; /* all planes on */ 585 bt->bt_addr = 0x05; /* select blink mask register */ 586 bt->bt_ctrl = 0x00; /* all planes non-blinking */ 587 bt->bt_addr = 0x06; /* select command register */ 588 bt->bt_ctrl = 0x43; /* palette enabled, overlay planes enabled */ 589 bt->bt_addr = 0x07; /* select test register */ 590 bt->bt_ctrl = 0x00; /* set test mode */ 591 592 /* grab initial (current) color map */ 593 bt->bt_addr = 0; 594 for (i = 0; i < (256 * 3 / 4); i++) { 595 btcm->cm_chip[i] = bt->bt_cmap; 596 } 597 598 /* Transpose into H/W cmap into S/W form. */ 599 for (i = 0; i < 256; i++) { 600 cm->r[i] = btcm->cm_map[i][0]; 601 cm->g[i] = btcm->cm_map[i][1]; 602 cm->b[i] = btcm->cm_map[i][2]; 603 } 604 } 605 606 static void 607 cg4b_ldcmap(sc) 608 struct cg4_softc *sc; 609 { 610 volatile struct bt_regs *bt = sc->sc_va_cmap; 611 struct soft_cmap *cm = &sc->sc_cmap; 612 union bt_cmap *btcm = sc->sc_btcm; 613 int i; 614 615 /* Transpose S/W cmap into H/W form. */ 616 for (i = 0; i < 256; i++) { 617 btcm->cm_map[i][0] = cm->r[i]; 618 btcm->cm_map[i][1] = cm->g[i]; 619 btcm->cm_map[i][2] = cm->b[i]; 620 } 621 622 /* 623 * Now blast them into the chip! 624 * XXX Should use retrace interrupt! 625 * Just set a "need load" bit and let the 626 * retrace interrupt handler do the work. 627 */ 628 bt->bt_addr = 0; 629 if (sc->sc_video_on) { 630 /* Update H/W colormap. */ 631 for (i = 0; i < (256 * 3 / 4); i++) 632 bt->bt_cmap = btcm->cm_chip[i]; 633 } else { 634 /* Clear H/W colormap. */ 635 for (i = 0; i < (256 * 3 / 4); i++) 636 bt->bt_cmap = 0; 637 } 638 } 639 640
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