cg4.c revision 1.16
1 /* $NetBSD: cg4.c,v 1.16 1998/03/08 18:53:17 gwr Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * from: @(#)cgthree.c 8.2 (Berkeley) 10/30/93 45 */ 46 47 /* 48 * color display (cg4) driver. 49 * 50 * Credits, history: 51 * Gordon Ross created this driver based on the cg3 driver from 52 * the sparc port as distributed in BSD 4.4 Lite, but included 53 * support for only the "type B" adapter (Brooktree DACs). 54 * Ezra Story added support for the "type A" (AMD DACs). 55 * 56 * Todo: 57 * Make this driver handle video interrupts. 58 * Defer colormap updates to vertical retrace interrupts. 59 */ 60 61 #include <sys/param.h> 62 #include <sys/systm.h> 63 #include <sys/conf.h> 64 #include <sys/device.h> 65 #include <sys/ioctl.h> 66 #include <sys/malloc.h> 67 #include <sys/mman.h> 68 #include <sys/proc.h> 69 #include <sys/tty.h> 70 71 #include <vm/vm.h> 72 73 #include <machine/autoconf.h> 74 #include <machine/cpu.h> 75 #include <machine/fbio.h> 76 #include <machine/idprom.h> 77 #include <machine/pmap.h> 78 79 #include <sun3/dev/fbvar.h> 80 #include <sun3/dev/btreg.h> 81 #include <sun3/dev/btvar.h> 82 #include <sun3/dev/cg4reg.h> 83 #include <sun3/dev/p4reg.h> 84 85 #define CG4_TYPE_A 0 /* AMD DACs */ 86 #define CG4_TYPE_B 1 /* Brooktree DACs */ 87 88 cdev_decl(cg4); 89 90 #define CG4_MMAP_SIZE (CG4_OVERLAY_SIZE + CG4_ENABLE_SIZE + CG4_PIXMAP_SIZE) 91 92 #define CMAP_SIZE 256 93 struct soft_cmap { 94 u_char r[CMAP_SIZE]; 95 u_char g[CMAP_SIZE]; 96 u_char b[CMAP_SIZE]; 97 }; 98 99 /* per-display variables */ 100 struct cg4_softc { 101 struct device sc_dev; /* base device */ 102 struct fbdevice sc_fb; /* frame buffer device */ 103 int sc_cg4type; /* A or B */ 104 int sc_pa_overlay; /* phys. addr. of overlay plane */ 105 int sc_pa_enable; /* phys. addr. of enable plane */ 106 int sc_pa_pixmap; /* phys. addr. of color plane */ 107 int sc_video_on; /* zero if blanked */ 108 void *sc_va_cmap; /* Colormap h/w (mapped KVA) */ 109 void *sc_btcm; /* Soft cmap, Brooktree format */ 110 struct soft_cmap sc_cmap; /* Soft cmap, user format */ 111 void (*sc_ldcmap) __P((struct cg4_softc *)); 112 }; 113 114 /* autoconfiguration driver */ 115 static void cg4attach __P((struct device *, struct device *, void *)); 116 static int cg4match __P((struct device *, struct cfdata *, void *)); 117 118 struct cfattach cgfour_ca = { 119 sizeof(struct cg4_softc), cg4match, cg4attach 120 }; 121 122 extern struct cfdriver cgfour_cd; 123 124 static int cg4gattr __P((struct fbdevice *, void *)); 125 static int cg4gvideo __P((struct fbdevice *, void *)); 126 static int cg4svideo __P((struct fbdevice *, void *)); 127 static int cg4getcmap __P((struct fbdevice *, void *)); 128 static int cg4putcmap __P((struct fbdevice *, void *)); 129 130 static void cg4a_init __P((struct cg4_softc *)); 131 static void cg4a_ldcmap __P((struct cg4_softc *)); 132 133 static void cg4b_init __P((struct cg4_softc *)); 134 static void cg4b_ldcmap __P((struct cg4_softc *)); 135 136 static struct fbdriver cg4_fbdriver = { 137 cg4open, cg4close, cg4mmap, cg4gattr, 138 cg4gvideo, cg4svideo, 139 cg4getcmap, cg4putcmap }; 140 141 /* 142 * Match a cg4. 143 */ 144 static int 145 cg4match(parent, cf, args) 146 struct device *parent; 147 struct cfdata *cf; 148 void *args; 149 { 150 struct confargs *ca = args; 151 int mid, p4id, peekval; 152 void *p4reg; 153 154 /* No default address support. */ 155 if (ca->ca_paddr == -1) 156 return (0); 157 158 /* 159 * Slight hack here: The low four bits of the 160 * config flags, if set, restrict the match to 161 * that machine "implementation" only. 162 */ 163 mid = cf->cf_flags & IDM_IMPL_MASK; 164 if (mid && (mid != (cpu_machine_id & IDM_IMPL_MASK))) 165 return (0); 166 167 /* 168 * Make sure something is there, and if so, 169 * see if it looks like a P4 register. 170 */ 171 p4reg = bus_tmapin(ca->ca_bustype, ca->ca_paddr); 172 peekval = peek_long(p4reg); 173 p4id = (peekval == -1) ? 174 P4_NOTFOUND : fb_pfour_id(p4reg); 175 bus_tmapout(p4reg); 176 if (peekval == -1) 177 return (0); 178 179 /* 180 * The config flag 0x10 if set means we are 181 * looking for a Type A (3/110) which has 182 * AMD RAMDACs in control space. 183 */ 184 #ifdef _SUN3_ 185 if (cf->cf_flags & 0x10) { 186 if (bus_peek(BUS_OBIO, CG4A_OBIO_CMAP, 1) == -1) 187 return (0); 188 /* OK, assume it really is a Type A. */ 189 return (1); 190 } 191 #endif /* SUN3 */ 192 193 /* 194 * OK, we are expecting a "Type B" CG4, and 195 * there may or may not be a P4 register. 196 */ 197 switch (p4id) { 198 case P4_ID_COLOR8P1: 199 case P4_NOTFOUND: 200 return (1); 201 default: 202 #ifdef DEBUG 203 printf("cgfour at 0x%x match p4id=0x%x fails\n", 204 ca->ca_paddr, p4id & 0xFF); 205 #endif 206 } 207 208 return (0); 209 } 210 211 /* 212 * Attach a display. We need to notice if it is the console, too. 213 */ 214 static void 215 cg4attach(parent, self, args) 216 struct device *parent, *self; 217 void *args; 218 { 219 struct cg4_softc *sc = (struct cg4_softc *)self; 220 struct fbdevice *fb = &sc->sc_fb; 221 struct confargs *ca = args; 222 struct fbtype *fbt; 223 void *p4reg; 224 int p4id, tmp; 225 226 fbt = &fb->fb_fbtype; 227 fbt->fb_type = FBTYPE_SUN4COLOR; 228 fbt->fb_width = 1152; /* default - see below */ 229 fbt->fb_height = 900; /* default - see below */ 230 fbt->fb_depth = 8; 231 fbt->fb_cmsize = 256; 232 fbt->fb_size = CG4_MMAP_SIZE; 233 fb->fb_driver = &cg4_fbdriver; 234 fb->fb_private = sc; 235 fb->fb_name = sc->sc_dev.dv_xname; 236 fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags; 237 238 p4reg = NULL; 239 240 /* 241 * The config flag 0x10 if set means we are 242 * attaching a Type A (3/110) which has the 243 * AMD RAMDACs in control space, and no P4. 244 */ 245 if (fb->fb_flags & 0x10) { 246 #ifdef _SUN3_ 247 sc->sc_cg4type = CG4_TYPE_A; 248 sc->sc_ldcmap = cg4a_ldcmap; 249 sc->sc_pa_overlay = ca->ca_paddr + CG4A_OFF_OVERLAY; 250 sc->sc_pa_enable = ca->ca_paddr + CG4A_OFF_ENABLE; 251 sc->sc_pa_pixmap = ca->ca_paddr + CG4A_OFF_PIXMAP; 252 sc->sc_va_cmap = bus_mapin(BUS_OBIO, CG4A_OBIO_CMAP, 253 sizeof(struct amd_regs)); 254 cg4a_init(sc); 255 #else /* SUN3 */ 256 panic("cgfour flags 0x10"); 257 #endif /* SUN3 */ 258 } else { 259 sc->sc_cg4type = CG4_TYPE_B; 260 sc->sc_ldcmap = cg4b_ldcmap; 261 sc->sc_pa_overlay = ca->ca_paddr + CG4B_OFF_OVERLAY; 262 sc->sc_pa_enable = ca->ca_paddr + CG4B_OFF_ENABLE; 263 sc->sc_pa_pixmap = ca->ca_paddr + CG4B_OFF_PIXMAP; 264 tmp = ca->ca_paddr + CG4B_OFF_CMAP, 265 sc->sc_va_cmap = bus_mapin(ca->ca_bustype, tmp, 266 sizeof(struct bt_regs)); 267 cg4b_init(sc); 268 269 /* Does it have a P4 register? */ 270 p4reg = bus_mapin(ca->ca_bustype, ca->ca_paddr, 4); 271 p4id = fb_pfour_id(p4reg); 272 if (p4id != P4_NOTFOUND) 273 fb->fb_pfour = p4reg; 274 else 275 bus_mapout(p4reg, 4); 276 } 277 278 /* 279 * Determine width and height as follows: 280 * If it has a P4 register, use that; 281 * else if unit==0, use the EEPROM size, 282 * else make our best guess. 283 */ 284 if (fb->fb_pfour) 285 fb_pfour_setsize(fb); 286 else if (sc->sc_dev.dv_unit == 0) 287 fb_eeprom_setsize(fb); 288 else { 289 /* Guess based on machine ID. */ 290 switch (cpu_machine_id) { 291 default: 292 /* Leave the defaults set above. */ 293 break; 294 } 295 } 296 printf(" (%dx%d)\n", fbt->fb_width, fbt->fb_height); 297 298 /* 299 * Make sure video is on. This driver uses a 300 * black colormap to blank the screen, so if 301 * there is any global enable, set it here. 302 */ 303 tmp = 1; 304 cg4svideo(fb, &tmp); 305 if (fb->fb_pfour) 306 fb_pfour_set_video(fb, 1); 307 else 308 enable_video(1); 309 310 /* Let /dev/fb know we are here. */ 311 fb_attach(fb, 4); 312 } 313 314 int 315 cg4open(dev, flags, mode, p) 316 dev_t dev; 317 int flags, mode; 318 struct proc *p; 319 { 320 int unit = minor(dev); 321 322 if (unit >= cgfour_cd.cd_ndevs || cgfour_cd.cd_devs[unit] == NULL) 323 return (ENXIO); 324 return (0); 325 } 326 327 int 328 cg4close(dev, flags, mode, p) 329 dev_t dev; 330 int flags, mode; 331 struct proc *p; 332 { 333 334 return (0); 335 } 336 337 int 338 cg4ioctl(dev, cmd, data, flags, p) 339 dev_t dev; 340 u_long cmd; 341 caddr_t data; 342 int flags; 343 struct proc *p; 344 { 345 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 346 347 return (fbioctlfb(&sc->sc_fb, cmd, data)); 348 } 349 350 /* 351 * Return the address that would map the given device at the given 352 * offset, allowing for the given protection, or return -1 for error. 353 * 354 * X11 expects its mmap'd region to look like this: 355 * 128k overlay data memory 356 * 128k overlay enable bitmap 357 * 1024k color memory 358 * 359 * The hardware looks completely different. 360 */ 361 int 362 cg4mmap(dev, off, prot) 363 dev_t dev; 364 int off; 365 int prot; 366 { 367 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 368 register int physbase; 369 370 if (off & PGOFSET) 371 panic("cg4mmap"); 372 373 if ((off < 0) || (off >= CG4_MMAP_SIZE)) 374 return (-1); 375 376 if (off < 0x40000) { 377 if (off < 0x20000) { 378 physbase = sc->sc_pa_overlay; 379 } else { 380 /* enable plane */ 381 off -= 0x20000; 382 physbase = sc->sc_pa_enable; 383 } 384 } else { 385 /* pixel map */ 386 off -= 0x40000; 387 physbase = sc->sc_pa_pixmap; 388 } 389 390 /* 391 * I turned on PMAP_NC here to disable the cache as I was 392 * getting horribly broken behaviour without it. 393 */ 394 return ((physbase + off) | PMAP_NC); 395 } 396 397 /* 398 * Internal ioctl functions. 399 */ 400 401 /* FBIOGATTR: */ 402 static int cg4gattr(fb, data) 403 struct fbdevice *fb; 404 void *data; 405 { 406 struct fbgattr *fba = data; 407 408 fba->real_type = fb->fb_fbtype.fb_type; 409 fba->owner = 0; /* XXX - TIOCCONS stuff? */ 410 fba->fbtype = fb->fb_fbtype; 411 fba->sattr.flags = 0; 412 fba->sattr.emu_type = fb->fb_fbtype.fb_type; 413 fba->sattr.dev_specific[0] = -1; 414 fba->emu_types[0] = fb->fb_fbtype.fb_type; 415 fba->emu_types[1] = -1; 416 return (0); 417 } 418 419 /* FBIOGVIDEO: */ 420 static int cg4gvideo(fb, data) 421 struct fbdevice *fb; 422 void *data; 423 { 424 struct cg4_softc *sc = fb->fb_private; 425 int *on = data; 426 427 *on = sc->sc_video_on; 428 return (0); 429 } 430 431 /* FBIOSVIDEO: */ 432 static int cg4svideo(fb, data) 433 struct fbdevice *fb; 434 void *data; 435 { 436 struct cg4_softc *sc = fb->fb_private; 437 int *on = data; 438 439 if (sc->sc_video_on == *on) 440 return (0); 441 sc->sc_video_on = *on; 442 443 (*sc->sc_ldcmap)(sc); 444 return (0); 445 } 446 447 /* 448 * FBIOGETCMAP: 449 * Copy current colormap out to user space. 450 */ 451 static int cg4getcmap(fb, data) 452 struct fbdevice *fb; 453 void *data; 454 { 455 struct cg4_softc *sc = fb->fb_private; 456 struct soft_cmap *cm = &sc->sc_cmap; 457 struct fbcmap *fbcm = data; 458 int error, start, count; 459 460 start = fbcm->index; 461 count = fbcm->count; 462 if ((start < 0) || (start >= CMAP_SIZE) || 463 (count < 0) || (start + count > CMAP_SIZE) ) 464 return (EINVAL); 465 466 if ((error = copyout(&cm->r[start], fbcm->red, count)) != 0) 467 return (error); 468 469 if ((error = copyout(&cm->g[start], fbcm->green, count)) != 0) 470 return (error); 471 472 if ((error = copyout(&cm->b[start], fbcm->blue, count)) != 0) 473 return (error); 474 475 return (0); 476 } 477 478 /* 479 * FBIOPUTCMAP: 480 * Copy new colormap from user space and load. 481 */ 482 static int cg4putcmap(fb, data) 483 struct fbdevice *fb; 484 void *data; 485 { 486 struct cg4_softc *sc = fb->fb_private; 487 struct soft_cmap *cm = &sc->sc_cmap; 488 struct fbcmap *fbcm = data; 489 int error, start, count; 490 491 start = fbcm->index; 492 count = fbcm->count; 493 if ((start < 0) || (start >= CMAP_SIZE) || 494 (count < 0) || (start + count > CMAP_SIZE) ) 495 return (EINVAL); 496 497 if ((error = copyin(fbcm->red, &cm->r[start], count)) != 0) 498 return (error); 499 500 if ((error = copyin(fbcm->green, &cm->g[start], count)) != 0) 501 return (error); 502 503 if ((error = copyin(fbcm->blue, &cm->b[start], count)) != 0) 504 return (error); 505 506 (*sc->sc_ldcmap)(sc); 507 return (0); 508 } 509 510 /**************************************************************** 511 * Routines for the "Type A" hardware 512 ****************************************************************/ 513 #ifdef _SUN3_ 514 515 static void 516 cg4a_init(sc) 517 struct cg4_softc *sc; 518 { 519 volatile struct amd_regs *ar = sc->sc_va_cmap; 520 struct soft_cmap *cm = &sc->sc_cmap; 521 int i; 522 523 /* Grab initial (current) color map. */ 524 for(i = 0; i < 256; i++) { 525 cm->r[i] = ar->r[i]; 526 cm->g[i] = ar->g[i]; 527 cm->b[i] = ar->b[i]; 528 } 529 } 530 531 static void 532 cg4a_ldcmap(sc) 533 struct cg4_softc *sc; 534 { 535 volatile struct amd_regs *ar = sc->sc_va_cmap; 536 struct soft_cmap *cm = &sc->sc_cmap; 537 int i; 538 539 /* 540 * Now blast them into the chip! 541 * XXX Should use retrace interrupt! 542 * Just set a "need load" bit and let the 543 * retrace interrupt handler do the work. 544 */ 545 if (sc->sc_video_on) { 546 /* Update H/W colormap. */ 547 for (i = 0; i < 256; i++) { 548 ar->r[i] = cm->r[i]; 549 ar->g[i] = cm->g[i]; 550 ar->b[i] = cm->b[i]; 551 } 552 } else { 553 /* Clear H/W colormap. */ 554 for (i = 0; i < 256; i++) { 555 ar->r[i] = 0; 556 ar->g[i] = 0; 557 ar->b[i] = 0; 558 } 559 } 560 } 561 #endif /* SUN3 */ 562 563 /**************************************************************** 564 * Routines for the "Type B" hardware 565 ****************************************************************/ 566 567 static void 568 cg4b_init(sc) 569 struct cg4_softc *sc; 570 { 571 volatile struct bt_regs *bt = sc->sc_va_cmap; 572 struct soft_cmap *cm = &sc->sc_cmap; 573 union bt_cmap *btcm; 574 int i; 575 576 /* Need a buffer for colormap format translation. */ 577 btcm = malloc(sizeof(*btcm), M_DEVBUF, M_WAITOK); 578 sc->sc_btcm = btcm; 579 580 /* 581 * BT458 chip initialization as described in Brooktree's 582 * 1993 Graphics and Imaging Product Databook (DB004-1/93). 583 */ 584 bt->bt_addr = 0x04; /* select read mask register */ 585 bt->bt_ctrl = 0xff; /* all planes on */ 586 bt->bt_addr = 0x05; /* select blink mask register */ 587 bt->bt_ctrl = 0x00; /* all planes non-blinking */ 588 bt->bt_addr = 0x06; /* select command register */ 589 bt->bt_ctrl = 0x43; /* palette enabled, overlay planes enabled */ 590 bt->bt_addr = 0x07; /* select test register */ 591 bt->bt_ctrl = 0x00; /* set test mode */ 592 593 /* grab initial (current) color map */ 594 bt->bt_addr = 0; 595 for (i = 0; i < (256 * 3 / 4); i++) { 596 btcm->cm_chip[i] = bt->bt_cmap; 597 } 598 599 /* Transpose into H/W cmap into S/W form. */ 600 for (i = 0; i < 256; i++) { 601 cm->r[i] = btcm->cm_map[i][0]; 602 cm->g[i] = btcm->cm_map[i][1]; 603 cm->b[i] = btcm->cm_map[i][2]; 604 } 605 } 606 607 static void 608 cg4b_ldcmap(sc) 609 struct cg4_softc *sc; 610 { 611 volatile struct bt_regs *bt = sc->sc_va_cmap; 612 struct soft_cmap *cm = &sc->sc_cmap; 613 union bt_cmap *btcm = sc->sc_btcm; 614 int i; 615 616 /* Transpose S/W cmap into H/W form. */ 617 for (i = 0; i < 256; i++) { 618 btcm->cm_map[i][0] = cm->r[i]; 619 btcm->cm_map[i][1] = cm->g[i]; 620 btcm->cm_map[i][2] = cm->b[i]; 621 } 622 623 /* 624 * Now blast them into the chip! 625 * XXX Should use retrace interrupt! 626 * Just set a "need load" bit and let the 627 * retrace interrupt handler do the work. 628 */ 629 bt->bt_addr = 0; 630 if (sc->sc_video_on) { 631 /* Update H/W colormap. */ 632 for (i = 0; i < (256 * 3 / 4); i++) 633 bt->bt_cmap = btcm->cm_chip[i]; 634 } else { 635 /* Clear H/W colormap. */ 636 for (i = 0; i < (256 * 3 / 4); i++) 637 bt->bt_cmap = 0; 638 } 639 } 640 641
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