cg4.c revision 1.30
1 /* $NetBSD: cg4.c,v 1.30 2003/07/15 03:36:14 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * from: @(#)cgthree.c 8.2 (Berkeley) 10/30/93 45 */ 46 47 /* 48 * color display (cg4) driver. 49 * 50 * Credits, history: 51 * Gordon Ross created this driver based on the cg3 driver from 52 * the sparc port as distributed in BSD 4.4 Lite, but included 53 * support for only the "type B" adapter (Brooktree DACs). 54 * Ezra Story added support for the "type A" (AMD DACs). 55 * 56 * Todo: 57 * Make this driver handle video interrupts. 58 * Defer colormap updates to vertical retrace interrupts. 59 */ 60 61 #include <sys/cdefs.h> 62 __KERNEL_RCSID(0, "$NetBSD: cg4.c,v 1.30 2003/07/15 03:36:14 lukem Exp $"); 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/conf.h> 67 #include <sys/device.h> 68 #include <sys/ioctl.h> 69 #include <sys/malloc.h> 70 #include <sys/mman.h> 71 #include <sys/proc.h> 72 #include <sys/tty.h> 73 74 #include <uvm/uvm_extern.h> 75 76 #include <machine/autoconf.h> 77 #include <machine/cpu.h> 78 #include <dev/sun/fbio.h> 79 #include <machine/idprom.h> 80 #include <machine/pmap.h> 81 82 #include <sun3/dev/fbvar.h> 83 #include <sun3/dev/btreg.h> 84 #include <sun3/dev/cg4reg.h> 85 #include <sun3/dev/p4reg.h> 86 87 union bt_cmap_u { 88 u_char btcm_char[256 * 3]; /* raw data */ 89 u_char btcm_rgb[256][3]; /* 256 R/G/B entries */ 90 u_int btcm_int[256 * 3 / 4]; /* the way the chip gets loaded */ 91 }; 92 93 #define CG4_TYPE_A 0 /* AMD DACs */ 94 #define CG4_TYPE_B 1 /* Brooktree DACs */ 95 96 #define CG4_MMAP_SIZE (CG4_OVERLAY_SIZE + CG4_ENABLE_SIZE + CG4_PIXMAP_SIZE) 97 98 #define CMAP_SIZE 256 99 struct soft_cmap { 100 u_char r[CMAP_SIZE]; 101 u_char g[CMAP_SIZE]; 102 u_char b[CMAP_SIZE]; 103 }; 104 105 /* per-display variables */ 106 struct cg4_softc { 107 struct device sc_dev; /* base device */ 108 struct fbdevice sc_fb; /* frame buffer device */ 109 int sc_cg4type; /* A or B */ 110 int sc_pa_overlay; /* phys. addr. of overlay plane */ 111 int sc_pa_enable; /* phys. addr. of enable plane */ 112 int sc_pa_pixmap; /* phys. addr. of color plane */ 113 int sc_video_on; /* zero if blanked */ 114 void *sc_va_cmap; /* Colormap h/w (mapped KVA) */ 115 void *sc_btcm; /* Soft cmap, Brooktree format */ 116 void (*sc_ldcmap) __P((struct cg4_softc *)); 117 struct soft_cmap sc_cmap; /* Soft cmap, user format */ 118 }; 119 120 /* autoconfiguration driver */ 121 static void cg4attach __P((struct device *, struct device *, void *)); 122 static int cg4match __P((struct device *, struct cfdata *, void *)); 123 124 CFATTACH_DECL(cgfour, sizeof(struct cg4_softc), 125 cg4match, cg4attach, NULL, NULL); 126 127 extern struct cfdriver cgfour_cd; 128 129 dev_type_open(cg4open); 130 dev_type_ioctl(cg4ioctl); 131 dev_type_mmap(cg4mmap); 132 133 const struct cdevsw cgfour_cdevsw = { 134 cg4open, nullclose, noread, nowrite, cg4ioctl, 135 nostop, notty, nopoll, cg4mmap, nokqfilter, 136 }; 137 138 static int cg4gattr __P((struct fbdevice *, void *)); 139 static int cg4gvideo __P((struct fbdevice *, void *)); 140 static int cg4svideo __P((struct fbdevice *, void *)); 141 static int cg4getcmap __P((struct fbdevice *, void *)); 142 static int cg4putcmap __P((struct fbdevice *, void *)); 143 144 #ifdef _SUN3_ 145 static void cg4a_init __P((struct cg4_softc *)); 146 static void cg4a_ldcmap __P((struct cg4_softc *)); 147 #endif /* SUN3 */ 148 149 static void cg4b_init __P((struct cg4_softc *)); 150 static void cg4b_ldcmap __P((struct cg4_softc *)); 151 152 static struct fbdriver cg4_fbdriver = { 153 cg4open, nullclose, cg4mmap, nokqfilter, cg4gattr, 154 cg4gvideo, cg4svideo, 155 cg4getcmap, cg4putcmap }; 156 157 /* 158 * Match a cg4. 159 */ 160 static int 161 cg4match(parent, cf, args) 162 struct device *parent; 163 struct cfdata *cf; 164 void *args; 165 { 166 struct confargs *ca = args; 167 int mid, p4id, peekval, tmp; 168 void *p4reg; 169 170 /* No default address support. */ 171 if (ca->ca_paddr == -1) 172 return (0); 173 174 /* 175 * Slight hack here: The low four bits of the 176 * config flags, if set, restrict the match to 177 * that machine "implementation" only. 178 */ 179 mid = cf->cf_flags & IDM_IMPL_MASK; 180 if (mid && (mid != (cpu_machine_id & IDM_IMPL_MASK))) 181 return (0); 182 183 /* 184 * The config flag 0x10 if set means we are 185 * looking for a Type A board (3/110). 186 */ 187 if (cf->cf_flags & 0x10) { 188 #ifdef _SUN3_ 189 /* Type A: Check for AMD RAMDACs in control space. */ 190 if (bus_peek(BUS_OBIO, CG4A_OBIO_CMAP, 1) == -1) 191 return (0); 192 /* Check for the overlay plane. */ 193 tmp = ca->ca_paddr + CG4A_OFF_OVERLAY; 194 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 195 return (0); 196 /* OK, it looks like a Type A. */ 197 return (1); 198 #else /* SUN3 */ 199 /* Only the Sun3/110 ever has a type A. */ 200 return (0); 201 #endif /* SUN3 */ 202 } 203 204 /* 205 * From here on, it is a type B or nothing. 206 * The config flag 0x20 if set means there 207 * is no P4 register. (bus error) 208 */ 209 if ((cf->cf_flags & 0x20) == 0) { 210 p4reg = bus_tmapin(ca->ca_bustype, ca->ca_paddr); 211 peekval = peek_long(p4reg); 212 p4id = (peekval == -1) ? 213 P4_NOTFOUND : fb_pfour_id(p4reg); 214 bus_tmapout(p4reg); 215 if (peekval == -1) 216 return (0); 217 if (p4id != P4_ID_COLOR8P1) { 218 #ifdef DEBUG 219 printf("cgfour at 0x%x match p4id=0x%x fails\n", 220 ca->ca_paddr, p4id & 0xFF); 221 #endif 222 return (0); 223 } 224 } 225 226 /* 227 * Check for CMAP hardware and overlay plane. 228 */ 229 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 230 if (bus_peek(ca->ca_bustype, tmp, 4) == -1) 231 return (0); 232 tmp = ca->ca_paddr + CG4B_OFF_OVERLAY; 233 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 234 return (0); 235 236 return (1); 237 } 238 239 /* 240 * Attach a display. We need to notice if it is the console, too. 241 */ 242 static void 243 cg4attach(parent, self, args) 244 struct device *parent, *self; 245 void *args; 246 { 247 struct cg4_softc *sc = (struct cg4_softc *)self; 248 struct fbdevice *fb = &sc->sc_fb; 249 struct confargs *ca = args; 250 struct fbtype *fbt; 251 int tmp; 252 253 fbt = &fb->fb_fbtype; 254 fbt->fb_type = FBTYPE_SUN4COLOR; 255 fbt->fb_width = 1152; /* default - see below */ 256 fbt->fb_height = 900; /* default - see below */ 257 fbt->fb_depth = 8; 258 fbt->fb_cmsize = 256; 259 fbt->fb_size = CG4_MMAP_SIZE; 260 fb->fb_driver = &cg4_fbdriver; 261 fb->fb_private = sc; 262 fb->fb_name = sc->sc_dev.dv_xname; 263 fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags; 264 265 /* 266 * The config flag 0x10 if set means we are 267 * attaching a Type A (3/110) which has the 268 * AMD RAMDACs in control space, and no P4. 269 */ 270 if (fb->fb_flags & 0x10) { 271 #ifdef _SUN3_ 272 sc->sc_cg4type = CG4_TYPE_A; 273 sc->sc_ldcmap = cg4a_ldcmap; 274 sc->sc_pa_overlay = ca->ca_paddr + CG4A_OFF_OVERLAY; 275 sc->sc_pa_enable = ca->ca_paddr + CG4A_OFF_ENABLE; 276 sc->sc_pa_pixmap = ca->ca_paddr + CG4A_OFF_PIXMAP; 277 sc->sc_va_cmap = bus_mapin(BUS_OBIO, CG4A_OBIO_CMAP, 278 sizeof(struct amd_regs)); 279 cg4a_init(sc); 280 #else /* SUN3 */ 281 panic("cgfour flags 0x10"); 282 #endif /* SUN3 */ 283 } else { 284 sc->sc_cg4type = CG4_TYPE_B; 285 sc->sc_ldcmap = cg4b_ldcmap; 286 sc->sc_pa_overlay = ca->ca_paddr + CG4B_OFF_OVERLAY; 287 sc->sc_pa_enable = ca->ca_paddr + CG4B_OFF_ENABLE; 288 sc->sc_pa_pixmap = ca->ca_paddr + CG4B_OFF_PIXMAP; 289 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 290 sc->sc_va_cmap = bus_mapin(ca->ca_bustype, tmp, 291 sizeof(struct bt_regs)); 292 cg4b_init(sc); 293 } 294 295 if ((fb->fb_flags & 0x20) == 0) { 296 /* It is supposed to have a P4 register. */ 297 fb->fb_pfour = bus_mapin(ca->ca_bustype, ca->ca_paddr, 4); 298 } 299 300 /* 301 * Determine width and height as follows: 302 * If it has a P4 register, use that; 303 * else if unit==0, use the EEPROM size, 304 * else make our best guess. 305 */ 306 if (fb->fb_pfour) 307 fb_pfour_setsize(fb); 308 else if (sc->sc_dev.dv_unit == 0) 309 fb_eeprom_setsize(fb); 310 else { 311 /* Guess based on machine ID. */ 312 switch (cpu_machine_id) { 313 default: 314 /* Leave the defaults set above. */ 315 break; 316 } 317 } 318 printf(" (%dx%d)\n", fbt->fb_width, fbt->fb_height); 319 320 /* 321 * Make sure video is on. This driver uses a 322 * black colormap to blank the screen, so if 323 * there is any global enable, set it here. 324 */ 325 tmp = 1; 326 cg4svideo(fb, &tmp); 327 if (fb->fb_pfour) 328 fb_pfour_set_video(fb, 1); 329 else 330 enable_video(1); 331 332 /* Let /dev/fb know we are here. */ 333 fb_attach(fb, 4); 334 } 335 336 int 337 cg4open(dev, flags, mode, p) 338 dev_t dev; 339 int flags, mode; 340 struct proc *p; 341 { 342 int unit = minor(dev); 343 344 if (unit >= cgfour_cd.cd_ndevs || cgfour_cd.cd_devs[unit] == NULL) 345 return (ENXIO); 346 return (0); 347 } 348 349 int 350 cg4ioctl(dev, cmd, data, flags, p) 351 dev_t dev; 352 u_long cmd; 353 caddr_t data; 354 int flags; 355 struct proc *p; 356 { 357 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 358 359 return (fbioctlfb(&sc->sc_fb, cmd, data)); 360 } 361 362 /* 363 * Return the address that would map the given device at the given 364 * offset, allowing for the given protection, or return -1 for error. 365 * 366 * X11 expects its mmap'd region to look like this: 367 * 128k overlay data memory 368 * 128k overlay enable bitmap 369 * 1024k color memory 370 * 371 * The hardware looks completely different. 372 */ 373 paddr_t 374 cg4mmap(dev, off, prot) 375 dev_t dev; 376 off_t off; 377 int prot; 378 { 379 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 380 int physbase; 381 382 if (off & PGOFSET) 383 panic("cg4mmap"); 384 385 if ((off < 0) || (off >= CG4_MMAP_SIZE)) 386 return (-1); 387 388 if (off < 0x40000) { 389 if (off < 0x20000) { 390 physbase = sc->sc_pa_overlay; 391 } else { 392 /* enable plane */ 393 off -= 0x20000; 394 physbase = sc->sc_pa_enable; 395 } 396 } else { 397 /* pixel map */ 398 off -= 0x40000; 399 physbase = sc->sc_pa_pixmap; 400 } 401 402 /* 403 * I turned on PMAP_NC here to disable the cache as I was 404 * getting horribly broken behaviour without it. 405 */ 406 return ((physbase + off) | PMAP_NC); 407 } 408 409 /* 410 * Internal ioctl functions. 411 */ 412 413 /* FBIOGATTR: */ 414 static int cg4gattr(fb, data) 415 struct fbdevice *fb; 416 void *data; 417 { 418 struct fbgattr *fba = data; 419 420 fba->real_type = fb->fb_fbtype.fb_type; 421 fba->owner = 0; /* XXX - TIOCCONS stuff? */ 422 fba->fbtype = fb->fb_fbtype; 423 fba->sattr.flags = 0; 424 fba->sattr.emu_type = fb->fb_fbtype.fb_type; 425 fba->sattr.dev_specific[0] = -1; 426 fba->emu_types[0] = fb->fb_fbtype.fb_type; 427 fba->emu_types[1] = -1; 428 return (0); 429 } 430 431 /* FBIOGVIDEO: */ 432 static int cg4gvideo(fb, data) 433 struct fbdevice *fb; 434 void *data; 435 { 436 struct cg4_softc *sc = fb->fb_private; 437 int *on = data; 438 439 *on = sc->sc_video_on; 440 return (0); 441 } 442 443 /* FBIOSVIDEO: */ 444 static int cg4svideo(fb, data) 445 struct fbdevice *fb; 446 void *data; 447 { 448 struct cg4_softc *sc = fb->fb_private; 449 int *on = data; 450 451 if (sc->sc_video_on == *on) 452 return (0); 453 sc->sc_video_on = *on; 454 455 (*sc->sc_ldcmap)(sc); 456 return (0); 457 } 458 459 /* 460 * FBIOGETCMAP: 461 * Copy current colormap out to user space. 462 */ 463 static int cg4getcmap(fb, data) 464 struct fbdevice *fb; 465 void *data; 466 { 467 struct cg4_softc *sc = fb->fb_private; 468 struct soft_cmap *cm = &sc->sc_cmap; 469 struct fbcmap *fbcm = data; 470 u_int start, count; 471 int error; 472 473 start = fbcm->index; 474 count = fbcm->count; 475 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 476 return (EINVAL); 477 478 if ((error = copyout(&cm->r[start], fbcm->red, count)) != 0) 479 return (error); 480 481 if ((error = copyout(&cm->g[start], fbcm->green, count)) != 0) 482 return (error); 483 484 if ((error = copyout(&cm->b[start], fbcm->blue, count)) != 0) 485 return (error); 486 487 return (0); 488 } 489 490 /* 491 * FBIOPUTCMAP: 492 * Copy new colormap from user space and load. 493 */ 494 static int cg4putcmap(fb, data) 495 struct fbdevice *fb; 496 void *data; 497 { 498 struct cg4_softc *sc = fb->fb_private; 499 struct soft_cmap *cm = &sc->sc_cmap; 500 struct fbcmap *fbcm = data; 501 u_int start, count; 502 int error; 503 504 start = fbcm->index; 505 count = fbcm->count; 506 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 507 return (EINVAL); 508 509 if ((error = copyin(fbcm->red, &cm->r[start], count)) != 0) 510 return (error); 511 512 if ((error = copyin(fbcm->green, &cm->g[start], count)) != 0) 513 return (error); 514 515 if ((error = copyin(fbcm->blue, &cm->b[start], count)) != 0) 516 return (error); 517 518 (*sc->sc_ldcmap)(sc); 519 return (0); 520 } 521 522 /**************************************************************** 523 * Routines for the "Type A" hardware 524 ****************************************************************/ 525 #ifdef _SUN3_ 526 527 static void 528 cg4a_init(sc) 529 struct cg4_softc *sc; 530 { 531 volatile struct amd_regs *ar = sc->sc_va_cmap; 532 struct soft_cmap *cm = &sc->sc_cmap; 533 int i; 534 535 /* Grab initial (current) color map. */ 536 for(i = 0; i < 256; i++) { 537 cm->r[i] = ar->r[i]; 538 cm->g[i] = ar->g[i]; 539 cm->b[i] = ar->b[i]; 540 } 541 } 542 543 static void 544 cg4a_ldcmap(sc) 545 struct cg4_softc *sc; 546 { 547 volatile struct amd_regs *ar = sc->sc_va_cmap; 548 struct soft_cmap *cm = &sc->sc_cmap; 549 int i; 550 551 /* 552 * Now blast them into the chip! 553 * XXX Should use retrace interrupt! 554 * Just set a "need load" bit and let the 555 * retrace interrupt handler do the work. 556 */ 557 if (sc->sc_video_on) { 558 /* Update H/W colormap. */ 559 for (i = 0; i < 256; i++) { 560 ar->r[i] = cm->r[i]; 561 ar->g[i] = cm->g[i]; 562 ar->b[i] = cm->b[i]; 563 } 564 } else { 565 /* Clear H/W colormap. */ 566 for (i = 0; i < 256; i++) { 567 ar->r[i] = 0; 568 ar->g[i] = 0; 569 ar->b[i] = 0; 570 } 571 } 572 } 573 #endif /* SUN3 */ 574 575 /**************************************************************** 576 * Routines for the "Type B" hardware 577 ****************************************************************/ 578 579 static void 580 cg4b_init(sc) 581 struct cg4_softc *sc; 582 { 583 volatile struct bt_regs *bt = sc->sc_va_cmap; 584 struct soft_cmap *cm = &sc->sc_cmap; 585 union bt_cmap_u *btcm; 586 int i; 587 588 /* Need a buffer for colormap format translation. */ 589 btcm = malloc(sizeof(*btcm), M_DEVBUF, M_WAITOK); 590 sc->sc_btcm = btcm; 591 592 /* 593 * BT458 chip initialization as described in Brooktree's 594 * 1993 Graphics and Imaging Product Databook (DB004-1/93). 595 * 596 * It appears that the 3/60 uses the low byte, and the 3/80 597 * uses the high byte, while both ignore the other bytes. 598 * Writing same value to all bytes works on both. 599 */ 600 bt->bt_addr = 0x04040404; /* select read mask register */ 601 bt->bt_ctrl = ~0; /* all planes on */ 602 bt->bt_addr = 0x05050505; /* select blink mask register */ 603 bt->bt_ctrl = 0; /* all planes non-blinking */ 604 bt->bt_addr = 0x06060606; /* select command register */ 605 bt->bt_ctrl = 0x43434343; /* palette enabled, overlay planes enabled */ 606 bt->bt_addr = 0x07070707; /* select test register */ 607 bt->bt_ctrl = 0; /* not test mode */ 608 609 /* grab initial (current) color map */ 610 bt->bt_addr = 0; 611 #ifdef _SUN3_ 612 /* Sun3/60 wants 32-bit access, packed. */ 613 for (i = 0; i < (256 * 3 / 4); i++) 614 btcm->btcm_int[i] = bt->bt_cmap; 615 #else /* SUN3 */ 616 /* Sun3/80 wants 8-bits in the high byte. */ 617 for (i = 0; i < (256 * 3); i++) 618 btcm->btcm_char[i] = bt->bt_cmap >> 24; 619 #endif /* SUN3 */ 620 621 /* Transpose into H/W cmap into S/W form. */ 622 for (i = 0; i < 256; i++) { 623 cm->r[i] = btcm->btcm_rgb[i][0]; 624 cm->g[i] = btcm->btcm_rgb[i][1]; 625 cm->b[i] = btcm->btcm_rgb[i][2]; 626 } 627 } 628 629 static void 630 cg4b_ldcmap(sc) 631 struct cg4_softc *sc; 632 { 633 volatile struct bt_regs *bt = sc->sc_va_cmap; 634 struct soft_cmap *cm = &sc->sc_cmap; 635 union bt_cmap_u *btcm = sc->sc_btcm; 636 int i; 637 638 /* Transpose S/W cmap into H/W form. */ 639 for (i = 0; i < 256; i++) { 640 btcm->btcm_rgb[i][0] = cm->r[i]; 641 btcm->btcm_rgb[i][1] = cm->g[i]; 642 btcm->btcm_rgb[i][2] = cm->b[i]; 643 } 644 645 /* 646 * Now blast them into the chip! 647 * XXX Should use retrace interrupt! 648 * Just set a "need load" bit and let the 649 * retrace interrupt handler do the work. 650 */ 651 bt->bt_addr = 0; 652 653 #ifdef _SUN3_ 654 /* Sun3/60 wants 32-bit access, packed. */ 655 if (sc->sc_video_on) { 656 /* Update H/W colormap. */ 657 for (i = 0; i < (256 * 3 / 4); i++) 658 bt->bt_cmap = btcm->btcm_int[i]; 659 } else { 660 /* Clear H/W colormap. */ 661 for (i = 0; i < (256 * 3 / 4); i++) 662 bt->bt_cmap = 0; 663 } 664 #else /* SUN3 */ 665 /* Sun3/80 wants 8-bits in the high byte. */ 666 if (sc->sc_video_on) { 667 /* Update H/W colormap. */ 668 for (i = 0; i < (256 * 3); i++) 669 bt->bt_cmap = btcm->btcm_char[i] << 24; 670 } else { 671 /* Clear H/W colormap. */ 672 for (i = 0; i < (256 * 3); i++) 673 bt->bt_cmap = 0; 674 } 675 #endif /* SUN3 */ 676 } 677 678
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