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cg4.c revision 1.4
      1 /*	$NetBSD: cg4.c,v 1.4 1995/04/10 05:45:29 mycroft Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. All advertising materials mentioning features or use of this software
     25  *    must display the following acknowledgement:
     26  *	This product includes software developed by the University of
     27  *	California, Berkeley and its contributors.
     28  * 4. Neither the name of the University nor the names of its contributors
     29  *    may be used to endorse or promote products derived from this software
     30  *    without specific prior written permission.
     31  *
     32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     42  * SUCH DAMAGE.
     43  *
     44  *	from: @(#)cgthree.c	8.2 (Berkeley) 10/30/93
     45  */
     46 
     47 /*
     48  * color display (cg4) driver.
     49  *
     50  * Does not handle interrupts, even though they can occur.
     51  *
     52  * XXX should defer colormap updates to vertical retrace interrupts
     53  */
     54 
     55 #include <sys/param.h>
     56 #include <sys/device.h>
     57 #include <sys/ioctl.h>
     58 #include <sys/malloc.h>
     59 #include <sys/mman.h>
     60 #include <sys/tty.h>
     61 
     62 #include <vm/vm.h>
     63 
     64 #include <machine/cpu.h>
     65 #include <machine/fbio.h>
     66 #include <machine/autoconf.h>
     67 #include <machine/pmap.h>
     68 
     69 #include "fbvar.h"
     70 #include "btreg.h"
     71 #include "btvar.h"
     72 #include "cg4reg.h"
     73 
     74 extern unsigned char cpu_machine_id;
     75 
     76 /* per-display variables */
     77 struct cg4_softc {
     78 	struct	device sc_dev;		/* base device */
     79 	struct	fbdevice sc_fb;		/* frame buffer device */
     80 	volatile struct bt_regs *sc_bt;	/* Brooktree registers */
     81 	int 	sc_phys;		/* display RAM (phys addr) */
     82 	int 	sc_blanked;		/* true if blanked */
     83 	union	bt_cmap sc_cmap;	/* Brooktree color map */
     84 };
     85 
     86 /* autoconfiguration driver */
     87 static void	cg4attach __P((struct device *, struct device *, void *));
     88 static int	cg4match __P((struct device *, void *, void *));
     89 
     90 struct cfdriver cgfourcd = {
     91 	NULL, "cgfour", cg4match, cg4attach,
     92 	DV_DULL, sizeof(struct cg4_softc) };
     93 
     94 /* frame buffer generic driver */
     95 int cg4open(), cg4close(), cg4mmap();
     96 
     97 static int  cg4gattr __P((struct fbdevice *, struct fbgattr *));
     98 static int  cg4gvideo __P((struct fbdevice *, int *));
     99 static int	cg4svideo __P((struct fbdevice *, int *));
    100 static int	cg4getcmap __P((struct fbdevice *, struct fbcmap *));
    101 static int	cg4putcmap __P((struct fbdevice *, struct fbcmap *));
    102 
    103 static struct fbdriver cg4fbdriver = {
    104 	cg4open, cg4close, cg4map, cg4gattr,
    105 	cg4gvideo, cg4svideo,
    106 	cg4getcmap, cg4putcmap };
    107 
    108 static void cg4loadcmap __P((struct cg4_softc *, int, int));
    109 
    110 /*
    111  * Match a cg4.
    112  */
    113 static int
    114 cg4match(parent, vcf, args)
    115 	struct device *parent;
    116 	void *vcf, *args;
    117 {
    118 	struct confargs *ca = args;
    119 	int paddr, x;
    120 
    121 	/* XXX - Huge hack due to lack of probe info... */
    122 	switch (cpu_machine_id) {
    123 		/* Machines that might have a cg4 (gag). */
    124 	case SUN3_MACH_50:
    125 	case SUN3_MACH_60:
    126 	case SUN3_MACH_110:
    127 		break;
    128 	default:
    129 		return (0);
    130 	}
    131 
    132 	if (ca->ca_paddr == -1)
    133 		ca->ca_paddr = 0xFF200000;
    134 
    135 	paddr = ca->ca_paddr;
    136 	x = bus_peek(ca->ca_bustype, paddr, 1);
    137 	if (x == -1)
    138 		return (0);
    139 
    140 	paddr += CG4REG_PIXMAP;
    141 	x = bus_peek(ca->ca_bustype, paddr, 1);
    142 	if (x == -1)
    143 		return (0);
    144 
    145 	return (1);
    146 }
    147 
    148 /*
    149  * Attach a display.  We need to notice if it is the console, too.
    150  */
    151 static void
    152 cg4attach(parent, self, args)
    153 	struct device *parent, *self;
    154 	void *args;
    155 {
    156 	struct cg4_softc *sc = (struct cg4_softc *)self;
    157 	struct fbdevice *fb = &sc->sc_fb;
    158 	struct confargs *ca = args;
    159 	struct fbtype *fbt;
    160 	volatile struct bt_regs *bt;
    161 	int i, ramsize, pa;
    162 
    163 	fb->fb_driver = &cg4fbdriver;
    164 	fb->fb_private = sc;
    165 	fb->fb_name = sc->sc_dev.dv_xname;
    166 
    167 	fbt = &fb->fb_fbtype;
    168 	fbt->fb_type = FBTYPE_SUN4COLOR;
    169 	fbt->fb_depth = 8;
    170 	fbt->fb_cmsize = 256;
    171 
    172 	fbt->fb_width = 1152;
    173 	fbt->fb_height = 900;
    174 	fbt->fb_size = CG4_MMAP_SIZE;
    175 
    176 	sc->sc_phys = ca->ca_paddr;
    177 	sc->sc_bt = (struct bt_regs *)
    178 		bus_mapin(ca->ca_bustype, ca->ca_paddr,
    179 				  sizeof(struct bt_regs *));
    180 
    181 	/* grab initial (current) color map */
    182 	bt->bt_addr = 0;
    183 	for (i = 0; i < (256 * 3 / 4); i++)
    184 		sc->sc_cmap.cm_chip[i] = bt->bt_cmap;
    185 
    186 	/*
    187 	 * BT458 chip initialization as described in Brooktree's
    188 	 * 1993 Graphics and Imaging Product Databook (DB004-1/93).
    189 	 */
    190 	bt->bt_addr = 0x04;	/* select read mask register */
    191 	bt->bt_ctrl = 0xff;	/* all planes on */
    192 	bt->bt_addr = 0x05;	/* select blink mask register */
    193 	bt->bt_ctrl = 0x00;	/* all planes non-blinking */
    194 	bt->bt_addr = 0x06;	/* select command register */
    195 	bt->bt_ctrl = 0x43;	/* palette enabled, overlay planes enabled */
    196 	bt->bt_addr = 0x07;	/* select test register */
    197 	bt->bt_ctrl = 0x00;	/* set test mode */
    198 
    199 	printf(" (%dx%d)\n", fbt->fb_width, fbt->fb_height);
    200 	fb_attach(fb, 4);
    201 }
    202 
    203 int
    204 cg4open(dev, flags, mode, p)
    205 	dev_t dev;
    206 	int flags, mode;
    207 	struct proc *p;
    208 {
    209 	int unit = minor(dev);
    210 
    211 	if (unit >= cgfourcd.cd_ndevs || cgfourcd.cd_devs[unit] == NULL)
    212 		return (ENXIO);
    213 	return (0);
    214 }
    215 
    216 int
    217 cg4close(dev, flags, mode, p)
    218 	dev_t dev;
    219 	int flags, mode;
    220 	struct proc *p;
    221 {
    222 
    223 	return (0);
    224 }
    225 
    226 int
    227 cg4ioctl(dev, cmd, data, flags, p)
    228 	dev_t dev;
    229 	u_long cmd;
    230 	caddr_t data;
    231 	int flags;
    232 	struct proc *p;
    233 {
    234 	struct cg4_softc *sc = cgfourcd.cd_devs[minor(dev)];
    235 
    236 	return (fbioctlfb(&sc->sc_fb, cmd, data));
    237 }
    238 
    239 /*
    240  * Return the address that would map the given device at the given
    241  * offset, allowing for the given protection, or return -1 for error.
    242  *
    243  * X11 expects its mmap'd region to look like this:
    244  * 	128k overlay memory
    245  * 	128k overlay-enable bitmap
    246  * 	1024k color memory
    247  *
    248  * The hardware really looks like this (starting at ca_paddr)
    249  *  4 bytes Brooktree DAC registers
    250  *  2MB-4 gap
    251  * 	128k overlay memory
    252  * 	1920k gap
    253  * 	128k overlay-enable bitmap
    254  * 	1920k gap
    255  * 	1024k color memory
    256  */
    257 int
    258 cg4mmap(dev, off, prot)
    259 	dev_t dev;
    260 	register int off;
    261 	int prot;
    262 {
    263 	struct cg4_softc *sc = cgfourcd.cd_devs[minor(dev)];
    264 	register int physbase;
    265 
    266 	if (off & PGOFSET)
    267 		panic("cg4map");
    268 
    269 	if ((unsigned)off >= CG4_MMAP_SIZE)
    270 		return (-1);
    271 
    272 	physbase = sc->sc_phys;
    273 	if (off < 0x40000) {
    274 		if (off < 0x20000) {
    275 			/* overlay plane */
    276 			physbase += CG4REG_OVERLAY;
    277 		} else {
    278 			/* enable plane */
    279 			off -= 0x20000;
    280 			physbase += CG4REG_ENABLE;
    281 		}
    282 	} else {
    283 		/* pixel map */
    284 		off -= 0x40000;
    285 		physbase += CG4REG_PIXMAP;
    286 	}
    287 
    288 	/*
    289 	 * I turned on PMAP_NC here to disable the cache as I was
    290 	 * getting horribly broken behaviour with it on.
    291 	 */
    292 	return ((physbase + off) | PMAP_NC);
    293 }
    294 
    295 /*
    296  * Internal ioctl functions.
    297  */
    298 
    299 /* FBIOGATTR: */
    300 static int  cg4gattr(fb, fba)
    301 	struct fbdevice *fb;
    302 	struct fbgattr *fba;
    303 {
    304 
    305 	fba->real_type = fb->fb_fbtype.fb_type;
    306 	fba->owner = 0;		/* XXX - TIOCCONS stuff? */
    307 	fba->fbtype = fb->fb_fbtype;
    308 	fba->sattr.flags = 0;
    309 	fba->sattr.emu_type = fb->fb_fbtype.fb_type;
    310 	fba->sattr.dev_specific[0] = -1;
    311 	fba->emu_types[0] = fb->fb_fbtype.fb_type;
    312 	fba->emu_types[1] = -1;
    313 	return (0);
    314 }
    315 
    316 /* FBIOGVIDEO: */
    317 static int  cg4gvideo(fb, on)
    318 	struct fbdevice *fb;
    319 	int *on;
    320 {
    321 	struct cg4_softc *sc = fb->fb_private;
    322 
    323 	*on = !sc->sc_blanked;
    324 	return (0);
    325 }
    326 
    327 /* FBIOSVIDEO: */
    328 static int cg4svideo(fb, on)
    329 	struct fbdevice *fb;
    330 	int *on;
    331 {
    332 	struct cg4_softc *sc = fb->fb_private;
    333 	register volatile struct bt_regs *bt = sc->sc_bt;
    334 
    335 	if ((*on == 0) && (sc->sc_blanked == 0)) {
    336 		/* Turn OFF video (blank it). */
    337 		bt->bt_addr = 0x06;	/* command reg */
    338 		bt->bt_ctrl = 0x70;	/* overlay plane */
    339 		bt->bt_addr = 0x04;	/* read mask */
    340 		bt->bt_ctrl = 0x00;	/* color planes */
    341 		/*
    342 		 * Set color 0 to black -- note that this overwrites
    343 		 * R of color 1.
    344 		 */
    345 		bt->bt_addr = 0;
    346 		bt->bt_cmap = 0;
    347 
    348 		sc->sc_blanked = 1;
    349 	}
    350 
    351 	if ((*on != 0) && (sc->sc_blanked != 0)) {
    352 		/* Turn video back ON (unblank). */
    353 		sc->sc_blanked = 0;
    354 
    355 		/* restore color 0 (and R of color 1) */
    356 		bt->bt_addr = 0;
    357 		bt->bt_cmap = sc->sc_cmap.cm_chip[0];
    358 
    359 		/* restore read mask */
    360 		bt->bt_addr = 0x06;	/* command reg */
    361 		bt->bt_ctrl = 0x73;	/* overlay plane */
    362 		bt->bt_addr = 0x04;	/* read mask */
    363 		bt->bt_ctrl = 0xff;	/* color planes */
    364 	}
    365 	return (0);
    366 }
    367 
    368 /* FBIOGETCMAP: */
    369 static int cg4getcmap(fb, cmap)
    370 	struct fbdevice *fb;
    371 	struct fbcmap *cmap;
    372 {
    373 	struct cg4_softc *sc = fb->fb_private;
    374 
    375 	return (bt_getcmap(cmap, &sc->sc_cmap, 256));
    376 }
    377 
    378 /* FBIOPUTCMAP: */
    379 static int cg4putcmap(fb, cmap)
    380 	struct fbdevice *fb;
    381 	struct fbcmap *cmap;
    382 {
    383 	struct cg4_softc *sc = fb->fb_private;
    384 	int error;
    385 
    386 	/* copy to software map */
    387 	error = bt_putcmap(cmap, &sc->sc_cmap, 256);
    388 	if (error == 0) {
    389 		/* now blast them into the chip */
    390 		/* XXX should use retrace interrupt */
    391 		cg4loadcmap(sc, cmap->index, cmap->count);
    392 	}
    393 	return (error);
    394 }
    395 
    396 /*
    397  * Load a subset of the current (new) colormap into the Brooktree DAC.
    398  */
    399 static void
    400 cg4loadcmap(sc, start, ncolors)
    401 	struct cg4_softc *sc;
    402 	int start, ncolors;
    403 {
    404 	volatile struct bt_regs *bt;
    405 	u_int *ip;
    406 	int count;
    407 
    408 	ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)];	/* start/4 * 3 */
    409 	count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3;
    410 	bt = sc->sc_bt;
    411 	bt->bt_addr = BT_D4M4(start);
    412 	while (--count >= 0)
    413 		bt->bt_cmap = *ip++;
    414 }
    415