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cg4.c revision 1.8
      1 /*	$NetBSD: cg4.c,v 1.8 1996/10/09 00:15:18 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. All advertising materials mentioning features or use of this software
     25  *    must display the following acknowledgement:
     26  *	This product includes software developed by the University of
     27  *	California, Berkeley and its contributors.
     28  * 4. Neither the name of the University nor the names of its contributors
     29  *    may be used to endorse or promote products derived from this software
     30  *    without specific prior written permission.
     31  *
     32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     42  * SUCH DAMAGE.
     43  *
     44  *	from: @(#)cgthree.c	8.2 (Berkeley) 10/30/93
     45  */
     46 
     47 /*
     48  * color display (cg4) driver.
     49  *
     50  * Does not handle interrupts, even though they can occur.
     51  *
     52  * XXX should defer colormap updates to vertical retrace interrupts
     53  */
     54 
     55 #include <sys/param.h>
     56 #include <sys/device.h>
     57 #include <sys/ioctl.h>
     58 #include <sys/malloc.h>
     59 #include <sys/mman.h>
     60 #include <sys/tty.h>
     61 
     62 #include <vm/vm.h>
     63 
     64 #include <machine/cpu.h>
     65 #include <machine/fbio.h>
     66 #include <machine/autoconf.h>
     67 #include <machine/pmap.h>
     68 
     69 #include "fbvar.h"
     70 #include "btreg.h"
     71 #include "btvar.h"
     72 #include "cg4reg.h"
     73 
     74 extern unsigned char cpu_machine_id;
     75 
     76 /* per-display variables */
     77 struct cg4_softc {
     78 	struct	device sc_dev;		/* base device */
     79 	struct	fbdevice sc_fb;		/* frame buffer device */
     80 	volatile struct bt_regs *sc_bt;	/* Brooktree registers */
     81 	int 	sc_phys;		/* display RAM (phys addr) */
     82 	int 	sc_blanked;		/* true if blanked */
     83 	union	bt_cmap sc_cmap;	/* Brooktree color map */
     84 };
     85 
     86 /* autoconfiguration driver */
     87 static void	cg4attach __P((struct device *, struct device *, void *));
     88 static int	cg4match __P((struct device *, void *, void *));
     89 
     90 struct cfattach cgfour_ca = {
     91 	sizeof(struct cg4_softc), cg4match, cg4attach
     92 };
     93 
     94 struct cfdriver cgfour_cd = {
     95 	NULL, "cgfour", DV_DULL
     96 };
     97 
     98 /* frame buffer generic driver */
     99 int cg4open(), cg4close(), cg4mmap();
    100 
    101 static int  cg4gattr __P((struct fbdevice *, struct fbgattr *));
    102 static int  cg4gvideo __P((struct fbdevice *, int *));
    103 static int	cg4svideo __P((struct fbdevice *, int *));
    104 static int	cg4getcmap __P((struct fbdevice *, struct fbcmap *));
    105 static int	cg4putcmap __P((struct fbdevice *, struct fbcmap *));
    106 
    107 static struct fbdriver cg4fbdriver = {
    108 	cg4open, cg4close, cg4mmap, cg4gattr,
    109 	cg4gvideo, cg4svideo,
    110 	cg4getcmap, cg4putcmap };
    111 
    112 static void cg4loadcmap __P((struct cg4_softc *, int, int));
    113 
    114 /*
    115  * Match a cg4.
    116  */
    117 static int
    118 cg4match(parent, vcf, args)
    119 	struct device *parent;
    120 	void *vcf, *args;
    121 {
    122 	struct confargs *ca = args;
    123 	int paddr, x;
    124 
    125 	/* XXX - Huge hack due to lack of probe info... */
    126 	switch (cpu_machine_id) {
    127 		/* Machines that might have a cg4 (gag). */
    128 	case SUN3_MACH_50:
    129 	case SUN3_MACH_60:
    130 	case SUN3_MACH_110:
    131 		break;
    132 	default:
    133 		return (0);
    134 	}
    135 
    136 	if (ca->ca_paddr == -1)
    137 		ca->ca_paddr = 0xFF200000;
    138 
    139 	paddr = ca->ca_paddr;
    140 	x = bus_peek(ca->ca_bustype, paddr, 1);
    141 	if (x == -1)
    142 		return (0);
    143 
    144 	paddr += CG4REG_PIXMAP;
    145 	x = bus_peek(ca->ca_bustype, paddr, 1);
    146 	if (x == -1)
    147 		return (0);
    148 
    149 	return (1);
    150 }
    151 
    152 /*
    153  * Attach a display.  We need to notice if it is the console, too.
    154  */
    155 static void
    156 cg4attach(parent, self, args)
    157 	struct device *parent, *self;
    158 	void *args;
    159 {
    160 	struct cg4_softc *sc = (struct cg4_softc *)self;
    161 	struct fbdevice *fb = &sc->sc_fb;
    162 	struct confargs *ca = args;
    163 	struct fbtype *fbt;
    164 	volatile struct bt_regs *bt;
    165 	int i;
    166 
    167 	fb->fb_driver = &cg4fbdriver;
    168 	fb->fb_private = sc;
    169 	fb->fb_name = sc->sc_dev.dv_xname;
    170 
    171 	fbt = &fb->fb_fbtype;
    172 	fbt->fb_type = FBTYPE_SUN4COLOR;
    173 	fbt->fb_depth = 8;
    174 	fbt->fb_cmsize = 256;
    175 
    176 	fbt->fb_width = 1152;
    177 	fbt->fb_height = 900;
    178 	fbt->fb_size = CG4_MMAP_SIZE;
    179 
    180 	sc->sc_phys = ca->ca_paddr;
    181 	sc->sc_bt = bt = (volatile struct bt_regs *)
    182 		bus_mapin(ca->ca_bustype, ca->ca_paddr,
    183 				  sizeof(struct bt_regs *));
    184 
    185 	/* grab initial (current) color map */
    186 	bt->bt_addr = 0;
    187 	for (i = 0; i < (256 * 3 / 4); i++)
    188 		sc->sc_cmap.cm_chip[i] = bt->bt_cmap;
    189 
    190 	/*
    191 	 * BT458 chip initialization as described in Brooktree's
    192 	 * 1993 Graphics and Imaging Product Databook (DB004-1/93).
    193 	 */
    194 	bt->bt_addr = 0x04;	/* select read mask register */
    195 	bt->bt_ctrl = 0xff;	/* all planes on */
    196 	bt->bt_addr = 0x05;	/* select blink mask register */
    197 	bt->bt_ctrl = 0x00;	/* all planes non-blinking */
    198 	bt->bt_addr = 0x06;	/* select command register */
    199 	bt->bt_ctrl = 0x43;	/* palette enabled, overlay planes enabled */
    200 	bt->bt_addr = 0x07;	/* select test register */
    201 	bt->bt_ctrl = 0x00;	/* set test mode */
    202 
    203 	printf(" (%dx%d)\n", fbt->fb_width, fbt->fb_height);
    204 	fb_attach(fb, 4);
    205 }
    206 
    207 int
    208 cg4open(dev, flags, mode, p)
    209 	dev_t dev;
    210 	int flags, mode;
    211 	struct proc *p;
    212 {
    213 	int unit = minor(dev);
    214 
    215 	if (unit >= cgfour_cd.cd_ndevs || cgfour_cd.cd_devs[unit] == NULL)
    216 		return (ENXIO);
    217 	return (0);
    218 }
    219 
    220 int
    221 cg4close(dev, flags, mode, p)
    222 	dev_t dev;
    223 	int flags, mode;
    224 	struct proc *p;
    225 {
    226 
    227 	return (0);
    228 }
    229 
    230 int
    231 cg4ioctl(dev, cmd, data, flags, p)
    232 	dev_t dev;
    233 	u_long cmd;
    234 	caddr_t data;
    235 	int flags;
    236 	struct proc *p;
    237 {
    238 	struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)];
    239 
    240 	return (fbioctlfb(&sc->sc_fb, cmd, data));
    241 }
    242 
    243 /*
    244  * Return the address that would map the given device at the given
    245  * offset, allowing for the given protection, or return -1 for error.
    246  *
    247  * X11 expects its mmap'd region to look like this:
    248  * 	128k overlay memory
    249  * 	128k overlay-enable bitmap
    250  * 	1024k color memory
    251  *
    252  * The hardware really looks like this (starting at ca_paddr)
    253  *  4 bytes Brooktree DAC registers
    254  *  2MB-4 gap
    255  * 	128k overlay memory
    256  * 	1920k gap
    257  * 	128k overlay-enable bitmap
    258  * 	1920k gap
    259  * 	1024k color memory
    260  */
    261 int
    262 cg4mmap(dev, off, prot)
    263 	dev_t dev;
    264 	register int off;
    265 	int prot;
    266 {
    267 	struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)];
    268 	register int physbase;
    269 
    270 	if (off & PGOFSET)
    271 		panic("cg4mmap");
    272 
    273 	if ((unsigned)off >= CG4_MMAP_SIZE)
    274 		return (-1);
    275 
    276 	physbase = sc->sc_phys;
    277 	if (off < 0x40000) {
    278 		if (off < 0x20000) {
    279 			/* overlay plane */
    280 			physbase += CG4REG_OVERLAY;
    281 		} else {
    282 			/* enable plane */
    283 			off -= 0x20000;
    284 			physbase += CG4REG_ENABLE;
    285 		}
    286 	} else {
    287 		/* pixel map */
    288 		off -= 0x40000;
    289 		physbase += CG4REG_PIXMAP;
    290 	}
    291 
    292 	/*
    293 	 * I turned on PMAP_NC here to disable the cache as I was
    294 	 * getting horribly broken behaviour with it on.
    295 	 */
    296 	return ((physbase + off) | PMAP_NC);
    297 }
    298 
    299 /*
    300  * Internal ioctl functions.
    301  */
    302 
    303 /* FBIOGATTR: */
    304 static int  cg4gattr(fb, fba)
    305 	struct fbdevice *fb;
    306 	struct fbgattr *fba;
    307 {
    308 
    309 	fba->real_type = fb->fb_fbtype.fb_type;
    310 	fba->owner = 0;		/* XXX - TIOCCONS stuff? */
    311 	fba->fbtype = fb->fb_fbtype;
    312 	fba->sattr.flags = 0;
    313 	fba->sattr.emu_type = fb->fb_fbtype.fb_type;
    314 	fba->sattr.dev_specific[0] = -1;
    315 	fba->emu_types[0] = fb->fb_fbtype.fb_type;
    316 	fba->emu_types[1] = -1;
    317 	return (0);
    318 }
    319 
    320 /* FBIOGVIDEO: */
    321 static int  cg4gvideo(fb, on)
    322 	struct fbdevice *fb;
    323 	int *on;
    324 {
    325 	struct cg4_softc *sc = fb->fb_private;
    326 
    327 	*on = !sc->sc_blanked;
    328 	return (0);
    329 }
    330 
    331 /* FBIOSVIDEO: */
    332 static int cg4svideo(fb, on)
    333 	struct fbdevice *fb;
    334 	int *on;
    335 {
    336 	struct cg4_softc *sc = fb->fb_private;
    337 	register volatile struct bt_regs *bt = sc->sc_bt;
    338 
    339 	if ((*on == 0) && (sc->sc_blanked == 0)) {
    340 		/* Turn OFF video (blank it). */
    341 		bt->bt_addr = 0x06;	/* command reg */
    342 		bt->bt_ctrl = 0x70;	/* overlay plane */
    343 		bt->bt_addr = 0x04;	/* read mask */
    344 		bt->bt_ctrl = 0x00;	/* color planes */
    345 		/*
    346 		 * Set color 0 to black -- note that this overwrites
    347 		 * R of color 1.
    348 		 */
    349 		bt->bt_addr = 0;
    350 		bt->bt_cmap = 0;
    351 
    352 		sc->sc_blanked = 1;
    353 	}
    354 
    355 	if ((*on != 0) && (sc->sc_blanked != 0)) {
    356 		/* Turn video back ON (unblank). */
    357 		sc->sc_blanked = 0;
    358 
    359 		/* restore color 0 (and R of color 1) */
    360 		bt->bt_addr = 0;
    361 		bt->bt_cmap = sc->sc_cmap.cm_chip[0];
    362 
    363 		/* restore read mask */
    364 		bt->bt_addr = 0x06;	/* command reg */
    365 		bt->bt_ctrl = 0x73;	/* overlay plane */
    366 		bt->bt_addr = 0x04;	/* read mask */
    367 		bt->bt_ctrl = 0xff;	/* color planes */
    368 	}
    369 	return (0);
    370 }
    371 
    372 /* FBIOGETCMAP: */
    373 static int cg4getcmap(fb, cmap)
    374 	struct fbdevice *fb;
    375 	struct fbcmap *cmap;
    376 {
    377 	struct cg4_softc *sc = fb->fb_private;
    378 
    379 	return (bt_getcmap(cmap, &sc->sc_cmap, 256));
    380 }
    381 
    382 /* FBIOPUTCMAP: */
    383 static int cg4putcmap(fb, cmap)
    384 	struct fbdevice *fb;
    385 	struct fbcmap *cmap;
    386 {
    387 	struct cg4_softc *sc = fb->fb_private;
    388 	int error;
    389 
    390 	/* copy to software map */
    391 	error = bt_putcmap(cmap, &sc->sc_cmap, 256);
    392 	if (error == 0) {
    393 		/* now blast them into the chip */
    394 		/* XXX should use retrace interrupt */
    395 		cg4loadcmap(sc, cmap->index, cmap->count);
    396 	}
    397 	return (error);
    398 }
    399 
    400 /*
    401  * Load a subset of the current (new) colormap into the Brooktree DAC.
    402  */
    403 static void
    404 cg4loadcmap(sc, start, ncolors)
    405 	struct cg4_softc *sc;
    406 	int start, ncolors;
    407 {
    408 	volatile struct bt_regs *bt;
    409 	u_int *ip;
    410 	int count;
    411 
    412 	ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)];	/* start/4 * 3 */
    413 	count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3;
    414 	bt = sc->sc_bt;
    415 	bt->bt_addr = BT_D4M4(start);
    416 	while (--count >= 0)
    417 		bt->bt_cmap = *ip++;
    418 }
    419