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if_ievar.h revision 1.6 
      1 /*	$NetBSD: if_ievar.h,v 1.6 1996/03/26 14:38:33 gwr Exp $	*/
      2 
      3 /*
      4  * Machine-dependent glue for the Intel Ethernet (ie) driver.
      5  */
      6 
      7 #define B_PER_F         3	/* number of buffers to allocate per frame */
      8 #define	MXFRAMES	256	/* max number of frames to allow for receive */
      9 #define	MXRXBUF (MXFRAMES*B_PER_F)	/* max number of buffers to allocate */
     10 #define	IE_RBUF_SIZE	256	/* size of each buffer, MUST BE POWER OF TWO */
     11 #define	NTXBUF		2	/* number of transmit buffer/command pairs */
     12 #define	IE_TBUF_SIZE	(3*512)	/* length of transmit buffer */
     13 
     14 enum ie_hardware {
     15 	IE_VME,			/* multibus to VME ie card */
     16 	IE_OBIO,		/* on board */
     17 	IE_VME3E,		/* sun 3e VME card */
     18 	IE_UNKNOWN
     19 };
     20 
     21 /*
     22  * Ethernet status, per interface.
     23  *
     24  * hardware addresses/sizes to know (all KVA):
     25  *   sc_iobase = base of chip's 24 bit address space
     26  *   sc_maddr  = base address of chip RAM as stored in ie_base of iscp
     27  *   sc_msize  = size of chip's RAM
     28  *   sc_reg    = address of card dependent registers
     29  *
     30  * the chip uses two types of pointers: 16 bit and 24 bit
     31  *   16 bit pointers are offsets from sc_maddr/ie_base
     32  *      KVA(16 bit offset) = offset + sc_maddr
     33  *   24 bit pointers are offset from sc_iobase in KVA
     34  *      KVA(24 bit address) = address + sc_iobase
     35  *
     36  * on the vme/multibus we have the page map to control where ram appears
     37  * in the address space.   we choose to have RAM start at 0 in the
     38  * 24 bit address space.   this means that sc_iobase == sc_maddr!
     39  * to get the phyiscal address of the board's RAM you must take the
     40  * top 12 bits of the physical address of the register address
     41  * and or in the 4 bits from the status word as bits 17-20 (remember that
     42  * the board ignores the chip's top 4 address lines).
     43  * For example:
     44  *   if the register is @ 0xffe88000, then the top 12 bits are 0xffe00000.
     45  *   to get the 4 bits from the the status word just do status & IEVME_HADDR.
     46  *   suppose the value is "4".   Then just shift it left 16 bits to get
     47  *   it into bits 17-20 (e.g. 0x40000).    Then or it to get the
     48  *   address of RAM (in our example: 0xffe40000).   see the attach routine!
     49  *
     50  * In the onboard ie interface, the 24 bit address space is hardwired
     51  * to be 0xff000000 -> 0xffffffff of KVA.   this means that sc_iobase
     52  * will be 0xff000000.   sc_maddr will be where ever we allocate RAM
     53  * in KVA.    note that since the SCP is at a fixed address it means
     54  * that we have to use some memory at a fixed KVA for the SCP.
     55  * The Sun PROM leaves a page for us at the end of KVA space.
     56  */
     57 struct ie_softc {
     58 	struct device sc_dev;	/* device structure */
     59 
     60 	struct arpcom sc_arpcom;/* system arpcom structure */
     61 #define	sc_if	sc_arpcom.ac_if 		/* network-visible interface */
     62 #define	sc_addr	sc_arpcom.ac_enaddr		/* hardware Ethernet address */
     63 
     64 	caddr_t sc_iobase;	/* KVA of base of 24bit addr space */
     65 	caddr_t sc_maddr;	/* KVA of base of chip's RAM */
     66 	u_int   sc_msize;	/* how much RAM we have/use */
     67 	caddr_t sc_reg;		/* KVA of card's register */
     68 
     69 	enum ie_hardware hard_type;	/* card type */
     70 	void    (*reset_586)();	/* card dependent reset function */
     71 	void    (*chan_attn)();	/* card dependent attn function */
     72 	void    (*run_586)();	/* card dependent "go on-line" function */
     73 	void (*sc_bcopy) __P((const void *, void *, u_int));
     74 	void (*sc_bzero) __P((void *, u_int));
     75 
     76 	int     want_mcsetup;	/* flag for multicast setup */
     77 	int     promisc;	/* are we in promisc mode? */
     78 
     79 	/*
     80 	 * pointers to the 3 major control structures
     81 	 */
     82 	volatile struct ie_sys_conf_ptr *scp;
     83 	volatile struct ie_int_sys_conf_ptr *iscp;
     84 	volatile struct ie_sys_ctl_block *scb;
     85 
     86 	/*
     87 	 * pointer and size of a block of KVA where the buffers
     88 	 * are to be allocated from
     89 	 */
     90 	caddr_t buf_area;
     91 	int     buf_area_sz;
     92 
     93 	/*
     94 	 * the actual buffers (recv and xmit)
     95 	 */
     96 	volatile struct ie_recv_frame_desc *rframes[MXFRAMES];
     97 	volatile struct ie_recv_buf_desc *rbuffs[MXRXBUF];
     98 	volatile char *cbuffs[MXRXBUF];
     99 	int     rfhead, rftail, rbhead, rbtail;
    100 
    101 	volatile struct ie_xmit_cmd *xmit_cmds[NTXBUF];
    102 	volatile struct ie_xmit_buf *xmit_buffs[NTXBUF];
    103 	u_char *xmit_cbuffs[NTXBUF];
    104 	int xmit_busy;
    105 	int xmit_free;
    106 	int xchead, xctail;
    107 
    108 	struct ie_en_addr mcast_addrs[MAXMCAST + 1];
    109 	int     mcast_count;
    110 
    111 	int nframes;      /* number of frames in use */
    112 	int nrxbuf;       /* number of recv buffs in use */
    113 
    114 #ifdef IEDEBUG
    115 	int     sc_debug;
    116 #endif
    117 };
    118 
    119 
    120 extern void    ie_attach __P((struct ie_softc *));
    121 extern int  ie_intr __P((void *));
    122