Home | History | Annotate | Line # | Download | only in dev
if_ievar.h revision 1.8 
      1 /*	$NetBSD: if_ievar.h,v 1.8 1997/02/13 20:43:18 gwr Exp $	*/
      2 
      3 /*
      4  * Machine-dependent glue for the Intel Ethernet (ie) driver.
      5  */
      6 
      7 #define	MXFRAMES	128	/* max number of frames to allow for receive */
      8 #define	MXRXBUF 	192	/* max number of buffers to allocate */
      9 #define	IE_RBUF_SIZE	256	/* size of each buffer, MUST BE POWER OF TWO */
     10 #define	NTXBUF		2	/* number of transmit buffer/command pairs */
     11 #define	IE_TBUF_SIZE	(3*512)	/* length of transmit buffer */
     12 
     13 enum ie_hardware {
     14 	IE_VME,			/* multibus to VME ie card */
     15 	IE_OBIO,		/* on board */
     16 	IE_VME3E,		/* sun 3e VME card */
     17 	IE_UNKNOWN
     18 };
     19 
     20 /*
     21  * Ethernet status, per interface.
     22  *
     23  * hardware addresses/sizes to know (all KVA):
     24  *   sc_iobase = base of chip's 24 bit address space
     25  *   sc_maddr  = base address of chip RAM as stored in ie_base of iscp
     26  *   sc_msize  = size of chip's RAM
     27  *   sc_reg    = address of card dependent registers
     28  *
     29  * the chip uses two types of pointers: 16 bit and 24 bit
     30  *   16 bit pointers are offsets from sc_maddr/ie_base
     31  *      KVA(16 bit offset) = offset + sc_maddr
     32  *   24 bit pointers are offset from sc_iobase in KVA
     33  *      KVA(24 bit address) = address + sc_iobase
     34  *
     35  * on the vme/multibus we have the page map to control where ram appears
     36  * in the address space.   we choose to have RAM start at 0 in the
     37  * 24 bit address space.   this means that sc_iobase == sc_maddr!
     38  * to get the phyiscal address of the board's RAM you must take the
     39  * top 12 bits of the physical address of the register address
     40  * and or in the 4 bits from the status word as bits 17-20 (remember that
     41  * the board ignores the chip's top 4 address lines).
     42  * For example:
     43  *   if the register is @ 0xffe88000, then the top 12 bits are 0xffe00000.
     44  *   to get the 4 bits from the the status word just do status & IEVME_HADDR.
     45  *   suppose the value is "4".   Then just shift it left 16 bits to get
     46  *   it into bits 17-20 (e.g. 0x40000).    Then or it to get the
     47  *   address of RAM (in our example: 0xffe40000).   see the attach routine!
     48  *
     49  * In the onboard ie interface, the 24 bit address space is hardwired
     50  * to be 0xff000000 -> 0xffffffff of KVA.   this means that sc_iobase
     51  * will be 0xff000000.   sc_maddr will be where ever we allocate RAM
     52  * in KVA.    note that since the SCP is at a fixed address it means
     53  * that we have to use some memory at a fixed KVA for the SCP.
     54  * The Sun PROM leaves a page for us at the end of KVA space.
     55  */
     56 struct ie_softc {
     57 	struct device sc_dev;	/* device structure */
     58 
     59 	struct arpcom sc_arpcom;/* system arpcom structure */
     60 #define	sc_if	sc_arpcom.ac_if 		/* network-visible interface */
     61 #define	sc_addr	sc_arpcom.ac_enaddr		/* hardware Ethernet address */
     62 
     63 	int     sc_debug;	/* See IEDEBUG */
     64 
     65 	/* card dependent functions: */
     66 	void    (*reset_586) __P((struct ie_softc *));
     67 	void    (*chan_attn) __P((struct ie_softc *));
     68 	void    (*run_586)   __P((struct ie_softc *));
     69 	void (*sc_bcopy) __P((const void *, void *, u_int));
     70 	void (*sc_bzero) __P((void *, u_int));
     71 
     72 	caddr_t sc_iobase;	/* KVA of base of 24bit addr space */
     73 	caddr_t sc_maddr;	/* KVA of base of chip's RAM */
     74 	u_int   sc_msize;	/* how much RAM we have/use */
     75 	caddr_t sc_reg;		/* KVA of card's register */
     76 
     77 	enum ie_hardware hard_type;	/* card type */
     78 
     79 	int     want_mcsetup;	/* flag for multicast setup */
     80 	int     promisc;	/* are we in promisc mode? */
     81 
     82 	int ntxbuf;       /* number of tx frames/buffers */
     83 	int nframes;      /* number of recv frames in use */
     84 	int nrxbuf;       /* number of recv buffs in use */
     85 
     86 	/*
     87 	 * pointers to the 3 major control structures
     88 	 */
     89 	volatile struct ie_sys_conf_ptr *scp;
     90 	volatile struct ie_int_sys_conf_ptr *iscp;
     91 	volatile struct ie_sys_ctl_block *scb;
     92 
     93 	/*
     94 	 * pointer and size of a block of KVA where the buffers
     95 	 * are to be allocated from
     96 	 */
     97 	char * buf_area;
     98 	int     buf_area_sz;
     99 
    100 	/*
    101 	 * Transmit commands, descriptors, and buffers
    102 	 */
    103 	volatile struct ie_xmit_cmd *xmit_cmds[NTXBUF];
    104 	volatile struct ie_xmit_buf *xmit_buffs[NTXBUF];
    105 	char *xmit_cbuffs[NTXBUF];
    106 	int xmit_busy;
    107 	int xmit_free;
    108 	int xchead, xctail;
    109 
    110 	/*
    111 	 * Receive frames, descriptors, and buffers
    112 	 */
    113 	volatile struct ie_recv_frame_desc *rframes[MXFRAMES];
    114 	volatile struct ie_recv_buf_desc *rbuffs[MXRXBUF];
    115 	char *cbuffs[MXRXBUF];
    116 	int     rfhead, rftail, rbhead, rbtail;
    117 
    118 	/* Multi-cast stuff */
    119 	int     mcast_count;
    120 	struct ie_en_addr mcast_addrs[MAXMCAST + 1];
    121 };
    122 
    123 
    124 extern void    ie_attach __P((struct ie_softc *));
    125 extern int  ie_intr __P((void *));
    126