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memerr.c revision 1.15
      1  1.15     lukem /*	$NetBSD: memerr.c,v 1.15 2003/07/15 03:36:15 lukem Exp $ */
      2   1.1       gwr 
      3   1.1       gwr /*
      4   1.1       gwr  * Copyright (c) 1992, 1993
      5   1.1       gwr  *	The Regents of the University of California.  All rights reserved.
      6   1.1       gwr  *
      7   1.1       gwr  * This software was developed by the Computer Systems Engineering group
      8   1.1       gwr  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9   1.1       gwr  * contributed to Berkeley.
     10   1.1       gwr  *
     11   1.1       gwr  * All advertising materials mentioning features or use of this software
     12   1.1       gwr  * must display the following acknowledgement:
     13   1.1       gwr  *	This product includes software developed by the University of
     14   1.1       gwr  *	California, Lawrence Berkeley Laboratory.
     15   1.1       gwr  *
     16   1.1       gwr  * Redistribution and use in source and binary forms, with or without
     17   1.1       gwr  * modification, are permitted provided that the following conditions
     18   1.1       gwr  * are met:
     19   1.1       gwr  * 1. Redistributions of source code must retain the above copyright
     20   1.1       gwr  *    notice, this list of conditions and the following disclaimer.
     21   1.1       gwr  * 2. Redistributions in binary form must reproduce the above copyright
     22   1.1       gwr  *    notice, this list of conditions and the following disclaimer in the
     23   1.1       gwr  *    documentation and/or other materials provided with the distribution.
     24   1.1       gwr  * 3. All advertising materials mentioning features or use of this software
     25   1.1       gwr  *    must display the following acknowledgement:
     26   1.1       gwr  *	This product includes software developed by the University of
     27   1.1       gwr  *	California, Berkeley and its contributors.
     28   1.1       gwr  * 4. Neither the name of the University nor the names of its contributors
     29   1.1       gwr  *    may be used to endorse or promote products derived from this software
     30   1.1       gwr  *    without specific prior written permission.
     31   1.1       gwr  *
     32   1.1       gwr  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     33   1.1       gwr  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     34   1.1       gwr  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     35   1.1       gwr  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     36   1.1       gwr  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     37   1.1       gwr  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     38   1.1       gwr  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     39   1.1       gwr  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     40   1.1       gwr  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     41   1.1       gwr  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     42   1.1       gwr  * SUCH DAMAGE.
     43   1.1       gwr  *
     44   1.1       gwr  *	@(#)memreg.c	8.1 (Berkeley) 6/11/93
     45   1.1       gwr  */
     46  1.15     lukem 
     47  1.15     lukem #include <sys/cdefs.h>
     48  1.15     lukem __KERNEL_RCSID(0, "$NetBSD: memerr.c,v 1.15 2003/07/15 03:36:15 lukem Exp $");
     49   1.1       gwr 
     50   1.1       gwr #include <sys/param.h>
     51   1.1       gwr #include <sys/systm.h>
     52   1.1       gwr #include <sys/device.h>
     53   1.1       gwr 
     54   1.1       gwr #include <machine/autoconf.h>
     55   1.1       gwr #include <machine/cpu.h>
     56   1.7       gwr #include <machine/idprom.h>
     57   1.1       gwr #include <machine/pte.h>
     58   1.1       gwr 
     59  1.10       gwr #include <sun3/sun3/machdep.h>
     60   1.1       gwr #include <sun3/dev/memerr.h>
     61   1.1       gwr /* #include <sun3/dev/eccreg.h> - not yet */
     62   1.1       gwr 
     63   1.1       gwr #define	ME_PRI	7	/* Interrupt level (NMI) */
     64   1.1       gwr 
     65   1.1       gwr extern unsigned char cpu_machine_id;
     66   1.1       gwr 
     67   1.1       gwr enum memerr_type { ME_PAR = 0, ME_ECC = 1 };
     68   1.1       gwr 
     69   1.1       gwr struct memerr_softc {
     70   1.1       gwr 	struct device sc_dev;
     71   1.1       gwr 	struct memerr *sc_reg;
     72   1.1       gwr 	enum memerr_type sc_type;
     73   1.1       gwr 	char *sc_typename;	/* "Parity" or "ECC" */
     74   1.1       gwr 	char *sc_csrbits;	/* how to print csr bits */
     75   1.1       gwr 	/* XXX: counters? */
     76   1.1       gwr };
     77   1.1       gwr 
     78   1.7       gwr static int  memerr_match __P((struct device *, struct cfdata *, void *));
     79   1.1       gwr static void memerr_attach __P((struct device *, struct device *, void *));
     80   1.1       gwr static int  memerr_interrupt __P((void *));
     81   1.1       gwr static void memerr_correctable __P((struct memerr_softc *));
     82   1.1       gwr 
     83  1.13   thorpej CFATTACH_DECL(memerr, sizeof(struct memerr_softc),
     84  1.14   thorpej     memerr_match, memerr_attach, NULL, NULL);
     85   1.1       gwr 
     86  1.11       chs int memerr_attached;
     87  1.11       chs 
     88   1.1       gwr static int
     89   1.7       gwr memerr_match(parent, cf, args)
     90  1.11       chs 	struct device *parent;
     91  1.11       chs 	struct cfdata *cf;
     92  1.11       chs 	void *args;
     93   1.1       gwr {
     94   1.1       gwr 	struct confargs *ca = args;
     95   1.1       gwr 
     96  1.11       chs 	/* This driver only supports one instance. */
     97  1.11       chs 	if (memerr_attached)
     98   1.1       gwr 		return (0);
     99   1.1       gwr 
    100   1.8       gwr 	/* Make sure there is something there... */
    101   1.5       gwr 	if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
    102   1.1       gwr 		return (0);
    103   1.1       gwr 
    104   1.5       gwr 	/* Default interrupt priority. */
    105   1.5       gwr 	if (ca->ca_intpri == -1)
    106   1.5       gwr 		ca->ca_intpri = ME_PRI;
    107   1.5       gwr 
    108   1.5       gwr 	return (1);
    109   1.1       gwr }
    110   1.1       gwr 
    111   1.1       gwr static void
    112   1.1       gwr memerr_attach(parent, self, args)
    113   1.1       gwr 	struct device *parent;
    114   1.1       gwr 	struct device *self;
    115   1.1       gwr 	void *args;
    116   1.1       gwr {
    117   1.1       gwr 	struct memerr_softc *sc = (void *)self;
    118   1.1       gwr 	struct confargs *ca = args;
    119   1.1       gwr 	struct memerr *mer;
    120   1.1       gwr 
    121   1.1       gwr 	/*
    122   1.1       gwr 	 * Which type of memory subsystem do we have?
    123   1.1       gwr 	 */
    124   1.1       gwr 	switch (cpu_machine_id) {
    125   1.1       gwr 	case SUN3_MACH_160:		/* XXX: correct? */
    126   1.1       gwr 	case SUN3_MACH_260:
    127  1.10       gwr 	case SUN3X_MACH_470:
    128   1.1       gwr 		sc->sc_type = ME_ECC;
    129   1.1       gwr 		sc->sc_typename = "ECC";
    130   1.1       gwr 		sc->sc_csrbits = ME_ECC_STR;
    131   1.1       gwr 		break;
    132   1.1       gwr 
    133   1.1       gwr 	default:
    134   1.1       gwr 		sc->sc_type = ME_PAR;
    135   1.1       gwr 		sc->sc_typename = "Parity";
    136   1.1       gwr 		sc->sc_csrbits = ME_PAR_STR;
    137   1.1       gwr 		break;
    138   1.1       gwr 	}
    139   1.5       gwr 	printf(": (%s memory)\n", sc->sc_typename);
    140   1.1       gwr 
    141  1.10       gwr 	mer = bus_mapin(ca->ca_bustype, ca->ca_paddr, sizeof(*mer));
    142   1.5       gwr 	if (mer == NULL)
    143   1.5       gwr 		panic("memerr: can not map register");
    144   1.5       gwr 	sc->sc_reg = mer;
    145   1.1       gwr 
    146   1.1       gwr 	/* Install interrupt handler. */
    147  1.11       chs 	isr_add_autovect(memerr_interrupt, sc, ca->ca_intpri);
    148   1.1       gwr 
    149   1.1       gwr 	/* Enable error interrupt (and checking). */
    150   1.1       gwr 	if (sc->sc_type == ME_PAR)
    151   1.1       gwr 		mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK;
    152   1.1       gwr 	else {
    153   1.1       gwr 		/*
    154   1.1       gwr 		 * XXX:  Some day, figure out how to decode
    155   1.1       gwr 		 * correctable errors and set ME_ECC_CE_ENA
    156   1.1       gwr 		 * here so we can log them...
    157   1.1       gwr 		 */
    158   1.2       gwr 		mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */
    159   1.1       gwr 	}
    160  1.11       chs 	memerr_attached = 1;
    161   1.1       gwr }
    162   1.1       gwr 
    163   1.1       gwr /*****************************************************************
    164   1.1       gwr  * Functions for ECC memory
    165   1.1       gwr  *****************************************************************/
    166   1.1       gwr 
    167   1.1       gwr static int
    168   1.1       gwr memerr_interrupt(arg)
    169   1.1       gwr 	void *arg;
    170   1.1       gwr {
    171   1.1       gwr 	struct memerr_softc *sc = arg;
    172   1.1       gwr 	volatile struct memerr *me = sc->sc_reg;
    173   1.7       gwr 	u_char csr, ctx;
    174   1.1       gwr 	u_int pa, va;
    175   1.1       gwr 	int pte;
    176   1.6   thorpej 	char bits[64];
    177   1.1       gwr 
    178   1.1       gwr 	csr = me->me_csr;
    179   1.1       gwr 	if ((csr & ME_CSR_IPEND) == 0)
    180   1.1       gwr 		return (0);
    181   1.1       gwr 
    182   1.1       gwr 	va = me->me_vaddr;
    183   1.1       gwr  	ctx = (va >> 28) & 0xF;
    184   1.1       gwr 	va &= 0x0FFFffff;
    185   1.1       gwr 	pte = get_pte(va);
    186   1.1       gwr 	pa = PG_PA(pte);
    187   1.1       gwr 
    188   1.4  christos 	printf("\nMemory error on %s cycle!\n",
    189   1.1       gwr 		(ctx & 8) ? "DVMA" : "CPU");
    190   1.4  christos 	printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n",
    191   1.1       gwr 		   (ctx & 7), va, pa);
    192   1.6   thorpej 	printf(" csr=%s\n", bitmask_snprintf(csr, sc->sc_csrbits,
    193   1.6   thorpej 	    bits, sizeof(bits)));
    194   1.1       gwr 
    195   1.2       gwr 	/*
    196   1.2       gwr 	 * If we have parity-checked memory, there is
    197   1.2       gwr 	 * not much to be done.  Any error is fatal.
    198   1.2       gwr 	 */
    199   1.1       gwr 	if (sc->sc_type == ME_PAR) {
    200   1.2       gwr 		if (csr & ME_PAR_EMASK) {
    201   1.2       gwr 			/* Parity errors are fatal. */
    202   1.2       gwr 			goto die;
    203   1.2       gwr 		}
    204   1.2       gwr 		/* The IPEND bit was set, but no error bits. */
    205   1.2       gwr 		goto noerror;
    206   1.1       gwr 	}
    207   1.1       gwr 
    208   1.1       gwr 	/*
    209   1.1       gwr 	 * We have ECC memory.  More complicated...
    210   1.1       gwr 	 */
    211   1.1       gwr 	if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) {
    212   1.4  christos 		printf(" write-back failed, pte=0x%x\n", pte);
    213   1.1       gwr 		goto die;
    214   1.1       gwr 	}
    215   1.1       gwr 	if (csr & ME_ECC_UE) {
    216   1.4  christos 		printf(" uncorrectable ECC error\n");
    217   1.1       gwr 		goto die;
    218   1.1       gwr 	}
    219   1.2       gwr 	if (csr & ME_ECC_CE) {
    220   1.2       gwr 		/* Just log this and continue. */
    221   1.1       gwr 		memerr_correctable(sc);
    222   1.2       gwr 		goto recover;
    223   1.2       gwr 	}
    224   1.2       gwr 	/* The IPEND bit was set, but no error bits. */
    225   1.2       gwr 	goto noerror;
    226   1.1       gwr 
    227   1.1       gwr die:
    228   1.1       gwr 	panic("all bets are off...");
    229   1.1       gwr 
    230   1.1       gwr noerror:
    231   1.4  christos 	printf("memerr: no error bits set?\n");
    232   1.1       gwr 
    233   1.1       gwr recover:
    234   1.1       gwr 	/* Clear the error by writing the address register. */
    235   1.1       gwr 	me->me_vaddr = 0;
    236   1.1       gwr 	return (1);
    237   1.1       gwr }
    238   1.1       gwr 
    239   1.1       gwr /*
    240   1.1       gwr  * Announce (and log) a correctable ECC error.
    241   1.1       gwr  * Need to look at the ECC syndrome register on
    242   1.1       gwr  * the memory board that caused the error...
    243   1.1       gwr  */
    244   1.1       gwr void
    245   1.1       gwr memerr_correctable(sc)
    246   1.1       gwr 	struct memerr_softc *sc;
    247   1.1       gwr {
    248   1.1       gwr 	/* XXX: Not yet... */
    249   1.1       gwr }
    250