Home | History | Annotate | Line # | Download | only in dev
memerr.c revision 1.11
      1 /*	$NetBSD: memerr.c,v 1.11 2001/05/27 06:30:27 chs Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. All advertising materials mentioning features or use of this software
     25  *    must display the following acknowledgement:
     26  *	This product includes software developed by the University of
     27  *	California, Berkeley and its contributors.
     28  * 4. Neither the name of the University nor the names of its contributors
     29  *    may be used to endorse or promote products derived from this software
     30  *    without specific prior written permission.
     31  *
     32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     42  * SUCH DAMAGE.
     43  *
     44  *	@(#)memreg.c	8.1 (Berkeley) 6/11/93
     45  */
     46 
     47 #include <sys/param.h>
     48 #include <sys/systm.h>
     49 #include <sys/device.h>
     50 
     51 #include <machine/autoconf.h>
     52 #include <machine/cpu.h>
     53 #include <machine/idprom.h>
     54 #include <machine/pte.h>
     55 
     56 #include <sun3/sun3/machdep.h>
     57 #include <sun3/dev/memerr.h>
     58 /* #include <sun3/dev/eccreg.h> - not yet */
     59 
     60 #define	ME_PRI	7	/* Interrupt level (NMI) */
     61 
     62 extern unsigned char cpu_machine_id;
     63 
     64 enum memerr_type { ME_PAR = 0, ME_ECC = 1 };
     65 
     66 struct memerr_softc {
     67 	struct device sc_dev;
     68 	struct memerr *sc_reg;
     69 	enum memerr_type sc_type;
     70 	char *sc_typename;	/* "Parity" or "ECC" */
     71 	char *sc_csrbits;	/* how to print csr bits */
     72 	/* XXX: counters? */
     73 };
     74 
     75 static int  memerr_match __P((struct device *, struct cfdata *, void *));
     76 static void memerr_attach __P((struct device *, struct device *, void *));
     77 static int  memerr_interrupt __P((void *));
     78 static void memerr_correctable __P((struct memerr_softc *));
     79 
     80 struct cfattach memerr_ca = {
     81 	sizeof(struct memerr_softc), memerr_match, memerr_attach
     82 };
     83 
     84 int memerr_attached;
     85 
     86 static int
     87 memerr_match(parent, cf, args)
     88 	struct device *parent;
     89 	struct cfdata *cf;
     90 	void *args;
     91 {
     92 	struct confargs *ca = args;
     93 
     94 	/* This driver only supports one instance. */
     95 	if (memerr_attached)
     96 		return (0);
     97 
     98 	/* Make sure there is something there... */
     99 	if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
    100 		return (0);
    101 
    102 	/* Default interrupt priority. */
    103 	if (ca->ca_intpri == -1)
    104 		ca->ca_intpri = ME_PRI;
    105 
    106 	return (1);
    107 }
    108 
    109 static void
    110 memerr_attach(parent, self, args)
    111 	struct device *parent;
    112 	struct device *self;
    113 	void *args;
    114 {
    115 	struct memerr_softc *sc = (void *)self;
    116 	struct confargs *ca = args;
    117 	struct memerr *mer;
    118 
    119 	/*
    120 	 * Which type of memory subsystem do we have?
    121 	 */
    122 	switch (cpu_machine_id) {
    123 	case SUN3_MACH_160:		/* XXX: correct? */
    124 	case SUN3_MACH_260:
    125 	case SUN3X_MACH_470:
    126 		sc->sc_type = ME_ECC;
    127 		sc->sc_typename = "ECC";
    128 		sc->sc_csrbits = ME_ECC_STR;
    129 		break;
    130 
    131 	default:
    132 		sc->sc_type = ME_PAR;
    133 		sc->sc_typename = "Parity";
    134 		sc->sc_csrbits = ME_PAR_STR;
    135 		break;
    136 	}
    137 	printf(": (%s memory)\n", sc->sc_typename);
    138 
    139 	mer = bus_mapin(ca->ca_bustype, ca->ca_paddr, sizeof(*mer));
    140 	if (mer == NULL)
    141 		panic("memerr: can not map register");
    142 	sc->sc_reg = mer;
    143 
    144 	/* Install interrupt handler. */
    145 	isr_add_autovect(memerr_interrupt, sc, ca->ca_intpri);
    146 
    147 	/* Enable error interrupt (and checking). */
    148 	if (sc->sc_type == ME_PAR)
    149 		mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK;
    150 	else {
    151 		/*
    152 		 * XXX:  Some day, figure out how to decode
    153 		 * correctable errors and set ME_ECC_CE_ENA
    154 		 * here so we can log them...
    155 		 */
    156 		mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */
    157 	}
    158 	memerr_attached = 1;
    159 }
    160 
    161 /*****************************************************************
    162  * Functions for ECC memory
    163  *****************************************************************/
    164 
    165 static int
    166 memerr_interrupt(arg)
    167 	void *arg;
    168 {
    169 	struct memerr_softc *sc = arg;
    170 	volatile struct memerr *me = sc->sc_reg;
    171 	u_char csr, ctx;
    172 	u_int pa, va;
    173 	int pte;
    174 	char bits[64];
    175 
    176 	csr = me->me_csr;
    177 	if ((csr & ME_CSR_IPEND) == 0)
    178 		return (0);
    179 
    180 	va = me->me_vaddr;
    181  	ctx = (va >> 28) & 0xF;
    182 	va &= 0x0FFFffff;
    183 	pte = get_pte(va);
    184 	pa = PG_PA(pte);
    185 
    186 	printf("\nMemory error on %s cycle!\n",
    187 		(ctx & 8) ? "DVMA" : "CPU");
    188 	printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n",
    189 		   (ctx & 7), va, pa);
    190 	printf(" csr=%s\n", bitmask_snprintf(csr, sc->sc_csrbits,
    191 	    bits, sizeof(bits)));
    192 
    193 	/*
    194 	 * If we have parity-checked memory, there is
    195 	 * not much to be done.  Any error is fatal.
    196 	 */
    197 	if (sc->sc_type == ME_PAR) {
    198 		if (csr & ME_PAR_EMASK) {
    199 			/* Parity errors are fatal. */
    200 			goto die;
    201 		}
    202 		/* The IPEND bit was set, but no error bits. */
    203 		goto noerror;
    204 	}
    205 
    206 	/*
    207 	 * We have ECC memory.  More complicated...
    208 	 */
    209 	if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) {
    210 		printf(" write-back failed, pte=0x%x\n", pte);
    211 		goto die;
    212 	}
    213 	if (csr & ME_ECC_UE) {
    214 		printf(" uncorrectable ECC error\n");
    215 		goto die;
    216 	}
    217 	if (csr & ME_ECC_CE) {
    218 		/* Just log this and continue. */
    219 		memerr_correctable(sc);
    220 		goto recover;
    221 	}
    222 	/* The IPEND bit was set, but no error bits. */
    223 	goto noerror;
    224 
    225 die:
    226 	panic("all bets are off...");
    227 
    228 noerror:
    229 	printf("memerr: no error bits set?\n");
    230 
    231 recover:
    232 	/* Clear the error by writing the address register. */
    233 	me->me_vaddr = 0;
    234 	return (1);
    235 }
    236 
    237 /*
    238  * Announce (and log) a correctable ECC error.
    239  * Need to look at the ECC syndrome register on
    240  * the memory board that caused the error...
    241  */
    242 void
    243 memerr_correctable(sc)
    244 	struct memerr_softc *sc;
    245 {
    246 	/* XXX: Not yet... */
    247 }
    248