si.c revision 1.15 1 1.15 gwr /* $NetBSD: si.c,v 1.15 1995/03/26 19:23:12 gwr Exp $ */
2 1.8 cgd
3 1.1 glass /*
4 1.2 gwr * Copyright (C) 1994 Adam Glass, Gordon W. Ross
5 1.1 glass * Copyright (C) 1993 Allen K. Briggs, Chris P. Caputo,
6 1.1 glass * Michael L. Finch, Bradley A. Grantham, and
7 1.1 glass * Lawrence A. Kesteloot
8 1.1 glass * All rights reserved.
9 1.1 glass *
10 1.1 glass * Redistribution and use in source and binary forms, with or without
11 1.1 glass * modification, are permitted provided that the following conditions
12 1.1 glass * are met:
13 1.1 glass * 1. Redistributions of source code must retain the above copyright
14 1.1 glass * notice, this list of conditions and the following disclaimer.
15 1.1 glass * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 glass * notice, this list of conditions and the following disclaimer in the
17 1.1 glass * documentation and/or other materials provided with the distribution.
18 1.1 glass * 3. All advertising materials mentioning features or use of this software
19 1.1 glass * must display the following acknowledgement:
20 1.1 glass * This product includes software developed by the Alice Group.
21 1.1 glass * 4. The names of the Alice Group or any of its members may not be used
22 1.1 glass * to endorse or promote products derived from this software without
23 1.1 glass * specific prior written permission.
24 1.1 glass *
25 1.1 glass * THIS SOFTWARE IS PROVIDED BY THE ALICE GROUP ``AS IS'' AND ANY EXPRESS OR
26 1.1 glass * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.1 glass * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.1 glass * IN NO EVENT SHALL THE ALICE GROUP BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.1 glass * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.1 glass * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.1 glass * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.1 glass * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.1 glass * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 1.1 glass * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.1 glass */
36 1.1 glass
37 1.14 gwr #define DEBUG 1
38 1.2 gwr
39 1.2 gwr /* XXX - Need to add support for real DMA. -gwr */
40 1.2 gwr /* #define PSEUDO_DMA 1 (broken) */
41 1.1 glass
42 1.1 glass #include <sys/types.h>
43 1.1 glass #include <sys/malloc.h>
44 1.1 glass #include <sys/param.h>
45 1.1 glass #include <sys/systm.h>
46 1.1 glass #include <sys/errno.h>
47 1.1 glass #include <sys/buf.h>
48 1.1 glass #include <sys/proc.h>
49 1.1 glass #include <sys/user.h>
50 1.1 glass #include <sys/device.h>
51 1.1 glass
52 1.1 glass #include <machine/autoconf.h>
53 1.1 glass #include <machine/isr.h>
54 1.1 glass #include <machine/obio.h>
55 1.1 glass
56 1.2 gwr #include <scsi/scsi_all.h>
57 1.2 gwr #include <scsi/scsi_debug.h>
58 1.2 gwr #include <scsi/scsiconf.h>
59 1.2 gwr
60 1.1 glass #include "scsi_defs.h"
61 1.1 glass #include "scsi_5380.h"
62 1.14 gwr #include "scsi_sunsi.h"
63 1.14 gwr
64 1.14 gwr #ifdef DEBUG
65 1.14 gwr static int si_debug = 0;
66 1.14 gwr static int si_flags = 0 /* | SDEV_DB2 */ ;
67 1.14 gwr #endif
68 1.1 glass
69 1.1 glass #define SCI_PHASE_DISC 0 /* sort of ... */
70 1.10 gwr #define SCI_CLR_INTR(regs) ((volatile)(regs->sci_iack))
71 1.1 glass #define SCI_ACK(ptr,phase) (ptr)->sci_tcmd = (phase)
72 1.1 glass #define SCSI_TIMEOUT_VAL 10000000
73 1.1 glass #define WAIT_FOR_NOT_REQ(ptr) { \
74 1.1 glass int scsi_timeout = SCSI_TIMEOUT_VAL; \
75 1.1 glass while ( ((ptr)->sci_bus_csr & SCI_BUS_REQ) && \
76 1.1 glass ((ptr)->sci_bus_csr & SCI_BUS_REQ) && \
77 1.1 glass ((ptr)->sci_bus_csr & SCI_BUS_REQ) && \
78 1.1 glass (--scsi_timeout) ); \
79 1.1 glass if (!scsi_timeout) { \
80 1.2 gwr printf("scsi timeout--WAIT_FOR_NOT_REQ---%s, line %d.\n", \
81 1.2 gwr __FILE__, __LINE__); \
82 1.1 glass goto scsi_timeout_error; \
83 1.1 glass } \
84 1.1 glass }
85 1.1 glass #define WAIT_FOR_REQ(ptr) { \
86 1.1 glass int scsi_timeout = SCSI_TIMEOUT_VAL; \
87 1.1 glass while ( (((ptr)->sci_bus_csr & SCI_BUS_REQ) == 0) && \
88 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_REQ) == 0) && \
89 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_REQ) == 0) && \
90 1.1 glass (--scsi_timeout) ); \
91 1.1 glass if (!scsi_timeout) { \
92 1.2 gwr printf("scsi timeout--WAIT_FOR_REQ---%s, line %d.\n", \
93 1.2 gwr __FILE__, __LINE__); \
94 1.1 glass goto scsi_timeout_error; \
95 1.1 glass } \
96 1.1 glass }
97 1.1 glass #define WAIT_FOR_BSY(ptr) { \
98 1.1 glass int scsi_timeout = SCSI_TIMEOUT_VAL; \
99 1.1 glass while ( (((ptr)->sci_bus_csr & SCI_BUS_BSY) == 0) && \
100 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_BSY) == 0) && \
101 1.1 glass (((ptr)->sci_bus_csr & SCI_BUS_BSY) == 0) && \
102 1.1 glass (--scsi_timeout) ); \
103 1.1 glass if (!scsi_timeout) { \
104 1.2 gwr printf("scsi timeout--WAIT_FOR_BSY---%s, line %d.\n", \
105 1.2 gwr __FILE__, __LINE__); \
106 1.1 glass goto scsi_timeout_error; \
107 1.1 glass } \
108 1.1 glass }
109 1.1 glass
110 1.14 gwr #define ARBITRATION_RETRIES 1000
111 1.14 gwr
112 1.1 glass #ifdef DDB
113 1.1 glass int Debugger();
114 1.1 glass #else
115 1.2 gwr #define Debugger() panic("Should call Debugger here %s:%d", \
116 1.2 gwr __FILE__, __LINE__)
117 1.1 glass #endif
118 1.1 glass
119 1.1 glass struct ncr5380_softc {
120 1.1 glass struct device sc_dev;
121 1.10 gwr volatile void *sc_regs;
122 1.14 gwr int sc_adapter_type;
123 1.1 glass struct scsi_link sc_link;
124 1.1 glass };
125 1.1 glass
126 1.3 gwr static void ncr5380_minphys(struct buf *bp);
127 1.3 gwr static int ncr5380_scsi_cmd(struct scsi_xfer *xs);
128 1.14 gwr static int ncr5380_reset_adapter(struct ncr5380_softc *);
129 1.14 gwr static int ncr5380_reset_scsibus(struct ncr5380_softc *);
130 1.3 gwr static int ncr5380_poll(int adapter, int timeout);
131 1.3 gwr static int ncr5380_send_cmd(struct scsi_xfer *xs);
132 1.1 glass
133 1.14 gwr static int ncr_intr(void *);
134 1.1 glass
135 1.3 gwr static int si_generic(int adapter, int id, int lun,
136 1.1 glass struct scsi_generic *cmd, int cmdlen,
137 1.1 glass void *databuf, int datalen);
138 1.3 gwr static int si_group0(int adapter, int id, int lun,
139 1.1 glass int opcode, int addr, int len,
140 1.1 glass int flags, caddr_t databuf, int datalen);
141 1.1 glass
142 1.1 glass static char scsi_name[] = "si";
143 1.1 glass
144 1.1 glass struct scsi_adapter ncr5380_switch = {
145 1.1 glass ncr5380_scsi_cmd, /* scsi_cmd() */
146 1.1 glass ncr5380_minphys, /* scsi_minphys() */
147 1.12 gwr NULL, /* open_target_lu() */
148 1.12 gwr NULL, /* close_target_lu() */
149 1.1 glass };
150 1.1 glass
151 1.1 glass /* This is copied from julian's bt driver */
152 1.1 glass /* "so we have a default dev struct for our link struct." */
153 1.1 glass struct scsi_device ncr_dev = {
154 1.1 glass NULL, /* Use default error handler. */
155 1.2 gwr NULL, /* Use default start handler. */
156 1.2 gwr NULL, /* Use default async handler. */
157 1.1 glass NULL, /* Use default "done" routine. */
158 1.1 glass };
159 1.1 glass
160 1.3 gwr static int si_match();
161 1.3 gwr static void si_attach();
162 1.1 glass
163 1.2 gwr struct cfdriver sicd = {
164 1.2 gwr NULL, "si", si_match, si_attach, DV_DULL,
165 1.2 gwr sizeof(struct ncr5380_softc), NULL, 0,
166 1.2 gwr };
167 1.1 glass
168 1.3 gwr static int
169 1.2 gwr si_print(aux, name)
170 1.1 glass void *aux;
171 1.1 glass char *name;
172 1.1 glass {
173 1.1 glass }
174 1.1 glass
175 1.3 gwr static int
176 1.10 gwr si_match(parent, vcf, args)
177 1.1 glass struct device *parent;
178 1.10 gwr void *vcf, *args;
179 1.1 glass {
180 1.10 gwr struct cfdata *cf = vcf;
181 1.10 gwr struct confargs *ca = args;
182 1.10 gwr int x;
183 1.10 gwr
184 1.13 gwr /* Allow default address for OBIO only. */
185 1.13 gwr switch (ca->ca_bustype) {
186 1.13 gwr case BUS_OBIO:
187 1.13 gwr if (ca->ca_paddr == -1)
188 1.13 gwr ca->ca_paddr = OBIO_NCR_SCSI;
189 1.13 gwr break;
190 1.13 gwr case BUS_VME16:
191 1.13 gwr if (ca->ca_paddr == -1)
192 1.13 gwr return (0);
193 1.13 gwr break;
194 1.13 gwr default:
195 1.13 gwr return (0);
196 1.13 gwr }
197 1.13 gwr
198 1.13 gwr /* Default interrupt priority always splbio==2 */
199 1.10 gwr if (ca->ca_intpri == -1)
200 1.10 gwr ca->ca_intpri = 2;
201 1.1 glass
202 1.14 gwr x = bus_peek(ca->ca_bustype, ca->ca_paddr + 1, 1);
203 1.11 gwr return (x != -1);
204 1.1 glass }
205 1.1 glass
206 1.3 gwr static void
207 1.10 gwr si_attach(parent, self, args)
208 1.1 glass struct device *parent, *self;
209 1.10 gwr void *args;
210 1.1 glass {
211 1.10 gwr struct ncr5380_softc *ncr5380 = (struct ncr5380_softc *) self;
212 1.14 gwr volatile sci_regmap_t *regs;
213 1.10 gwr struct confargs *ca = args;
214 1.1 glass
215 1.12 gwr switch (ca->ca_bustype) {
216 1.10 gwr
217 1.12 gwr case BUS_OBIO:
218 1.12 gwr regs = (sci_regmap_t *)
219 1.12 gwr obio_alloc(ca->ca_paddr, sizeof(*regs));
220 1.14 gwr isr_add_autovect(ncr_intr, (void *)ncr5380,
221 1.12 gwr ca->ca_intpri);
222 1.12 gwr break;
223 1.12 gwr
224 1.12 gwr case BUS_VME16:
225 1.12 gwr regs = (sci_regmap_t *)
226 1.12 gwr bus_mapin(ca->ca_bustype, ca->ca_paddr, sizeof(*regs));
227 1.14 gwr isr_add_vectored(ncr_intr, (void *)ncr5380,
228 1.12 gwr ca->ca_intpri, ca->ca_intvec);
229 1.12 gwr break;
230 1.12 gwr
231 1.12 gwr default:
232 1.12 gwr printf("unknown\n");
233 1.12 gwr return;
234 1.12 gwr }
235 1.1 glass
236 1.14 gwr ncr5380->sc_adapter_type = ca->ca_bustype;
237 1.10 gwr ncr5380->sc_regs = regs;
238 1.12 gwr
239 1.12 gwr /*
240 1.12 gwr * fill in the prototype scsi_link.
241 1.12 gwr */
242 1.2 gwr ncr5380->sc_link.adapter_softc = ncr5380;
243 1.12 gwr ncr5380->sc_link.adapter_target = 7;
244 1.1 glass ncr5380->sc_link.adapter = &ncr5380_switch;
245 1.1 glass ncr5380->sc_link.device = &ncr_dev;
246 1.14 gwr ncr5380->sc_link.openings = 2;
247 1.13 gwr #ifdef DEBUG
248 1.14 gwr ncr5380->sc_link.flags |= si_flags;
249 1.13 gwr #endif
250 1.1 glass
251 1.12 gwr printf("\n");
252 1.14 gwr ncr5380_reset_adapter(ncr5380);
253 1.14 gwr ncr5380_reset_scsibus(ncr5380);
254 1.10 gwr config_found(self, &(ncr5380->sc_link), si_print);
255 1.1 glass }
256 1.1 glass
257 1.1 glass #define MIN_PHYS 65536 /*BARF!!!!*/
258 1.3 gwr static void
259 1.1 glass ncr5380_minphys(struct buf *bp)
260 1.1 glass {
261 1.1 glass if (bp->b_bcount > MIN_PHYS) {
262 1.1 glass printf("Uh-oh... ncr5380_minphys setting bp->b_bcount = %x.\n", MIN_PHYS);
263 1.1 glass bp->b_bcount = MIN_PHYS;
264 1.1 glass }
265 1.1 glass }
266 1.1 glass #undef MIN_PHYS
267 1.1 glass
268 1.5 gwr static int
269 1.1 glass ncr5380_scsi_cmd(struct scsi_xfer *xs)
270 1.1 glass {
271 1.1 glass int flags, s, r;
272 1.1 glass
273 1.1 glass flags = xs->flags;
274 1.1 glass if (xs->bp) flags |= (SCSI_NOSLEEP);
275 1.1 glass if ( flags & ITSDONE ) {
276 1.1 glass printf("Already done?");
277 1.1 glass xs->flags &= ~ITSDONE;
278 1.1 glass }
279 1.1 glass if ( ! ( flags & INUSE ) ) {
280 1.1 glass printf("Not in use?");
281 1.1 glass xs->flags |= INUSE;
282 1.1 glass }
283 1.1 glass
284 1.15 gwr s = splbio();
285 1.14 gwr
286 1.1 glass if ( flags & SCSI_RESET ) {
287 1.1 glass printf("flags & SCSIRESET.\n");
288 1.14 gwr ncr5380_reset_scsibus(xs->sc_link->adapter_softc);
289 1.14 gwr r = COMPLETE;
290 1.14 gwr } else {
291 1.14 gwr r = ncr5380_send_cmd(xs);
292 1.14 gwr xs->flags |= ITSDONE;
293 1.14 gwr scsi_done(xs);
294 1.1 glass }
295 1.14 gwr
296 1.15 gwr splx(s);
297 1.1 glass
298 1.1 glass switch(r) {
299 1.14 gwr case COMPLETE:
300 1.14 gwr case SUCCESSFULLY_QUEUED:
301 1.14 gwr r = SUCCESSFULLY_QUEUED;
302 1.14 gwr if (xs->flags & SCSI_POLL)
303 1.14 gwr r = COMPLETE;
304 1.14 gwr break;
305 1.14 gwr default:
306 1.14 gwr break;
307 1.1 glass }
308 1.1 glass return r;
309 1.1 glass }
310 1.1 glass
311 1.14 gwr #ifdef DEBUG
312 1.3 gwr static int
313 1.1 glass ncr5380_show_scsi_cmd(struct scsi_xfer *xs)
314 1.1 glass {
315 1.1 glass u_char *b = (u_char *) xs->cmd;
316 1.1 glass int i = 0;
317 1.1 glass
318 1.1 glass if ( ! ( xs->flags & SCSI_RESET ) ) {
319 1.1 glass printf("si(%d:%d:%d)-",
320 1.2 gwr xs->sc_link->scsibus,
321 1.2 gwr xs->sc_link->target,
322 1.2 gwr xs->sc_link->lun);
323 1.1 glass while (i < xs->cmdlen) {
324 1.1 glass if (i) printf(",");
325 1.1 glass printf("%x",b[i++]);
326 1.1 glass }
327 1.1 glass printf("-\n");
328 1.1 glass } else {
329 1.1 glass printf("si(%d:%d:%d)-RESET-\n",
330 1.2 gwr xs->sc_link->scsibus,
331 1.2 gwr xs->sc_link->target,
332 1.2 gwr xs->sc_link->lun);
333 1.1 glass }
334 1.1 glass }
335 1.14 gwr #endif
336 1.1 glass
337 1.1 glass /*
338 1.1 glass * Actual chip control.
339 1.1 glass */
340 1.1 glass
341 1.14 gwr static void
342 1.14 gwr ncr_sbc_intr(struct ncr5380_softc *ncr5380)
343 1.1 glass {
344 1.14 gwr volatile sci_regmap_t *regs = ncr5380->sc_regs;
345 1.1 glass
346 1.14 gwr if ((regs->sci_csr & SCI_CSR_INT) == 0) {
347 1.2 gwr #ifdef DEBUG
348 1.14 gwr printf (" ncr_sbc_intr: spurrious\n");
349 1.2 gwr #endif
350 1.14 gwr return;
351 1.10 gwr }
352 1.14 gwr
353 1.14 gwr SCI_CLR_INTR(regs);
354 1.14 gwr #ifdef DEBUG
355 1.14 gwr printf (" ncr_sbc_intr\n");
356 1.14 gwr #endif
357 1.1 glass }
358 1.1 glass
359 1.14 gwr static void
360 1.14 gwr ncr_dma_intr(struct ncr5380_softc *ncr5380)
361 1.1 glass {
362 1.14 gwr volatile struct si_regs *regs = ncr5380->sc_regs;
363 1.14 gwr
364 1.14 gwr #ifdef DEBUG
365 1.14 gwr printf (" ncr_dma_intr\n");
366 1.2 gwr #endif
367 1.1 glass }
368 1.1 glass
369 1.14 gwr static int
370 1.14 gwr ncr_intr(void *arg)
371 1.1 glass {
372 1.14 gwr struct ncr5380_softc *ncr5380 = arg;
373 1.14 gwr volatile struct si_regs *si = ncr5380->sc_regs;
374 1.14 gwr int rv = 0;
375 1.14 gwr
376 1.14 gwr /* Interrupts not enabled? Can not be for us. */
377 1.14 gwr if ((si->si_csr & SI_CSR_INTR_EN) == 0)
378 1.14 gwr return rv;
379 1.14 gwr
380 1.14 gwr if (si->si_csr & SI_CSR_DMA_IP) {
381 1.14 gwr ncr_dma_intr(ncr5380);
382 1.14 gwr rv++;
383 1.14 gwr }
384 1.14 gwr if (si->si_csr & SI_CSR_SBC_IP) {
385 1.14 gwr ncr_sbc_intr(ncr5380);
386 1.14 gwr rv++;
387 1.14 gwr }
388 1.14 gwr return rv;
389 1.14 gwr }
390 1.14 gwr
391 1.14 gwr static int
392 1.14 gwr ncr5380_reset_adapter(struct ncr5380_softc *ncr5380)
393 1.14 gwr {
394 1.14 gwr volatile struct si_regs *si = ncr5380->sc_regs;
395 1.14 gwr
396 1.14 gwr #ifdef DEBUG
397 1.14 gwr if (si_debug) {
398 1.14 gwr printf("si_reset_adapter\n");
399 1.14 gwr }
400 1.2 gwr #endif
401 1.14 gwr
402 1.14 gwr /* The reset bits are active low. */
403 1.14 gwr si->si_csr = 0;
404 1.14 gwr delay(100);
405 1.14 gwr si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES;
406 1.1 glass }
407 1.1 glass
408 1.3 gwr static int
409 1.14 gwr ncr5380_reset_scsibus(struct ncr5380_softc *ncr5380)
410 1.1 glass {
411 1.14 gwr volatile sci_regmap_t *regs = ncr5380->sc_regs;
412 1.14 gwr
413 1.14 gwr #ifdef DEBUG
414 1.14 gwr if (si_debug) {
415 1.14 gwr printf("si_reset_scsibus\n");
416 1.14 gwr }
417 1.14 gwr #endif
418 1.2 gwr
419 1.2 gwr regs->sci_icmd = SCI_ICMD_TEST;
420 1.2 gwr regs->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST;
421 1.2 gwr delay(2500);
422 1.2 gwr regs->sci_icmd = 0;
423 1.1 glass
424 1.2 gwr regs->sci_mode = 0;
425 1.2 gwr regs->sci_tcmd = SCI_PHASE_DISC;
426 1.2 gwr regs->sci_sel_enb = 0;
427 1.1 glass
428 1.2 gwr SCI_CLR_INTR(regs);
429 1.2 gwr SCI_CLR_INTR(regs);
430 1.1 glass }
431 1.1 glass
432 1.3 gwr static int
433 1.1 glass ncr5380_poll(int adapter, int timeout)
434 1.1 glass {
435 1.1 glass }
436 1.1 glass
437 1.3 gwr static int
438 1.1 glass ncr5380_send_cmd(struct scsi_xfer *xs)
439 1.1 glass {
440 1.1 glass int sense;
441 1.1 glass
442 1.14 gwr #ifdef DIAGNOSTIC
443 1.14 gwr if ((getsr() & PSL_IPL) < PSL_IPL2)
444 1.14 gwr panic("ncr_send_cmd: bad spl");
445 1.14 gwr #endif
446 1.14 gwr
447 1.14 gwr #ifdef DEBUG
448 1.14 gwr if (si_debug & 2)
449 1.14 gwr ncr5380_show_scsi_cmd(xs);
450 1.14 gwr #endif
451 1.14 gwr
452 1.2 gwr sense = si_generic( xs->sc_link->scsibus, xs->sc_link->target,
453 1.1 glass xs->sc_link->lun, xs->cmd, xs->cmdlen,
454 1.1 glass xs->data, xs->datalen );
455 1.14 gwr
456 1.13 gwr switch (sense) {
457 1.13 gwr case 0: /* success */
458 1.13 gwr xs->resid = 0;
459 1.13 gwr xs->error = XS_NOERROR;
460 1.13 gwr break;
461 1.13 gwr
462 1.13 gwr case 0x02: /* Check condition */
463 1.2 gwr #ifdef DEBUG
464 1.14 gwr if (si_debug)
465 1.14 gwr printf("check cond. target %d.\n",
466 1.14 gwr xs->sc_link->target);
467 1.2 gwr #endif
468 1.13 gwr delay(10); /* Phil's fix for slow devices. */
469 1.13 gwr si_group0(xs->sc_link->scsibus,
470 1.13 gwr xs->sc_link->target,
471 1.13 gwr xs->sc_link->lun,
472 1.13 gwr 0x3, 0x0,
473 1.13 gwr sizeof(struct scsi_sense_data),
474 1.13 gwr 0, (caddr_t) &(xs->sense),
475 1.13 gwr sizeof(struct scsi_sense_data));
476 1.13 gwr xs->error = XS_SENSE;
477 1.13 gwr break;
478 1.13 gwr case 0x08: /* Busy */
479 1.13 gwr xs->error = XS_BUSY;
480 1.13 gwr break;
481 1.13 gwr default:
482 1.13 gwr xs->error = XS_DRIVER_STUFFUP;
483 1.13 gwr break;
484 1.13 gwr
485 1.1 glass }
486 1.1 glass return (COMPLETE);
487 1.1 glass }
488 1.1 glass
489 1.3 gwr static int
490 1.2 gwr si_select_target(register volatile sci_regmap_t *regs,
491 1.1 glass u_char myid, u_char tid, int with_atn)
492 1.1 glass {
493 1.1 glass register u_char bid, icmd;
494 1.1 glass int ret = SCSI_RET_RETRY;
495 1.14 gwr int arb_retries, arb_wait;
496 1.1 glass
497 1.1 glass /* for our purposes.. */
498 1.1 glass myid = 1 << myid;
499 1.1 glass tid = 1 << tid;
500 1.1 glass
501 1.2 gwr regs->sci_sel_enb = 0; /* we don't want any interrupts. */
502 1.2 gwr regs->sci_tcmd = 0; /* get into a harmless state */
503 1.14 gwr
504 1.14 gwr arb_retries = ARBITRATION_RETRIES;
505 1.14 gwr
506 1.14 gwr retry_arbitration:
507 1.2 gwr regs->sci_mode = 0; /* get into a harmless state */
508 1.14 gwr if (--arb_retries <= 0) {
509 1.14 gwr #ifdef DEBUG
510 1.14 gwr if (si_debug) {
511 1.14 gwr printf("si_select: arb_retries expended\n");
512 1.14 gwr }
513 1.14 gwr #endif
514 1.14 gwr goto lost;
515 1.14 gwr }
516 1.14 gwr
517 1.14 gwr if ((regs->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) &&
518 1.14 gwr (regs->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) &&
519 1.14 gwr (regs->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)))
520 1.14 gwr {
521 1.14 gwr #ifdef DEBUG
522 1.14 gwr if (si_debug) {
523 1.14 gwr printf("si_select_target: still BSY|SEL\n");
524 1.14 gwr }
525 1.14 gwr #endif
526 1.14 gwr return ret;
527 1.14 gwr }
528 1.1 glass
529 1.1 glass regs->sci_odata = myid;
530 1.1 glass regs->sci_mode = SCI_MODE_ARB;
531 1.2 gwr /* regs->sci_mode |= SCI_MODE_ARB; XXX? */
532 1.14 gwr
533 1.1 glass /* AIP might not set if BSY went true after we checked */
534 1.14 gwr /* Wait up to about 100 usec. for it to appear. */
535 1.14 gwr arb_wait = 50; /* X2 */
536 1.14 gwr do {
537 1.1 glass if (regs->sci_icmd & SCI_ICMD_AIP)
538 1.1 glass break;
539 1.14 gwr delay2us();
540 1.14 gwr } while (--arb_wait > 0);
541 1.14 gwr if (arb_wait <= 0) {
542 1.14 gwr /* XXX - Could have missed it? */
543 1.14 gwr goto retry_arbitration;
544 1.14 gwr }
545 1.14 gwr #ifdef DEBUG
546 1.14 gwr if (si_debug) {
547 1.14 gwr printf("si_select_target: API after %d tries (last wait %d)\n",
548 1.14 gwr ARBITRATION_RETRIES - arb_retries,
549 1.14 gwr (50 - arb_wait));
550 1.1 glass }
551 1.14 gwr #endif
552 1.1 glass
553 1.14 gwr delay(3); /* 2.2 uSec. arbitration delay */
554 1.1 glass
555 1.1 glass if (regs->sci_icmd & SCI_ICMD_LST) {
556 1.2 gwr #ifdef DEBUG
557 1.14 gwr if (si_debug)
558 1.14 gwr printf ("lost 1\n");
559 1.2 gwr #endif
560 1.14 gwr goto retry_arbitration; /* XXX */
561 1.1 glass }
562 1.1 glass
563 1.1 glass regs->sci_mode &= ~SCI_MODE_PAR_CHK;
564 1.1 glass bid = regs->sci_data;
565 1.1 glass
566 1.1 glass if ((bid & ~myid) > myid) {
567 1.2 gwr #ifdef DEBUG
568 1.14 gwr if (si_debug)
569 1.14 gwr printf ("lost 2\n");
570 1.2 gwr #endif
571 1.14 gwr /* Trying again will not help. */
572 1.1 glass goto lost;
573 1.1 glass }
574 1.1 glass if (regs->sci_icmd & SCI_ICMD_LST) {
575 1.2 gwr #ifdef DEBUG
576 1.14 gwr if (si_debug)
577 1.14 gwr printf ("lost 3\n");
578 1.2 gwr #endif
579 1.1 glass goto lost;
580 1.1 glass }
581 1.1 glass
582 1.1 glass /* Won arbitration, enter selection phase now */
583 1.1 glass icmd = regs->sci_icmd & ~(SCI_ICMD_DIFF|SCI_ICMD_TEST);
584 1.1 glass icmd |= (with_atn ? (SCI_ICMD_SEL|SCI_ICMD_ATN) : SCI_ICMD_SEL);
585 1.1 glass regs->sci_icmd = icmd;
586 1.1 glass
587 1.1 glass if (regs->sci_icmd & SCI_ICMD_LST) {
588 1.2 gwr #ifdef DEBUG
589 1.14 gwr if (si_debug)
590 1.14 gwr printf ("nosel\n");
591 1.2 gwr #endif
592 1.1 glass goto nosel;
593 1.1 glass }
594 1.1 glass
595 1.1 glass /* XXX a target that violates specs might still drive the bus XXX */
596 1.1 glass /* XXX should put our id out, and after the delay check nothi XXX */
597 1.1 glass /* XXX ng else is out there. XXX */
598 1.1 glass
599 1.2 gwr delay2us();
600 1.1 glass
601 1.14 gwr regs->sci_sel_enb = 0;
602 1.14 gwr
603 1.1 glass regs->sci_odata = myid | tid;
604 1.14 gwr
605 1.14 gwr icmd |= SCI_ICMD_BSY|SCI_ICMD_DATA;
606 1.14 gwr regs->sci_icmd = icmd;
607 1.1 glass
608 1.1 glass /* regs->sci_mode &= ~SCI_MODE_ARB; 2 deskew delays, too */
609 1.1 glass regs->sci_mode = 0; /* 2 deskew delays, too */
610 1.1 glass
611 1.14 gwr icmd &= ~SCI_ICMD_BSY;
612 1.1 glass regs->sci_icmd = icmd;
613 1.1 glass
614 1.1 glass /* bus settle delay, 400ns */
615 1.2 gwr delay2us(); /* too much (was 2) ? */
616 1.1 glass
617 1.14 gwr regs->sci_mode |= SCI_MODE_PAR_CHK;
618 1.1 glass
619 1.1 glass {
620 1.1 glass register int timeo = 2500;/* 250 msecs in 100 usecs chunks */
621 1.1 glass while ((regs->sci_bus_csr & SCI_BUS_BSY) == 0) {
622 1.1 glass if (--timeo > 0) {
623 1.1 glass delay(100);
624 1.1 glass } else {
625 1.14 gwr /* This is the "normal" no-such-device select error. */
626 1.14 gwr #ifdef DEBUG
627 1.14 gwr if (si_debug)
628 1.14 gwr printf("si_select: did not see BSY\n");
629 1.14 gwr #endif
630 1.1 glass goto nodev;
631 1.1 glass }
632 1.1 glass }
633 1.1 glass }
634 1.1 glass
635 1.1 glass icmd &= ~(SCI_ICMD_DATA|SCI_ICMD_SEL);
636 1.1 glass regs->sci_icmd = icmd;
637 1.1 glass /* regs->sci_sel_enb = myid;*/ /* looks like we should NOT have it */
638 1.14 gwr /* XXX - SCI_MODE_PAR_CHK ? */
639 1.1 glass return SCSI_RET_SUCCESS;
640 1.14 gwr
641 1.1 glass nodev:
642 1.1 glass ret = SCSI_RET_DEVICE_DOWN;
643 1.1 glass regs->sci_sel_enb = myid;
644 1.1 glass nosel:
645 1.1 glass icmd &= ~(SCI_ICMD_DATA|SCI_ICMD_SEL|SCI_ICMD_ATN);
646 1.1 glass regs->sci_icmd = icmd;
647 1.14 gwr regs->sci_mode = 0;
648 1.14 gwr return ret;
649 1.14 gwr
650 1.1 glass lost:
651 1.14 gwr regs->sci_icmd = 0;
652 1.1 glass regs->sci_mode = 0;
653 1.14 gwr #ifdef DEBUG
654 1.14 gwr if (si_debug) {
655 1.14 gwr printf("si_select: lost arbitration\n");
656 1.14 gwr }
657 1.14 gwr #endif
658 1.1 glass return ret;
659 1.1 glass }
660 1.1 glass
661 1.1 glass sci_data_out(regs, phase, count, data)
662 1.2 gwr register volatile sci_regmap_t *regs;
663 1.1 glass unsigned char *data;
664 1.1 glass {
665 1.1 glass register unsigned char icmd;
666 1.1 glass register int cnt=0;
667 1.1 glass
668 1.1 glass /* ..checks.. */
669 1.1 glass
670 1.1 glass icmd = regs->sci_icmd & ~(SCI_ICMD_DIFF|SCI_ICMD_TEST);
671 1.1 glass loop:
672 1.1 glass if (SCI_CUR_PHASE(regs->sci_bus_csr) != phase)
673 1.1 glass return cnt;
674 1.1 glass
675 1.1 glass WAIT_FOR_REQ(regs);
676 1.1 glass icmd |= SCI_ICMD_DATA;
677 1.1 glass regs->sci_icmd = icmd;
678 1.1 glass regs->sci_odata = *data++;
679 1.1 glass icmd |= SCI_ICMD_ACK;
680 1.1 glass regs->sci_icmd = icmd;
681 1.1 glass
682 1.1 glass icmd &= ~(SCI_ICMD_DATA|SCI_ICMD_ACK);
683 1.1 glass WAIT_FOR_NOT_REQ(regs);
684 1.1 glass regs->sci_icmd = icmd;
685 1.1 glass ++cnt;
686 1.1 glass if (--count > 0)
687 1.1 glass goto loop;
688 1.1 glass scsi_timeout_error:
689 1.1 glass return cnt;
690 1.1 glass }
691 1.1 glass
692 1.1 glass sci_data_in(regs, phase, count, data)
693 1.2 gwr register volatile sci_regmap_t *regs;
694 1.1 glass unsigned char *data;
695 1.1 glass {
696 1.1 glass register unsigned char icmd;
697 1.1 glass register int cnt=0;
698 1.1 glass
699 1.1 glass /* ..checks.. */
700 1.1 glass
701 1.1 glass icmd = regs->sci_icmd & ~(SCI_ICMD_DIFF|SCI_ICMD_TEST);
702 1.1 glass
703 1.1 glass loop:
704 1.1 glass if (SCI_CUR_PHASE(regs->sci_bus_csr) != phase)
705 1.1 glass return cnt;
706 1.1 glass
707 1.1 glass WAIT_FOR_REQ(regs);
708 1.1 glass *data++ = regs->sci_data;
709 1.1 glass icmd |= SCI_ICMD_ACK;
710 1.1 glass regs->sci_icmd = icmd;
711 1.1 glass
712 1.1 glass icmd &= ~SCI_ICMD_ACK;
713 1.1 glass WAIT_FOR_NOT_REQ(regs);
714 1.1 glass regs->sci_icmd = icmd;
715 1.1 glass ++cnt;
716 1.1 glass if (--count > 0)
717 1.1 glass goto loop;
718 1.1 glass
719 1.1 glass scsi_timeout_error:
720 1.1 glass return cnt;
721 1.1 glass }
722 1.1 glass
723 1.3 gwr static int
724 1.2 gwr si_command_transfer(register volatile sci_regmap_t *regs,
725 1.1 glass int maxlen, u_char *data, u_char *status, u_char *msg)
726 1.1 glass {
727 1.1 glass int xfer=0, phase;
728 1.1 glass
729 1.1 glass /* printf("command_transfer called for 0x%x.\n", *data); */
730 1.1 glass
731 1.1 glass regs->sci_icmd = 0;
732 1.1 glass
733 1.1 glass while (1) {
734 1.1 glass
735 1.1 glass WAIT_FOR_REQ(regs);
736 1.1 glass
737 1.1 glass phase = SCI_CUR_PHASE(regs->sci_bus_csr);
738 1.1 glass
739 1.1 glass switch (phase) {
740 1.1 glass case SCSI_PHASE_CMD:
741 1.1 glass SCI_ACK(regs,SCSI_PHASE_CMD);
742 1.1 glass xfer += sci_data_out(regs, SCSI_PHASE_CMD,
743 1.1 glass maxlen, data);
744 1.1 glass return xfer;
745 1.1 glass case SCSI_PHASE_DATA_IN:
746 1.1 glass printf("Data in phase in command_transfer?\n");
747 1.1 glass return 0;
748 1.1 glass case SCSI_PHASE_DATA_OUT:
749 1.1 glass printf("Data out phase in command_transfer?\n");
750 1.1 glass return 0;
751 1.1 glass case SCSI_PHASE_STATUS:
752 1.1 glass SCI_ACK(regs,SCSI_PHASE_STATUS);
753 1.1 glass printf("status in command_transfer.\n");
754 1.1 glass sci_data_in(regs, SCSI_PHASE_STATUS,
755 1.1 glass 1, status);
756 1.1 glass break;
757 1.1 glass case SCSI_PHASE_MESSAGE_IN:
758 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_IN);
759 1.1 glass printf("msgin in command_transfer.\n");
760 1.1 glass sci_data_in(regs, SCSI_PHASE_MESSAGE_IN,
761 1.1 glass 1, msg);
762 1.1 glass break;
763 1.1 glass case SCSI_PHASE_MESSAGE_OUT:
764 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_OUT);
765 1.1 glass sci_data_out(regs, SCSI_PHASE_MESSAGE_OUT,
766 1.1 glass 1, msg);
767 1.1 glass break;
768 1.1 glass default:
769 1.1 glass printf("Unexpected phase 0x%x in "
770 1.1 glass "command_transfer().\n", phase);
771 1.1 glass scsi_timeout_error:
772 1.1 glass return xfer;
773 1.1 glass break;
774 1.1 glass }
775 1.1 glass }
776 1.1 glass }
777 1.1 glass
778 1.3 gwr static int
779 1.2 gwr si_data_transfer(register volatile sci_regmap_t *regs,
780 1.1 glass int maxlen, u_char *data, u_char *status, u_char *msg)
781 1.1 glass {
782 1.1 glass int retlen = 0, xfer, phase;
783 1.1 glass
784 1.1 glass regs->sci_icmd = 0;
785 1.1 glass
786 1.1 glass *status = 0;
787 1.1 glass
788 1.1 glass while (1) {
789 1.1 glass
790 1.1 glass WAIT_FOR_REQ(regs);
791 1.1 glass
792 1.1 glass phase = SCI_CUR_PHASE(regs->sci_bus_csr);
793 1.1 glass
794 1.1 glass switch (phase) {
795 1.1 glass case SCSI_PHASE_CMD:
796 1.1 glass printf("Command phase in data_transfer().\n");
797 1.1 glass return retlen;
798 1.1 glass case SCSI_PHASE_DATA_IN:
799 1.1 glass SCI_ACK(regs,SCSI_PHASE_DATA_IN);
800 1.1 glass #if PSEUDO_DMA
801 1.1 glass xfer = sci_pdma_in(regs, SCSI_PHASE_DATA_IN,
802 1.1 glass maxlen, data);
803 1.1 glass #else
804 1.1 glass xfer = sci_data_in(regs, SCSI_PHASE_DATA_IN,
805 1.1 glass maxlen, data);
806 1.1 glass #endif
807 1.1 glass retlen += xfer;
808 1.1 glass maxlen -= xfer;
809 1.1 glass break;
810 1.1 glass case SCSI_PHASE_DATA_OUT:
811 1.1 glass SCI_ACK(regs,SCSI_PHASE_DATA_OUT);
812 1.1 glass #if PSEUDO_DMA
813 1.1 glass xfer = sci_pdma_out(regs, SCSI_PHASE_DATA_OUT,
814 1.1 glass maxlen, data);
815 1.1 glass #else
816 1.1 glass xfer = sci_data_out(regs, SCSI_PHASE_DATA_OUT,
817 1.1 glass maxlen, data);
818 1.1 glass #endif
819 1.1 glass retlen += xfer;
820 1.1 glass maxlen -= xfer;
821 1.1 glass break;
822 1.1 glass case SCSI_PHASE_STATUS:
823 1.1 glass SCI_ACK(regs,SCSI_PHASE_STATUS);
824 1.1 glass sci_data_in(regs, SCSI_PHASE_STATUS,
825 1.1 glass 1, status);
826 1.1 glass break;
827 1.1 glass case SCSI_PHASE_MESSAGE_IN:
828 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_IN);
829 1.1 glass sci_data_in(regs, SCSI_PHASE_MESSAGE_IN,
830 1.1 glass 1, msg);
831 1.1 glass if (*msg == 0) {
832 1.1 glass return retlen;
833 1.1 glass } else {
834 1.1 glass printf( "message 0x%x in "
835 1.1 glass "data_transfer.\n", *msg);
836 1.1 glass }
837 1.1 glass break;
838 1.1 glass case SCSI_PHASE_MESSAGE_OUT:
839 1.1 glass SCI_ACK(regs,SCSI_PHASE_MESSAGE_OUT);
840 1.1 glass sci_data_out(regs, SCSI_PHASE_MESSAGE_OUT,
841 1.1 glass 1, msg);
842 1.1 glass break;
843 1.1 glass default:
844 1.1 glass printf( "Unexpected phase 0x%x in "
845 1.1 glass "data_transfer().\n", phase);
846 1.1 glass scsi_timeout_error:
847 1.1 glass return retlen;
848 1.1 glass break;
849 1.1 glass }
850 1.1 glass }
851 1.1 glass }
852 1.1 glass
853 1.3 gwr static int
854 1.2 gwr si_dorequest(register volatile sci_regmap_t *regs,
855 1.1 glass int target, int lun, u_char *cmd, int cmdlen,
856 1.1 glass char *databuf, int datalen, int *sent, int *ret)
857 1.1 glass {
858 1.1 glass /* Returns 0 on success, -1 on internal error, or the status byte */
859 1.1 glass int cmd_bytes_sent, r;
860 1.1 glass u_char stat, msg, c;
861 1.1 glass
862 1.1 glass *sent = 0;
863 1.1 glass
864 1.2 gwr if ( ( r = si_select_target(regs, 7, target, 1) ) != SCSI_RET_SUCCESS) {
865 1.14 gwr #ifdef DEBUG
866 1.14 gwr if (si_debug) {
867 1.14 gwr printf("si_dorequest: select returned %d\n", r);
868 1.14 gwr }
869 1.14 gwr #endif
870 1.1 glass *ret = r;
871 1.1 glass SCI_CLR_INTR(regs);
872 1.1 glass switch (r) {
873 1.1 glass case SCSI_RET_RETRY:
874 1.1 glass return 0x08;
875 1.1 glass default:
876 1.2 gwr printf("si_select_target(target %d, lun %d) failed(%d).\n",
877 1.1 glass target, lun, r);
878 1.1 glass case SCSI_RET_DEVICE_DOWN:
879 1.1 glass return -1;
880 1.1 glass }
881 1.1 glass }
882 1.1 glass
883 1.1 glass c = 0x80 | lun;
884 1.1 glass
885 1.2 gwr if ((cmd_bytes_sent = si_command_transfer(regs, cmdlen,
886 1.14 gwr (u_char *) cmd, &stat, &c)) != cmdlen)
887 1.14 gwr {
888 1.1 glass SCI_CLR_INTR(regs);
889 1.1 glass *ret = SCSI_RET_COMMAND_FAIL;
890 1.1 glass printf("Data underrun sending CCB (%d bytes of %d, sent).\n",
891 1.1 glass cmd_bytes_sent, cmdlen);
892 1.1 glass return -1;
893 1.1 glass }
894 1.1 glass
895 1.2 gwr *sent=si_data_transfer(regs, datalen, (u_char *)databuf,
896 1.1 glass &stat, &msg);
897 1.14 gwr #ifdef DEBUG
898 1.14 gwr if (si_debug) {
899 1.14 gwr printf("si_dorequest: data transfered = %d\n", *sent);
900 1.14 gwr }
901 1.14 gwr #endif
902 1.1 glass
903 1.1 glass *ret = 0;
904 1.1 glass return stat;
905 1.1 glass }
906 1.1 glass
907 1.3 gwr static int
908 1.2 gwr si_generic(int adapter, int id, int lun, struct scsi_generic *cmd,
909 1.1 glass int cmdlen, void *databuf, int datalen)
910 1.1 glass {
911 1.2 gwr register struct ncr5380_softc *ncr5380 = sicd.cd_devs[adapter];
912 1.2 gwr register volatile sci_regmap_t *regs = ncr5380->sc_regs;
913 1.2 gwr int i,j,sent,ret;
914 1.1 glass
915 1.2 gwr if (cmd->opcode == TEST_UNIT_READY) /* XXX */
916 1.2 gwr cmd->bytes[0] = ((u_char) lun << 5);
917 1.1 glass
918 1.2 gwr i = si_dorequest(regs, id, lun, (u_char *) cmd, cmdlen,
919 1.2 gwr databuf, datalen, &sent, &ret);
920 1.1 glass
921 1.2 gwr return i;
922 1.1 glass }
923 1.1 glass
924 1.3 gwr static int
925 1.2 gwr si_group0(int adapter, int id, int lun, int opcode, int addr, int len,
926 1.1 glass int flags, caddr_t databuf, int datalen)
927 1.1 glass {
928 1.2 gwr register struct ncr5380_softc *ncr5380 = sicd.cd_devs[adapter];
929 1.2 gwr register volatile sci_regmap_t *regs = ncr5380->sc_regs;
930 1.2 gwr unsigned char cmd[6];
931 1.2 gwr int i,j,sent,ret;
932 1.2 gwr
933 1.2 gwr cmd[0] = opcode; /* Operation code */
934 1.2 gwr cmd[1] = (lun << 5) | ((addr >> 16) & 0x1F); /* Lun & MSB of addr */
935 1.2 gwr cmd[2] = (addr >> 8) & 0xFF; /* addr */
936 1.2 gwr cmd[3] = addr & 0xFF; /* LSB of addr */
937 1.2 gwr cmd[4] = len; /* Allocation length */
938 1.2 gwr cmd[5] = flags; /* Link/Flag */
939 1.1 glass
940 1.2 gwr i = si_dorequest(regs, id, lun, cmd, 6, databuf, datalen, &sent, &ret);
941 1.1 glass
942 1.2 gwr return i;
943 1.1 glass }
944